Fork of official mbed Real Time Operating System based on the RTX implementation of the CMSIS-RTOS API open standard.
Dependents: Final_Coffee_Roaster
Fork of mbed-rtos by
rtx/HAL_CM.c@6:350b53afb889, 2012-11-23 (annotated)
- Committer:
- emilmont
- Date:
- Fri Nov 23 09:57:31 2012 +0000
- Revision:
- 6:350b53afb889
- Child:
- 11:db1fc233faa9
Merge RTOS C++ API and RTX under the same library; Update RTX to version 4.60; Add proper Thread destructor;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 6:350b53afb889 | 1 | /*---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 2 | * RL-ARM - RTX |
emilmont | 6:350b53afb889 | 3 | *---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 4 | * Name: HAL_CM.C |
emilmont | 6:350b53afb889 | 5 | * Purpose: Hardware Abstraction Layer for Cortex-M |
emilmont | 6:350b53afb889 | 6 | * Rev.: V4.60 |
emilmont | 6:350b53afb889 | 7 | *---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 8 | * |
emilmont | 6:350b53afb889 | 9 | * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH |
emilmont | 6:350b53afb889 | 10 | * All rights reserved. |
emilmont | 6:350b53afb889 | 11 | * Redistribution and use in source and binary forms, with or without |
emilmont | 6:350b53afb889 | 12 | * modification, are permitted provided that the following conditions are met: |
emilmont | 6:350b53afb889 | 13 | * - Redistributions of source code must retain the above copyright |
emilmont | 6:350b53afb889 | 14 | * notice, this list of conditions and the following disclaimer. |
emilmont | 6:350b53afb889 | 15 | * - Redistributions in binary form must reproduce the above copyright |
emilmont | 6:350b53afb889 | 16 | * notice, this list of conditions and the following disclaimer in the |
emilmont | 6:350b53afb889 | 17 | * documentation and/or other materials provided with the distribution. |
emilmont | 6:350b53afb889 | 18 | * - Neither the name of ARM nor the names of its contributors may be used |
emilmont | 6:350b53afb889 | 19 | * to endorse or promote products derived from this software without |
emilmont | 6:350b53afb889 | 20 | * specific prior written permission. |
emilmont | 6:350b53afb889 | 21 | * |
emilmont | 6:350b53afb889 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emilmont | 6:350b53afb889 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emilmont | 6:350b53afb889 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
emilmont | 6:350b53afb889 | 25 | * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
emilmont | 6:350b53afb889 | 26 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
emilmont | 6:350b53afb889 | 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
emilmont | 6:350b53afb889 | 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
emilmont | 6:350b53afb889 | 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
emilmont | 6:350b53afb889 | 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
emilmont | 6:350b53afb889 | 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
emilmont | 6:350b53afb889 | 32 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 6:350b53afb889 | 33 | *---------------------------------------------------------------------------*/ |
emilmont | 6:350b53afb889 | 34 | |
emilmont | 6:350b53afb889 | 35 | #include "rt_TypeDef.h" |
emilmont | 6:350b53afb889 | 36 | #include "RTX_Config.h" |
emilmont | 6:350b53afb889 | 37 | #include "rt_HAL_CM.h" |
emilmont | 6:350b53afb889 | 38 | |
emilmont | 6:350b53afb889 | 39 | |
emilmont | 6:350b53afb889 | 40 | /*---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 41 | * Global Variables |
emilmont | 6:350b53afb889 | 42 | *---------------------------------------------------------------------------*/ |
emilmont | 6:350b53afb889 | 43 | |
emilmont | 6:350b53afb889 | 44 | #ifdef DBG_MSG |
emilmont | 6:350b53afb889 | 45 | BIT dbg_msg; |
emilmont | 6:350b53afb889 | 46 | #endif |
emilmont | 6:350b53afb889 | 47 | |
emilmont | 6:350b53afb889 | 48 | /*---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 49 | * Functions |
emilmont | 6:350b53afb889 | 50 | *---------------------------------------------------------------------------*/ |
emilmont | 6:350b53afb889 | 51 | |
emilmont | 6:350b53afb889 | 52 | |
emilmont | 6:350b53afb889 | 53 | /*--------------------------- rt_init_stack ---------------------------------*/ |
emilmont | 6:350b53afb889 | 54 | |
emilmont | 6:350b53afb889 | 55 | void rt_init_stack (P_TCB p_TCB, FUNCP task_body) { |
emilmont | 6:350b53afb889 | 56 | /* Prepare TCB and saved context for a first time start of a task. */ |
emilmont | 6:350b53afb889 | 57 | U32 *stk,i,size; |
emilmont | 6:350b53afb889 | 58 | |
emilmont | 6:350b53afb889 | 59 | /* Prepare a complete interrupt frame for first task start */ |
emilmont | 6:350b53afb889 | 60 | size = p_TCB->priv_stack >> 2; |
emilmont | 6:350b53afb889 | 61 | |
emilmont | 6:350b53afb889 | 62 | /* Write to the top of stack. */ |
emilmont | 6:350b53afb889 | 63 | stk = &p_TCB->stack[size]; |
emilmont | 6:350b53afb889 | 64 | |
emilmont | 6:350b53afb889 | 65 | /* Auto correct to 8-byte ARM stack alignment. */ |
emilmont | 6:350b53afb889 | 66 | if ((U32)stk & 0x04) { |
emilmont | 6:350b53afb889 | 67 | stk--; |
emilmont | 6:350b53afb889 | 68 | } |
emilmont | 6:350b53afb889 | 69 | |
emilmont | 6:350b53afb889 | 70 | stk -= 16; |
emilmont | 6:350b53afb889 | 71 | |
emilmont | 6:350b53afb889 | 72 | /* Default xPSR and initial PC */ |
emilmont | 6:350b53afb889 | 73 | stk[15] = INITIAL_xPSR; |
emilmont | 6:350b53afb889 | 74 | stk[14] = (U32)task_body; |
emilmont | 6:350b53afb889 | 75 | |
emilmont | 6:350b53afb889 | 76 | /* Clear R4-R11,R0-R3,R12,LR registers. */ |
emilmont | 6:350b53afb889 | 77 | for (i = 0; i < 14; i++) { |
emilmont | 6:350b53afb889 | 78 | stk[i] = 0; |
emilmont | 6:350b53afb889 | 79 | } |
emilmont | 6:350b53afb889 | 80 | |
emilmont | 6:350b53afb889 | 81 | /* Assign a void pointer to R0. */ |
emilmont | 6:350b53afb889 | 82 | stk[8] = (U32)p_TCB->msg; |
emilmont | 6:350b53afb889 | 83 | |
emilmont | 6:350b53afb889 | 84 | /* Initial Task stack pointer. */ |
emilmont | 6:350b53afb889 | 85 | p_TCB->tsk_stack = (U32)stk; |
emilmont | 6:350b53afb889 | 86 | |
emilmont | 6:350b53afb889 | 87 | /* Task entry point. */ |
emilmont | 6:350b53afb889 | 88 | p_TCB->ptask = task_body; |
emilmont | 6:350b53afb889 | 89 | |
emilmont | 6:350b53afb889 | 90 | /* Set a magic word for checking of stack overflow. |
emilmont | 6:350b53afb889 | 91 | For the main thread (ID: 0x01) the stack is in a memory area shared with the |
emilmont | 6:350b53afb889 | 92 | heap, therefore the last word of the stack is a moving target. |
emilmont | 6:350b53afb889 | 93 | We want to do stack/heap collision detection instead. |
emilmont | 6:350b53afb889 | 94 | */ |
emilmont | 6:350b53afb889 | 95 | if (p_TCB->task_id != 0x01) |
emilmont | 6:350b53afb889 | 96 | p_TCB->stack[0] = MAGIC_WORD; |
emilmont | 6:350b53afb889 | 97 | } |
emilmont | 6:350b53afb889 | 98 | |
emilmont | 6:350b53afb889 | 99 | |
emilmont | 6:350b53afb889 | 100 | /*--------------------------- rt_ret_val ----------------------------------*/ |
emilmont | 6:350b53afb889 | 101 | |
emilmont | 6:350b53afb889 | 102 | static __inline U32 *rt_ret_regs (P_TCB p_TCB) { |
emilmont | 6:350b53afb889 | 103 | /* Get pointer to task return value registers (R0..R3) in Stack */ |
emilmont | 6:350b53afb889 | 104 | #if (__TARGET_FPU_VFP) |
emilmont | 6:350b53afb889 | 105 | if (p_TCB->stack_frame) { |
emilmont | 6:350b53afb889 | 106 | /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */ |
emilmont | 6:350b53afb889 | 107 | return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4); |
emilmont | 6:350b53afb889 | 108 | } else { |
emilmont | 6:350b53afb889 | 109 | /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */ |
emilmont | 6:350b53afb889 | 110 | return (U32 *)(p_TCB->tsk_stack + 8*4); |
emilmont | 6:350b53afb889 | 111 | } |
emilmont | 6:350b53afb889 | 112 | #else |
emilmont | 6:350b53afb889 | 113 | /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */ |
emilmont | 6:350b53afb889 | 114 | return (U32 *)(p_TCB->tsk_stack + 8*4); |
emilmont | 6:350b53afb889 | 115 | #endif |
emilmont | 6:350b53afb889 | 116 | } |
emilmont | 6:350b53afb889 | 117 | |
emilmont | 6:350b53afb889 | 118 | void rt_ret_val (P_TCB p_TCB, U32 v0) { |
emilmont | 6:350b53afb889 | 119 | U32 *ret; |
emilmont | 6:350b53afb889 | 120 | |
emilmont | 6:350b53afb889 | 121 | ret = rt_ret_regs(p_TCB); |
emilmont | 6:350b53afb889 | 122 | ret[0] = v0; |
emilmont | 6:350b53afb889 | 123 | } |
emilmont | 6:350b53afb889 | 124 | |
emilmont | 6:350b53afb889 | 125 | void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) { |
emilmont | 6:350b53afb889 | 126 | U32 *ret; |
emilmont | 6:350b53afb889 | 127 | |
emilmont | 6:350b53afb889 | 128 | ret = rt_ret_regs(p_TCB); |
emilmont | 6:350b53afb889 | 129 | ret[0] = v0; |
emilmont | 6:350b53afb889 | 130 | ret[1] = v1; |
emilmont | 6:350b53afb889 | 131 | } |
emilmont | 6:350b53afb889 | 132 | |
emilmont | 6:350b53afb889 | 133 | |
emilmont | 6:350b53afb889 | 134 | /*--------------------------- dbg_init --------------------------------------*/ |
emilmont | 6:350b53afb889 | 135 | |
emilmont | 6:350b53afb889 | 136 | #ifdef DBG_MSG |
emilmont | 6:350b53afb889 | 137 | void dbg_init (void) { |
emilmont | 6:350b53afb889 | 138 | if ((DEMCR & DEMCR_TRCENA) && |
emilmont | 6:350b53afb889 | 139 | (ITM_CONTROL & ITM_ITMENA) && |
emilmont | 6:350b53afb889 | 140 | (ITM_ENABLE & (1UL << 31))) { |
emilmont | 6:350b53afb889 | 141 | dbg_msg = __TRUE; |
emilmont | 6:350b53afb889 | 142 | } |
emilmont | 6:350b53afb889 | 143 | } |
emilmont | 6:350b53afb889 | 144 | #endif |
emilmont | 6:350b53afb889 | 145 | |
emilmont | 6:350b53afb889 | 146 | /*--------------------------- dbg_task_notify -------------------------------*/ |
emilmont | 6:350b53afb889 | 147 | |
emilmont | 6:350b53afb889 | 148 | #ifdef DBG_MSG |
emilmont | 6:350b53afb889 | 149 | void dbg_task_notify (P_TCB p_tcb, BOOL create) { |
emilmont | 6:350b53afb889 | 150 | while (ITM_PORT31_U32 == 0); |
emilmont | 6:350b53afb889 | 151 | ITM_PORT31_U32 = (U32)p_tcb->ptask; |
emilmont | 6:350b53afb889 | 152 | while (ITM_PORT31_U32 == 0); |
emilmont | 6:350b53afb889 | 153 | ITM_PORT31_U16 = (create << 8) | p_tcb->task_id; |
emilmont | 6:350b53afb889 | 154 | } |
emilmont | 6:350b53afb889 | 155 | #endif |
emilmont | 6:350b53afb889 | 156 | |
emilmont | 6:350b53afb889 | 157 | /*--------------------------- dbg_task_switch -------------------------------*/ |
emilmont | 6:350b53afb889 | 158 | |
emilmont | 6:350b53afb889 | 159 | #ifdef DBG_MSG |
emilmont | 6:350b53afb889 | 160 | void dbg_task_switch (U32 task_id) { |
emilmont | 6:350b53afb889 | 161 | while (ITM_PORT31_U32 == 0); |
emilmont | 6:350b53afb889 | 162 | ITM_PORT31_U8 = task_id; |
emilmont | 6:350b53afb889 | 163 | } |
emilmont | 6:350b53afb889 | 164 | #endif |
emilmont | 6:350b53afb889 | 165 | |
emilmont | 6:350b53afb889 | 166 | |
emilmont | 6:350b53afb889 | 167 | /*---------------------------------------------------------------------------- |
emilmont | 6:350b53afb889 | 168 | * end of file |
emilmont | 6:350b53afb889 | 169 | *---------------------------------------------------------------------------*/ |
emilmont | 6:350b53afb889 | 170 |