Emilio Monti
mbed libraries for KL25Z
Embed:
(wiki syntax)
LLWU_Type Struct Reference
[LLWU Peripheral Access Layer]
LLWU - Register Layout Typedef. More...
#include <MKL25Z4.h>
Data Fields | |
| __IO uint8_t | PE1 |
| LLWU Pin Enable 1 register, offset: 0x0. | |
| __IO uint8_t | PE2 |
| LLWU Pin Enable 2 register, offset: 0x1. | |
| __IO uint8_t | PE3 |
| LLWU Pin Enable 3 register, offset: 0x2. | |
| __IO uint8_t | PE4 |
| LLWU Pin Enable 4 register, offset: 0x3. | |
| __IO uint8_t | ME |
| LLWU Module Enable register, offset: 0x4. | |
| __IO uint8_t | F1 |
| LLWU Flag 1 register, offset: 0x5. | |
| __IO uint8_t | F2 |
| LLWU Flag 2 register, offset: 0x6. | |
| __I uint8_t | F3 |
| LLWU Flag 3 register, offset: 0x7. | |
| __IO uint8_t | FILT1 |
| LLWU Pin Filter 1 register, offset: 0x8. | |
| __IO uint8_t | FILT2 |
| LLWU Pin Filter 2 register, offset: 0x9. | |
Detailed Description
LLWU - Register Layout Typedef.
Definition at line 1247 of file MKL25Z4.h.
Field Documentation
| __IO uint8_t FILT1 |
| __IO uint8_t FILT2 |
| __IO uint8_t ME |
| __IO uint8_t PE1 |
| __IO uint8_t PE2 |
| __IO uint8_t PE3 |
Generated on Wed Jul 13 2022 13:18:34 by
1.7.2
