Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_mult_cmplx_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 complex-by-complex multiplication
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupCmplxMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup CmplxByCmplxMult
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Q15 complex-by-complex multiplication
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcA points to the first input vector
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrcB points to the second input vector
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 57 * @param[in] numSamples number of complex samples in each vector
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
emh203 0:3d9c67d97d6f 63 */
emh203 0:3d9c67d97d6f 64
emh203 0:3d9c67d97d6f 65 void arm_cmplx_mult_cmplx_q15(
emh203 0:3d9c67d97d6f 66 q15_t * pSrcA,
emh203 0:3d9c67d97d6f 67 q15_t * pSrcB,
emh203 0:3d9c67d97d6f 68 q15_t * pDst,
emh203 0:3d9c67d97d6f 69 uint32_t numSamples)
emh203 0:3d9c67d97d6f 70 {
emh203 0:3d9c67d97d6f 71 q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 74
emh203 0:3d9c67d97d6f 75 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 76 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78 /* loop Unrolling */
emh203 0:3d9c67d97d6f 79 blkCnt = numSamples >> 2u;
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 82 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 83 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 84 {
emh203 0:3d9c67d97d6f 85 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emh203 0:3d9c67d97d6f 86 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emh203 0:3d9c67d97d6f 87 a = *pSrcA++;
emh203 0:3d9c67d97d6f 88 b = *pSrcA++;
emh203 0:3d9c67d97d6f 89 c = *pSrcB++;
emh203 0:3d9c67d97d6f 90 d = *pSrcB++;
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 93 *pDst++ =
emh203 0:3d9c67d97d6f 94 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 95 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 96 *pDst++ =
emh203 0:3d9c67d97d6f 97 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 a = *pSrcA++;
emh203 0:3d9c67d97d6f 100 b = *pSrcA++;
emh203 0:3d9c67d97d6f 101 c = *pSrcB++;
emh203 0:3d9c67d97d6f 102 d = *pSrcB++;
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 105 *pDst++ =
emh203 0:3d9c67d97d6f 106 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 107 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 108 *pDst++ =
emh203 0:3d9c67d97d6f 109 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 a = *pSrcA++;
emh203 0:3d9c67d97d6f 112 b = *pSrcA++;
emh203 0:3d9c67d97d6f 113 c = *pSrcB++;
emh203 0:3d9c67d97d6f 114 d = *pSrcB++;
emh203 0:3d9c67d97d6f 115
emh203 0:3d9c67d97d6f 116 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 117 *pDst++ =
emh203 0:3d9c67d97d6f 118 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 119 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 120 *pDst++ =
emh203 0:3d9c67d97d6f 121 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 a = *pSrcA++;
emh203 0:3d9c67d97d6f 124 b = *pSrcA++;
emh203 0:3d9c67d97d6f 125 c = *pSrcB++;
emh203 0:3d9c67d97d6f 126 d = *pSrcB++;
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 129 *pDst++ =
emh203 0:3d9c67d97d6f 130 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 131 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 132 *pDst++ =
emh203 0:3d9c67d97d6f 133 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 /* Decrement the blockSize loop counter */
emh203 0:3d9c67d97d6f 136 blkCnt--;
emh203 0:3d9c67d97d6f 137 }
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 140 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 141 blkCnt = numSamples % 0x4u;
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 144 {
emh203 0:3d9c67d97d6f 145 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emh203 0:3d9c67d97d6f 146 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emh203 0:3d9c67d97d6f 147 a = *pSrcA++;
emh203 0:3d9c67d97d6f 148 b = *pSrcA++;
emh203 0:3d9c67d97d6f 149 c = *pSrcB++;
emh203 0:3d9c67d97d6f 150 d = *pSrcB++;
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 153 *pDst++ =
emh203 0:3d9c67d97d6f 154 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 155 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 156 *pDst++ =
emh203 0:3d9c67d97d6f 157 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 /* Decrement the blockSize loop counter */
emh203 0:3d9c67d97d6f 160 blkCnt--;
emh203 0:3d9c67d97d6f 161 }
emh203 0:3d9c67d97d6f 162
emh203 0:3d9c67d97d6f 163 #else
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 while(numSamples > 0u)
emh203 0:3d9c67d97d6f 168 {
emh203 0:3d9c67d97d6f 169 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emh203 0:3d9c67d97d6f 170 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emh203 0:3d9c67d97d6f 171 a = *pSrcA++;
emh203 0:3d9c67d97d6f 172 b = *pSrcA++;
emh203 0:3d9c67d97d6f 173 c = *pSrcB++;
emh203 0:3d9c67d97d6f 174 d = *pSrcB++;
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 177 *pDst++ =
emh203 0:3d9c67d97d6f 178 (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
emh203 0:3d9c67d97d6f 179 /* store the result in 3.13 format in the destination buffer. */
emh203 0:3d9c67d97d6f 180 *pDst++ =
emh203 0:3d9c67d97d6f 181 (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
emh203 0:3d9c67d97d6f 182
emh203 0:3d9c67d97d6f 183 /* Decrement the blockSize loop counter */
emh203 0:3d9c67d97d6f 184 numSamples--;
emh203 0:3d9c67d97d6f 185 }
emh203 0:3d9c67d97d6f 186
emh203 0:3d9c67d97d6f 187 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 188
emh203 0:3d9c67d97d6f 189 }
emh203 0:3d9c67d97d6f 190
emh203 0:3d9c67d97d6f 191 /**
emh203 0:3d9c67d97d6f 192 * @} end of CmplxByCmplxMult group
emh203 0:3d9c67d97d6f 193 */