V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_mag_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 complex magnitude.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupCmplxMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup cmplx_mag
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52
emh203 0:3d9c67d97d6f 53 /**
emh203 0:3d9c67d97d6f 54 * @brief Q15 complex magnitude
emh203 0:3d9c67d97d6f 55 * @param *pSrc points to the complex input vector
emh203 0:3d9c67d97d6f 56 * @param *pDst points to the real output vector
emh203 0:3d9c67d97d6f 57 * @param numSamples number of complex samples in the input vector
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
emh203 0:3d9c67d97d6f 63 */
emh203 0:3d9c67d97d6f 64
emh203 0:3d9c67d97d6f 65 void arm_cmplx_mag_q15(
emh203 0:3d9c67d97d6f 66 q15_t * pSrc,
emh203 0:3d9c67d97d6f 67 q15_t * pDst,
emh203 0:3d9c67d97d6f 68 uint32_t numSamples)
emh203 0:3d9c67d97d6f 69 {
emh203 0:3d9c67d97d6f 70 q31_t acc0, acc1; /* Accumulators */
emh203 0:3d9c67d97d6f 71
emh203 0:3d9c67d97d6f 72 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 73
emh203 0:3d9c67d97d6f 74 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 75 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 76 q31_t in1, in2, in3, in4;
emh203 0:3d9c67d97d6f 77 q31_t acc2, acc3;
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79
emh203 0:3d9c67d97d6f 80 /*loop Unrolling */
emh203 0:3d9c67d97d6f 81 blkCnt = numSamples >> 2u;
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 84 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 85 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 86 {
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
emh203 0:3d9c67d97d6f 89 in1 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 90 in2 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 91 in3 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 92 in4 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 93
emh203 0:3d9c67d97d6f 94 acc0 = __SMUAD(in1, in1);
emh203 0:3d9c67d97d6f 95 acc1 = __SMUAD(in2, in2);
emh203 0:3d9c67d97d6f 96 acc2 = __SMUAD(in3, in3);
emh203 0:3d9c67d97d6f 97 acc3 = __SMUAD(in4, in4);
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 /* store the result in 2.14 format in the destination buffer. */
emh203 0:3d9c67d97d6f 100 arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
emh203 0:3d9c67d97d6f 101 arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
emh203 0:3d9c67d97d6f 102 arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
emh203 0:3d9c67d97d6f 103 arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 106 blkCnt--;
emh203 0:3d9c67d97d6f 107 }
emh203 0:3d9c67d97d6f 108
emh203 0:3d9c67d97d6f 109 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 110 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 111 blkCnt = numSamples % 0x4u;
emh203 0:3d9c67d97d6f 112
emh203 0:3d9c67d97d6f 113 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 114 {
emh203 0:3d9c67d97d6f 115 /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
emh203 0:3d9c67d97d6f 116 in1 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 117 acc0 = __SMUAD(in1, in1);
emh203 0:3d9c67d97d6f 118
emh203 0:3d9c67d97d6f 119 /* store the result in 2.14 format in the destination buffer. */
emh203 0:3d9c67d97d6f 120 arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 123 blkCnt--;
emh203 0:3d9c67d97d6f 124 }
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 #else
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 129 q15_t real, imag; /* Temporary variables to hold input values */
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 while(numSamples > 0u)
emh203 0:3d9c67d97d6f 132 {
emh203 0:3d9c67d97d6f 133 /* out = sqrt(real * real + imag * imag) */
emh203 0:3d9c67d97d6f 134 real = *pSrc++;
emh203 0:3d9c67d97d6f 135 imag = *pSrc++;
emh203 0:3d9c67d97d6f 136
emh203 0:3d9c67d97d6f 137 acc0 = (real * real);
emh203 0:3d9c67d97d6f 138 acc1 = (imag * imag);
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 /* store the result in 2.14 format in the destination buffer. */
emh203 0:3d9c67d97d6f 141 arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 144 numSamples--;
emh203 0:3d9c67d97d6f 145 }
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 }
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151 /**
emh203 0:3d9c67d97d6f 152 * @} end of cmplx_mag group
emh203 0:3d9c67d97d6f 153 */