V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_dot_prod_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point complex dot product
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupCmplxMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @defgroup cmplx_dot_prod Complex Dot Product
emh203 0:3d9c67d97d6f 49 *
emh203 0:3d9c67d97d6f 50 * Computes the dot product of two complex vectors.
emh203 0:3d9c67d97d6f 51 * The vectors are multiplied element-by-element and then summed.
emh203 0:3d9c67d97d6f 52 *
emh203 0:3d9c67d97d6f 53 * The <code>pSrcA</code> points to the first complex input vector and
emh203 0:3d9c67d97d6f 54 * <code>pSrcB</code> points to the second complex input vector.
emh203 0:3d9c67d97d6f 55 * <code>numSamples</code> specifies the number of complex samples
emh203 0:3d9c67d97d6f 56 * and the data in each array is stored in an interleaved fashion
emh203 0:3d9c67d97d6f 57 * (real, imag, real, imag, ...).
emh203 0:3d9c67d97d6f 58 * Each array has a total of <code>2*numSamples</code> values.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * The underlying algorithm is used:
emh203 0:3d9c67d97d6f 61 * <pre>
emh203 0:3d9c67d97d6f 62 * realResult=0;
emh203 0:3d9c67d97d6f 63 * imagResult=0;
emh203 0:3d9c67d97d6f 64 * for(n=0; n<numSamples; n++) {
emh203 0:3d9c67d97d6f 65 * realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
emh203 0:3d9c67d97d6f 66 * imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
emh203 0:3d9c67d97d6f 67 * }
emh203 0:3d9c67d97d6f 68 * </pre>
emh203 0:3d9c67d97d6f 69 *
emh203 0:3d9c67d97d6f 70 * There are separate functions for floating-point, Q15, and Q31 data types.
emh203 0:3d9c67d97d6f 71 */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 /**
emh203 0:3d9c67d97d6f 74 * @addtogroup cmplx_dot_prod
emh203 0:3d9c67d97d6f 75 * @{
emh203 0:3d9c67d97d6f 76 */
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78 /**
emh203 0:3d9c67d97d6f 79 * @brief Floating-point complex dot product
emh203 0:3d9c67d97d6f 80 * @param *pSrcA points to the first input vector
emh203 0:3d9c67d97d6f 81 * @param *pSrcB points to the second input vector
emh203 0:3d9c67d97d6f 82 * @param numSamples number of complex samples in each vector
emh203 0:3d9c67d97d6f 83 * @param *realResult real part of the result returned here
emh203 0:3d9c67d97d6f 84 * @param *imagResult imaginary part of the result returned here
emh203 0:3d9c67d97d6f 85 * @return none.
emh203 0:3d9c67d97d6f 86 */
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 void arm_cmplx_dot_prod_f32(
emh203 0:3d9c67d97d6f 89 float32_t * pSrcA,
emh203 0:3d9c67d97d6f 90 float32_t * pSrcB,
emh203 0:3d9c67d97d6f 91 uint32_t numSamples,
emh203 0:3d9c67d97d6f 92 float32_t * realResult,
emh203 0:3d9c67d97d6f 93 float32_t * imagResult)
emh203 0:3d9c67d97d6f 94 {
emh203 0:3d9c67d97d6f 95 float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */
emh203 0:3d9c67d97d6f 96 float32_t a0,b0,c0,d0;
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 99
emh203 0:3d9c67d97d6f 100 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 101 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /*loop Unrolling */
emh203 0:3d9c67d97d6f 104 blkCnt = numSamples >> 2u;
emh203 0:3d9c67d97d6f 105
emh203 0:3d9c67d97d6f 106 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 107 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 108 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 109 {
emh203 0:3d9c67d97d6f 110 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 111 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 112 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 113 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 114
emh203 0:3d9c67d97d6f 115 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 116 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 117 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 118 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 121 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 122 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 123 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 124
emh203 0:3d9c67d97d6f 125 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 126 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 127 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 128 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 131 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 132 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 133 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 136 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 137 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 138 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 141 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 142 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 143 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 146 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 147 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 148 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 151 blkCnt--;
emh203 0:3d9c67d97d6f 152 }
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 155 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 156 blkCnt = numSamples & 0x3u;
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 159 {
emh203 0:3d9c67d97d6f 160 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 161 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 162 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 163 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 166 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 167 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 168 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 171 blkCnt--;
emh203 0:3d9c67d97d6f 172 }
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 #else
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 while(numSamples > 0u)
emh203 0:3d9c67d97d6f 179 {
emh203 0:3d9c67d97d6f 180 a0 = *pSrcA++;
emh203 0:3d9c67d97d6f 181 b0 = *pSrcA++;
emh203 0:3d9c67d97d6f 182 c0 = *pSrcB++;
emh203 0:3d9c67d97d6f 183 d0 = *pSrcB++;
emh203 0:3d9c67d97d6f 184
emh203 0:3d9c67d97d6f 185 real_sum += a0 * c0;
emh203 0:3d9c67d97d6f 186 imag_sum += a0 * d0;
emh203 0:3d9c67d97d6f 187 real_sum -= b0 * d0;
emh203 0:3d9c67d97d6f 188 imag_sum += b0 * c0;
emh203 0:3d9c67d97d6f 189
emh203 0:3d9c67d97d6f 190 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 191 numSamples--;
emh203 0:3d9c67d97d6f 192 }
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 195
emh203 0:3d9c67d97d6f 196 /* Store the real and imaginary results in the destination buffers */
emh203 0:3d9c67d97d6f 197 *realResult = real_sum;
emh203 0:3d9c67d97d6f 198 *imagResult = imag_sum;
emh203 0:3d9c67d97d6f 199 }
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 /**
emh203 0:3d9c67d97d6f 202 * @} end of cmplx_dot_prod group
emh203 0:3d9c67d97d6f 203 */