Eli Hughes
V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.
Dependents: MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more
NVIC_Type Struct Reference
[Nested Vectored Interrupt Controller (NVIC)]
Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...
#include <core_cm0.h>
Data Fields | |
| __IO uint32_t | ISER [1] |
| __IO uint32_t | ICER [1] |
| __IO uint32_t | ISPR [1] |
| __IO uint32_t | ICPR [1] |
| __IO uint32_t | IP [8] |
Detailed Description
Structure type to access the Nested Vectored Interrupt Controller (NVIC).
Definition at line 300 of file core_cm0.h.
Field Documentation
| __IO uint32_t ICER[1] |
Offset: 0x080 (R/W) Interrupt Clear Enable Register
Definition at line 304 of file core_cm0.h.
| __IO uint32_t ICPR[1] |
Offset: 0x180 (R/W) Interrupt Clear Pending Register
Definition at line 308 of file core_cm0.h.
| __IO uint32_t IP[8] |
Offset: 0x300 (R/W) Interrupt Priority Register
Definition at line 311 of file core_cm0.h.
| __IO uint32_t ISER[1] |
Offset: 0x000 (R/W) Interrupt Set Enable Register
Definition at line 302 of file core_cm0.h.
| __IO uint32_t ISPR[1] |
Offset: 0x100 (R/W) Interrupt Set Pending Register
Definition at line 306 of file core_cm0.h.
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