V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

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Show/hide line numbers arm_sub_q31.c Source File

arm_sub_q31.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_sub_q31.c    
00009 *    
00010 * Description:  Q31 vector subtraction.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup BasicSub    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Q31 vector subtraction.    
00054  * @param[in]       *pSrcA points to the first input vector    
00055  * @param[in]       *pSrcB points to the second input vector    
00056  * @param[out]      *pDst points to the output vector    
00057  * @param[in]       blockSize number of samples in each vector    
00058  * @return none.    
00059  *    
00060  * <b>Scaling and Overflow Behavior:</b>    
00061  * \par    
00062  * The function uses saturating arithmetic.    
00063  * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.    
00064  */
00065 
00066 void arm_sub_q31(
00067   q31_t * pSrcA,
00068   q31_t * pSrcB,
00069   q31_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073 
00074 
00075 #ifndef ARM_MATH_CM0_FAMILY
00076 
00077 /* Run the below code for Cortex-M4 and Cortex-M3 */
00078   q31_t inA1, inA2, inA3, inA4;
00079   q31_t inB1, inB2, inB3, inB4;
00080 
00081   /*loop Unrolling */
00082   blkCnt = blockSize >> 2u;
00083 
00084   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00085    ** a second loop below computes the remaining 1 to 3 samples. */
00086   while(blkCnt > 0u)
00087   {
00088     /* C = A - B */
00089     /* Subtract and then store the results in the destination buffer. */
00090     inA1 = *pSrcA++;
00091     inA2 = *pSrcA++;
00092     inB1 = *pSrcB++;
00093     inB2 = *pSrcB++;
00094 
00095     inA3 = *pSrcA++;
00096     inA4 = *pSrcA++;
00097     inB3 = *pSrcB++;
00098     inB4 = *pSrcB++;
00099 
00100     *pDst++ = __QSUB(inA1, inB1);
00101     *pDst++ = __QSUB(inA2, inB2);
00102     *pDst++ = __QSUB(inA3, inB3);
00103     *pDst++ = __QSUB(inA4, inB4);
00104 
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108 
00109   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00110    ** No loop unrolling is used. */
00111   blkCnt = blockSize % 0x4u;
00112 
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A - B */
00116     /* Subtract and then store the result in the destination buffer. */
00117     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00118 
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122 
00123 #else
00124 
00125   /* Run the below code for Cortex-M0 */
00126 
00127   /* Initialize blkCnt with number of samples */
00128   blkCnt = blockSize;
00129 
00130   while(blkCnt > 0u)
00131   {
00132     /* C = A - B */
00133     /* Subtract and then store the result in the destination buffer. */
00134     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
00135 
00136     /* Decrement the loop counter */
00137     blkCnt--;
00138   }
00139 
00140 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00141 
00142 }
00143 
00144 /**    
00145  * @} end of BasicSub group    
00146  */