arm_power_q15.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3  
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_power_q15.c    
00009 *    
00010 * Description:  Sum of the squares of the elements of a Q15 vector.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.  
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupStats    
00045  */
00046 
00047 /**    
00048  * @addtogroup power    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Sum of the squares of the elements of a Q15 vector.    
00054  * @param[in]       *pSrc points to the input vector    
00055  * @param[in]       blockSize length of the input vector    
00056  * @param[out]      *pResult sum of the squares value returned here    
00057  * @return none.    
00058  *    
00059  * @details    
00060  * <b>Scaling and Overflow Behavior:</b>    
00061  *    
00062  * \par    
00063  * The function is implemented using a 64-bit internal accumulator.     
00064  * The input is represented in 1.15 format.   
00065  * Intermediate multiplication yields a 2.30 format, and this    
00066  * result is added without saturation to a 64-bit accumulator in 34.30 format.    
00067  * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
00068  * full precision of the intermediate multiplication is preserved.    
00069  * Finally, the return result is in 34.30 format.     
00070  *    
00071  */
00072 
00073 void arm_power_q15(
00074   q15_t * pSrc,
00075   uint32_t blockSize,
00076   q63_t * pResult)
00077 {
00078   q63_t sum = 0;                                 /* Temporary result storage */
00079 
00080 #ifndef ARM_MATH_CM0_FAMILY
00081 
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083 
00084   q31_t in32;                                    /* Temporary variable to store input value */
00085   q15_t in16;                                    /* Temporary variable to store input value */
00086   uint32_t blkCnt;                               /* loop counter */
00087 
00088 
00089   /* loop Unrolling */
00090   blkCnt = blockSize >> 2u;
00091 
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00097     /* Compute Power and then store the result in a temporary variable, sum. */
00098     in32 = *__SIMD32(pSrc)++;
00099     sum = __SMLALD(in32, in32, sum);
00100     in32 = *__SIMD32(pSrc)++;
00101     sum = __SMLALD(in32, in32, sum);
00102 
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106 
00107   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00108    ** No loop unrolling is used. */
00109   blkCnt = blockSize % 0x4u;
00110 
00111   while(blkCnt > 0u)
00112   {
00113     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00114     /* Compute Power and then store the result in a temporary variable, sum. */
00115     in16 = *pSrc++;
00116     sum = __SMLALD(in16, in16, sum);
00117 
00118     /* Decrement the loop counter */
00119     blkCnt--;
00120   }
00121 
00122 #else
00123 
00124   /* Run the below code for Cortex-M0 */
00125 
00126   q15_t in;                                      /* Temporary variable to store input value */
00127   uint32_t blkCnt;                               /* loop counter */
00128 
00129 
00130   /* Loop over blockSize number of values */
00131   blkCnt = blockSize;
00132 
00133   while(blkCnt > 0u)
00134   {
00135     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00136     /* Compute Power and then store the result in a temporary variable, sum. */
00137     in = *pSrc++;
00138     sum += ((q31_t) in * in);
00139 
00140     /* Decrement the loop counter */
00141     blkCnt--;
00142   }
00143 
00144 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00145 
00146   /* Store the results in 34.30 format  */
00147   *pResult = sum;
00148 }
00149 
00150 /**    
00151  * @} end of power group    
00152  */