V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

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Show/hide line numbers arm_offset_q7.c Source File

arm_offset_q7.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_offset_q7.c    
00009 *    
00010 * Description:  Q7 vector offset.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup offset    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief  Adds a constant offset to a Q7 vector.    
00054  * @param[in]  *pSrc points to the input vector    
00055  * @param[in]  offset is the offset to be added    
00056  * @param[out]  *pDst points to the output vector    
00057  * @param[in]  blockSize number of samples in the vector    
00058  * @return none.    
00059  *    
00060  * <b>Scaling and Overflow Behavior:</b>    
00061  * \par    
00062  * The function uses saturating arithmetic.    
00063  * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.    
00064  */
00065 
00066 void arm_offset_q7(
00067   q7_t * pSrc,
00068   q7_t offset,
00069   q7_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073 
00074 #ifndef ARM_MATH_CM0_FAMILY
00075 
00076 /* Run the below code for Cortex-M4 and Cortex-M3 */
00077   q31_t offset_packed;                           /* Offset packed to 32 bit */
00078 
00079 
00080   /*loop Unrolling */
00081   blkCnt = blockSize >> 2u;
00082 
00083   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00084   offset_packed = __PACKq7(offset, offset, offset, offset);
00085 
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C = A + offset */
00091     /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
00092     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
00093 
00094     /* Decrement the loop counter */
00095     blkCnt--;
00096   }
00097 
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101 
00102   while(blkCnt > 0u)
00103   {
00104     /* C = A + offset */
00105     /* Add offset and then store the result in the destination buffer. */
00106     *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
00107 
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111 
00112 #else
00113 
00114   /* Run the below code for Cortex-M0 */
00115 
00116   /* Initialize blkCnt with number of samples */
00117   blkCnt = blockSize;
00118 
00119   while(blkCnt > 0u)
00120   {
00121     /* C = A + offset */
00122     /* Add offset and then store the result in the destination buffer. */
00123     *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
00124 
00125     /* Decrement the loop counter */
00126     blkCnt--;
00127   }
00128 
00129 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00130 
00131 }
00132 
00133 /**    
00134  * @} end of offset group    
00135  */