arm_mult_q15.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_mult_q15.c    
00009 *    
00010 * Description:  Q15 vector multiplication.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup BasicMult    
00049  * @{    
00050  */
00051 
00052 
00053 /**    
00054  * @brief           Q15 vector multiplication    
00055  * @param[in]       *pSrcA points to the first input vector    
00056  * @param[in]       *pSrcB points to the second input vector    
00057  * @param[out]      *pDst points to the output vector    
00058  * @param[in]       blockSize number of samples in each vector    
00059  * @return none.    
00060  *    
00061  * <b>Scaling and Overflow Behavior:</b>    
00062  * \par    
00063  * The function uses saturating arithmetic.    
00064  * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
00065  */
00066 
00067 void arm_mult_q15(
00068   q15_t * pSrcA,
00069   q15_t * pSrcB,
00070   q15_t * pDst,
00071   uint32_t blockSize)
00072 {
00073   uint32_t blkCnt;                               /* loop counters */
00074 
00075 #ifndef ARM_MATH_CM0_FAMILY
00076 
00077 /* Run the below code for Cortex-M4 and Cortex-M3 */
00078   q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
00079   q15_t out1, out2, out3, out4;                  /* temporary output variables */
00080   q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
00081 
00082   /* loop Unrolling */
00083   blkCnt = blockSize >> 2u;
00084 
00085   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
00086    ** a second loop below computes the remaining 1 to 3 samples. */
00087   while(blkCnt > 0u)
00088   {
00089     /* read two samples at a time from sourceA */
00090     inA1 = *__SIMD32(pSrcA)++;
00091     /* read two samples at a time from sourceB */
00092     inB1 = *__SIMD32(pSrcB)++;
00093     /* read two samples at a time from sourceA */
00094     inA2 = *__SIMD32(pSrcA)++;
00095     /* read two samples at a time from sourceB */
00096     inB2 = *__SIMD32(pSrcB)++;
00097 
00098     /* multiply mul = sourceA * sourceB */
00099     mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
00100     mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
00101     mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
00102     mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
00103 
00104     /* saturate result to 16 bit */
00105     out1 = (q15_t) __SSAT(mul1 >> 15, 16);
00106     out2 = (q15_t) __SSAT(mul2 >> 15, 16);
00107     out3 = (q15_t) __SSAT(mul3 >> 15, 16);
00108     out4 = (q15_t) __SSAT(mul4 >> 15, 16);
00109 
00110     /* store the result */
00111 #ifndef ARM_MATH_BIG_ENDIAN
00112 
00113     *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
00114     *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
00115 
00116 #else
00117 
00118     *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
00119     *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
00120 
00121 #endif //      #ifndef ARM_MATH_BIG_ENDIAN
00122 
00123     /* Decrement the blockSize loop counter */
00124     blkCnt--;
00125   }
00126 
00127   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00128    ** No loop unrolling is used. */
00129   blkCnt = blockSize % 0x4u;
00130 
00131 #else
00132 
00133   /* Run the below code for Cortex-M0 */
00134 
00135   /* Initialize blkCnt with number of samples */
00136   blkCnt = blockSize;
00137 
00138 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00139 
00140 
00141   while(blkCnt > 0u)
00142   {
00143     /* C = A * B */
00144     /* Multiply the inputs and store the result in the destination buffer */
00145     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00146 
00147     /* Decrement the blockSize loop counter */
00148     blkCnt--;
00149   }
00150 }
00151 
00152 /**    
00153  * @} end of BasicMult group    
00154  */