V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

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Show/hide line numbers arm_mean_q15.c Source File

arm_mean_q15.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3  
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_mean_q15.c    
00009 *    
00010 * Description:  Mean value of a Q15 vector.   
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupStats    
00045  */
00046 
00047 /**    
00048  * @addtogroup mean    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Mean value of a Q15 vector.    
00054  * @param[in]       *pSrc points to the input vector    
00055  * @param[in]       blockSize length of the input vector    
00056  * @param[out]      *pResult mean value returned here    
00057  * @return none.    
00058  *    
00059  * @details    
00060  * <b>Scaling and Overflow Behavior:</b>    
00061  * \par    
00062  * The function is implemented using a 32-bit internal accumulator.    
00063  * The input is represented in 1.15 format and is accumulated in a 32-bit     
00064  * accumulator in 17.15 format.     
00065  * There is no risk of internal overflow with this approach, and the     
00066  * full precision of intermediate result is preserved.     
00067  * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.    
00068  *    
00069  */
00070 
00071 
00072 void arm_mean_q15(
00073   q15_t * pSrc,
00074   uint32_t blockSize,
00075   q15_t * pResult)
00076 {
00077   q31_t sum = 0;                                 /* Temporary result storage */
00078   uint32_t blkCnt;                               /* loop counter */
00079 
00080 #ifndef ARM_MATH_CM0_FAMILY
00081 
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083   q31_t in;
00084 
00085   /*loop Unrolling */
00086   blkCnt = blockSize >> 2u;
00087 
00088   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00089    ** a second loop below computes the remaining 1 to 3 samples. */
00090   while(blkCnt > 0u)
00091   {
00092     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00093     in = *__SIMD32(pSrc)++;
00094     sum += ((in << 16) >> 16);
00095     sum += (in >> 16);
00096     in = *__SIMD32(pSrc)++;
00097     sum += ((in << 16) >> 16);
00098     sum += (in >> 16);
00099 
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103 
00104   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00105    ** No loop unrolling is used. */
00106   blkCnt = blockSize % 0x4u;
00107 
00108 #else
00109 
00110   /* Run the below code for Cortex-M0 */
00111 
00112   /* Loop over blockSize number of values */
00113   blkCnt = blockSize;
00114 
00115 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00116 
00117   while(blkCnt > 0u)
00118   {
00119     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00120     sum += *pSrc++;
00121 
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125 
00126   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00127   /* Store the result to the destination */
00128   *pResult = (q15_t) (sum / (q31_t)blockSize);
00129 }
00130 
00131 /**    
00132  * @} end of mean group    
00133  */