arm_fir_init_q31.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_fir_init_q31.c    
00009 *    
00010 * Description:  Q31 FIR filter initialization function.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupFilters    
00045  */
00046 
00047 /**    
00048  * @addtogroup FIR    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @details    
00054  *    
00055  * @param[in,out] *S points to an instance of the Q31 FIR filter structure.    
00056  * @param[in]     numTaps  Number of filter coefficients in the filter.    
00057  * @param[in]     *pCoeffs points to the filter coefficients buffer.    
00058  * @param[in]     *pState points to the state buffer.    
00059  * @param[in]     blockSize number of samples that are processed per call.    
00060  * @return        none.    
00061  *    
00062  * <b>Description:</b>    
00063  * \par    
00064  * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:    
00065  * <pre>    
00066  *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
00067  * </pre>    
00068  * \par    
00069  * <code>pState</code> points to the array of state variables.    
00070  * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.    
00071  */
00072 
00073 void arm_fir_init_q31(
00074   arm_fir_instance_q31 * S,
00075   uint16_t numTaps,
00076   q31_t * pCoeffs,
00077   q31_t * pState,
00078   uint32_t blockSize)
00079 {
00080   /* Assign filter taps */
00081   S->numTaps = numTaps;
00082 
00083   /* Assign coefficient pointer */
00084   S->pCoeffs = pCoeffs;
00085 
00086   /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
00087   memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
00088 
00089   /* Assign state pointer */
00090   S->pState = pState;
00091 
00092 }
00093 
00094 /**    
00095  * @} end of FIR group    
00096  */