V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

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Show/hide line numbers arm_fill_q31.c Source File

arm_fill_q31.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014 
00005 * $Revision:    V1.4.3  
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_fill_q31.c    
00009 *    
00010 * Description:  Fills a constant value into a Q31 vector.   
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupSupport    
00045  */
00046 
00047 /**    
00048  * @addtogroup Fill    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Fills a constant value into a Q31 vector.    
00054  * @param[in]       value input value to be filled   
00055  * @param[out]      *pDst points to output vector    
00056  * @param[in]       blockSize length of the output vector   
00057  * @return none.    
00058  *    
00059  */
00060 
00061 void arm_fill_q31(
00062   q31_t value,
00063   q31_t * pDst,
00064   uint32_t blockSize)
00065 {
00066   uint32_t blkCnt;                               /* loop counter */
00067 
00068 
00069 #ifndef ARM_MATH_CM0_FAMILY
00070 
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   q31_t in1 = value;
00073   q31_t in2 = value;
00074   q31_t in3 = value;
00075   q31_t in4 = value;
00076 
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079 
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = value */
00085     /* Fill the value in the destination buffer */
00086     *pDst++ = in1;
00087     *pDst++ = in2;
00088     *pDst++ = in3;
00089     *pDst++ = in4;
00090 
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094 
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098 
00099 #else
00100 
00101   /* Run the below code for Cortex-M0 */
00102 
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105 
00106 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00107 
00108   while(blkCnt > 0u)
00109   {
00110     /* C = value */
00111     /* Fill the value in the destination buffer */
00112     *pDst++ = value;
00113 
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 }
00118 
00119 /**    
00120  * @} end of Fill group    
00121  */