V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

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Show/hide line numbers arm_cmplx_dot_prod_f32.c Source File

arm_cmplx_dot_prod_f32.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        12. March 2014
00005 * $Revision:    V1.4.3
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_cmplx_dot_prod_f32.c    
00009 *    
00010 * Description:  Floating-point complex dot product    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.    
00039 * ---------------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupCmplxMath    
00045  */
00046 
00047 /**    
00048  * @defgroup cmplx_dot_prod Complex Dot Product    
00049  *    
00050  * Computes the dot product of two complex vectors.    
00051  * The vectors are multiplied element-by-element and then summed.    
00052  *   
00053  * The <code>pSrcA</code> points to the first complex input vector and    
00054  * <code>pSrcB</code> points to the second complex input vector.    
00055  * <code>numSamples</code> specifies the number of complex samples    
00056  * and the data in each array is stored in an interleaved fashion    
00057  * (real, imag, real, imag, ...).    
00058  * Each array has a total of <code>2*numSamples</code> values.    
00059  *    
00060  * The underlying algorithm is used:    
00061  * <pre>    
00062  * realResult=0;    
00063  * imagResult=0;    
00064  * for(n=0; n<numSamples; n++) {    
00065  *     realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];    
00066  *     imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];    
00067  * }    
00068  * </pre>    
00069  *    
00070  * There are separate functions for floating-point, Q15, and Q31 data types.    
00071  */
00072 
00073 /**    
00074  * @addtogroup cmplx_dot_prod    
00075  * @{    
00076  */
00077 
00078 /**    
00079  * @brief  Floating-point complex dot product    
00080  * @param  *pSrcA points to the first input vector    
00081  * @param  *pSrcB points to the second input vector    
00082  * @param  numSamples number of complex samples in each vector    
00083  * @param  *realResult real part of the result returned here    
00084  * @param  *imagResult imaginary part of the result returned here    
00085  * @return none.    
00086  */
00087 
00088 void arm_cmplx_dot_prod_f32(
00089   float32_t * pSrcA,
00090   float32_t * pSrcB,
00091   uint32_t numSamples,
00092   float32_t * realResult,
00093   float32_t * imagResult)
00094 {
00095   float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
00096   float32_t a0,b0,c0,d0;
00097 
00098 #ifndef ARM_MATH_CM0_FAMILY
00099 
00100   /* Run the below code for Cortex-M4 and Cortex-M3 */
00101   uint32_t blkCnt;                               /* loop counter */
00102 
00103   /*loop Unrolling */
00104   blkCnt = numSamples >> 2u;
00105 
00106   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00107    ** a second loop below computes the remaining 1 to 3 samples. */
00108   while(blkCnt > 0u)
00109   {
00110       a0 = *pSrcA++;
00111       b0 = *pSrcA++;
00112       c0 = *pSrcB++;
00113       d0 = *pSrcB++;  
00114   
00115       real_sum += a0 * c0;
00116       imag_sum += a0 * d0;
00117       real_sum -= b0 * d0;
00118       imag_sum += b0 * c0;
00119     
00120       a0 = *pSrcA++;
00121       b0 = *pSrcA++;
00122       c0 = *pSrcB++;
00123       d0 = *pSrcB++; 
00124   
00125       real_sum += a0 * c0;
00126       imag_sum += a0 * d0;
00127       real_sum -= b0 * d0;
00128       imag_sum += b0 * c0;
00129       
00130       a0 = *pSrcA++;
00131       b0 = *pSrcA++;
00132       c0 = *pSrcB++;
00133       d0 = *pSrcB++;  
00134   
00135       real_sum += a0 * c0;
00136       imag_sum += a0 * d0;
00137       real_sum -= b0 * d0;
00138       imag_sum += b0 * c0;
00139     
00140       a0 = *pSrcA++;
00141       b0 = *pSrcA++;
00142       c0 = *pSrcB++;
00143       d0 = *pSrcB++; 
00144   
00145       real_sum += a0 * c0;
00146       imag_sum += a0 * d0;
00147       real_sum -= b0 * d0;
00148       imag_sum += b0 * c0;
00149 
00150       /* Decrement the loop counter */
00151       blkCnt--;
00152   }
00153 
00154   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
00155    ** No loop unrolling is used. */
00156   blkCnt = numSamples & 0x3u;
00157 
00158   while(blkCnt > 0u)
00159   {
00160       a0 = *pSrcA++;
00161       b0 = *pSrcA++;
00162       c0 = *pSrcB++;
00163       d0 = *pSrcB++;  
00164   
00165       real_sum += a0 * c0;
00166       imag_sum += a0 * d0;
00167       real_sum -= b0 * d0;
00168       imag_sum += b0 * c0;
00169 
00170       /* Decrement the loop counter */
00171       blkCnt--;
00172   }
00173 
00174 #else
00175 
00176   /* Run the below code for Cortex-M0 */
00177 
00178   while(numSamples > 0u)
00179   {
00180       a0 = *pSrcA++;
00181       b0 = *pSrcA++;
00182       c0 = *pSrcB++;
00183       d0 = *pSrcB++;  
00184   
00185       real_sum += a0 * c0;
00186       imag_sum += a0 * d0;
00187       real_sum -= b0 * d0;
00188       imag_sum += b0 * c0;
00189 
00190       /* Decrement the loop counter */
00191       numSamples--;
00192   }
00193 
00194 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00195 
00196   /* Store the real and imaginary results in the destination buffers */
00197   *realResult = real_sum;
00198   *imagResult = imag_sum;
00199 }
00200 
00201 /**    
00202  * @} end of cmplx_dot_prod group    
00203  */