Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

core_cmInstr.h@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /**************************************************************************//**
emh203 0:3d9c67d97d6f 2 * @file core_cmInstr.h
emh203 0:3d9c67d97d6f 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
emh203 0:3d9c67d97d6f 4 * @version V3.30
emh203 0:3d9c67d97d6f 5 * @date 17. February 2014
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * @note
emh203 0:3d9c67d97d6f 8 *
emh203 0:3d9c67d97d6f 9 ******************************************************************************/
emh203 0:3d9c67d97d6f 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
emh203 0:3d9c67d97d6f 11
emh203 0:3d9c67d97d6f 12 All rights reserved.
emh203 0:3d9c67d97d6f 13 Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 14 modification, are permitted provided that the following conditions are met:
emh203 0:3d9c67d97d6f 15 - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 16 notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 17 - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 18 notice, this list of conditions and the following disclaimer in the
emh203 0:3d9c67d97d6f 19 documentation and/or other materials provided with the distribution.
emh203 0:3d9c67d97d6f 20 - Neither the name of ARM nor the names of its contributors may be used
emh203 0:3d9c67d97d6f 21 to endorse or promote products derived from this software without
emh203 0:3d9c67d97d6f 22 specific prior written permission.
emh203 0:3d9c67d97d6f 23 *
emh203 0:3d9c67d97d6f 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emh203 0:3d9c67d97d6f 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emh203 0:3d9c67d97d6f 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
emh203 0:3d9c67d97d6f 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
emh203 0:3d9c67d97d6f 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
emh203 0:3d9c67d97d6f 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
emh203 0:3d9c67d97d6f 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
emh203 0:3d9c67d97d6f 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
emh203 0:3d9c67d97d6f 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
emh203 0:3d9c67d97d6f 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 34 POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 35 ---------------------------------------------------------------------------*/
emh203 0:3d9c67d97d6f 36
emh203 0:3d9c67d97d6f 37
emh203 0:3d9c67d97d6f 38 #ifndef __CORE_CMINSTR_H
emh203 0:3d9c67d97d6f 39 #define __CORE_CMINSTR_H
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 /* ########################## Core Instruction Access ######################### */
emh203 0:3d9c67d97d6f 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
emh203 0:3d9c67d97d6f 44 Access to dedicated instructions
emh203 0:3d9c67d97d6f 45 @{
emh203 0:3d9c67d97d6f 46 */
emh203 0:3d9c67d97d6f 47
emh203 0:3d9c67d97d6f 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
emh203 0:3d9c67d97d6f 49 /* ARM armcc specific functions */
emh203 0:3d9c67d97d6f 50
emh203 0:3d9c67d97d6f 51 #if (__ARMCC_VERSION < 400677)
emh203 0:3d9c67d97d6f 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
emh203 0:3d9c67d97d6f 53 #endif
emh203 0:3d9c67d97d6f 54
emh203 0:3d9c67d97d6f 55
emh203 0:3d9c67d97d6f 56 /** \brief No Operation
emh203 0:3d9c67d97d6f 57
emh203 0:3d9c67d97d6f 58 No Operation does nothing. This instruction can be used for code alignment purposes.
emh203 0:3d9c67d97d6f 59 */
emh203 0:3d9c67d97d6f 60 #define __NOP __nop
emh203 0:3d9c67d97d6f 61
emh203 0:3d9c67d97d6f 62
emh203 0:3d9c67d97d6f 63 /** \brief Wait For Interrupt
emh203 0:3d9c67d97d6f 64
emh203 0:3d9c67d97d6f 65 Wait For Interrupt is a hint instruction that suspends execution
emh203 0:3d9c67d97d6f 66 until one of a number of events occurs.
emh203 0:3d9c67d97d6f 67 */
emh203 0:3d9c67d97d6f 68 #define __WFI __wfi
emh203 0:3d9c67d97d6f 69
emh203 0:3d9c67d97d6f 70
emh203 0:3d9c67d97d6f 71 /** \brief Wait For Event
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 Wait For Event is a hint instruction that permits the processor to enter
emh203 0:3d9c67d97d6f 74 a low-power state until one of a number of events occurs.
emh203 0:3d9c67d97d6f 75 */
emh203 0:3d9c67d97d6f 76 #define __WFE __wfe
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 /** \brief Send Event
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emh203 0:3d9c67d97d6f 82 */
emh203 0:3d9c67d97d6f 83 #define __SEV __sev
emh203 0:3d9c67d97d6f 84
emh203 0:3d9c67d97d6f 85
emh203 0:3d9c67d97d6f 86 /** \brief Instruction Synchronization Barrier
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
emh203 0:3d9c67d97d6f 89 so that all instructions following the ISB are fetched from cache or
emh203 0:3d9c67d97d6f 90 memory, after the instruction has been completed.
emh203 0:3d9c67d97d6f 91 */
emh203 0:3d9c67d97d6f 92 #define __ISB() __isb(0xF)
emh203 0:3d9c67d97d6f 93
emh203 0:3d9c67d97d6f 94
emh203 0:3d9c67d97d6f 95 /** \brief Data Synchronization Barrier
emh203 0:3d9c67d97d6f 96
emh203 0:3d9c67d97d6f 97 This function acts as a special kind of Data Memory Barrier.
emh203 0:3d9c67d97d6f 98 It completes when all explicit memory accesses before this instruction complete.
emh203 0:3d9c67d97d6f 99 */
emh203 0:3d9c67d97d6f 100 #define __DSB() __dsb(0xF)
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /** \brief Data Memory Barrier
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 This function ensures the apparent order of the explicit memory operations before
emh203 0:3d9c67d97d6f 106 and after the instruction, without ensuring their completion.
emh203 0:3d9c67d97d6f 107 */
emh203 0:3d9c67d97d6f 108 #define __DMB() __dmb(0xF)
emh203 0:3d9c67d97d6f 109
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 /** \brief Reverse byte order (32 bit)
emh203 0:3d9c67d97d6f 112
emh203 0:3d9c67d97d6f 113 This function reverses the byte order in integer value.
emh203 0:3d9c67d97d6f 114
emh203 0:3d9c67d97d6f 115 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 116 \return Reversed value
emh203 0:3d9c67d97d6f 117 */
emh203 0:3d9c67d97d6f 118 #define __REV __rev
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121 /** \brief Reverse byte order (16 bit)
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 This function reverses the byte order in two unsigned short values.
emh203 0:3d9c67d97d6f 124
emh203 0:3d9c67d97d6f 125 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 126 \return Reversed value
emh203 0:3d9c67d97d6f 127 */
emh203 0:3d9c67d97d6f 128 #ifndef __NO_EMBEDDED_ASM
emh203 0:3d9c67d97d6f 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
emh203 0:3d9c67d97d6f 130 {
emh203 0:3d9c67d97d6f 131 rev16 r0, r0
emh203 0:3d9c67d97d6f 132 bx lr
emh203 0:3d9c67d97d6f 133 }
emh203 0:3d9c67d97d6f 134 #endif
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /** \brief Reverse byte order in signed short value
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 This function reverses the byte order in a signed short value with sign extension to integer.
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 141 \return Reversed value
emh203 0:3d9c67d97d6f 142 */
emh203 0:3d9c67d97d6f 143 #ifndef __NO_EMBEDDED_ASM
emh203 0:3d9c67d97d6f 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
emh203 0:3d9c67d97d6f 145 {
emh203 0:3d9c67d97d6f 146 revsh r0, r0
emh203 0:3d9c67d97d6f 147 bx lr
emh203 0:3d9c67d97d6f 148 }
emh203 0:3d9c67d97d6f 149 #endif
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /** \brief Rotate Right in unsigned value (32 bit)
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 \param [in] value Value to rotate
emh203 0:3d9c67d97d6f 157 \param [in] value Number of Bits to rotate
emh203 0:3d9c67d97d6f 158 \return Rotated value
emh203 0:3d9c67d97d6f 159 */
emh203 0:3d9c67d97d6f 160 #define __ROR __ror
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162
emh203 0:3d9c67d97d6f 163 /** \brief Breakpoint
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 This function causes the processor to enter Debug state.
emh203 0:3d9c67d97d6f 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emh203 0:3d9c67d97d6f 167
emh203 0:3d9c67d97d6f 168 \param [in] value is ignored by the processor.
emh203 0:3d9c67d97d6f 169 If required, a debugger can use it to store additional information about the breakpoint.
emh203 0:3d9c67d97d6f 170 */
emh203 0:3d9c67d97d6f 171 #define __BKPT(value) __breakpoint(value)
emh203 0:3d9c67d97d6f 172
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 #if (__CORTEX_M >= 0x03)
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 /** \brief Reverse bit order of value
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 This function reverses the bit order of the given value.
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 181 \return Reversed value
emh203 0:3d9c67d97d6f 182 */
emh203 0:3d9c67d97d6f 183 #define __RBIT __rbit
emh203 0:3d9c67d97d6f 184
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186 /** \brief LDR Exclusive (8 bit)
emh203 0:3d9c67d97d6f 187
emh203 0:3d9c67d97d6f 188 This function performs a exclusive LDR command for 8 bit value.
emh203 0:3d9c67d97d6f 189
emh203 0:3d9c67d97d6f 190 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 191 \return value of type uint8_t at (*ptr)
emh203 0:3d9c67d97d6f 192 */
emh203 0:3d9c67d97d6f 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195
emh203 0:3d9c67d97d6f 196 /** \brief LDR Exclusive (16 bit)
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 This function performs a exclusive LDR command for 16 bit values.
emh203 0:3d9c67d97d6f 199
emh203 0:3d9c67d97d6f 200 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 201 \return value of type uint16_t at (*ptr)
emh203 0:3d9c67d97d6f 202 */
emh203 0:3d9c67d97d6f 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
emh203 0:3d9c67d97d6f 204
emh203 0:3d9c67d97d6f 205
emh203 0:3d9c67d97d6f 206 /** \brief LDR Exclusive (32 bit)
emh203 0:3d9c67d97d6f 207
emh203 0:3d9c67d97d6f 208 This function performs a exclusive LDR command for 32 bit values.
emh203 0:3d9c67d97d6f 209
emh203 0:3d9c67d97d6f 210 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 211 \return value of type uint32_t at (*ptr)
emh203 0:3d9c67d97d6f 212 */
emh203 0:3d9c67d97d6f 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
emh203 0:3d9c67d97d6f 214
emh203 0:3d9c67d97d6f 215
emh203 0:3d9c67d97d6f 216 /** \brief STR Exclusive (8 bit)
emh203 0:3d9c67d97d6f 217
emh203 0:3d9c67d97d6f 218 This function performs a exclusive STR command for 8 bit values.
emh203 0:3d9c67d97d6f 219
emh203 0:3d9c67d97d6f 220 \param [in] value Value to store
emh203 0:3d9c67d97d6f 221 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 222 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 223 \return 1 Function failed
emh203 0:3d9c67d97d6f 224 */
emh203 0:3d9c67d97d6f 225 #define __STREXB(value, ptr) __strex(value, ptr)
emh203 0:3d9c67d97d6f 226
emh203 0:3d9c67d97d6f 227
emh203 0:3d9c67d97d6f 228 /** \brief STR Exclusive (16 bit)
emh203 0:3d9c67d97d6f 229
emh203 0:3d9c67d97d6f 230 This function performs a exclusive STR command for 16 bit values.
emh203 0:3d9c67d97d6f 231
emh203 0:3d9c67d97d6f 232 \param [in] value Value to store
emh203 0:3d9c67d97d6f 233 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 234 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 235 \return 1 Function failed
emh203 0:3d9c67d97d6f 236 */
emh203 0:3d9c67d97d6f 237 #define __STREXH(value, ptr) __strex(value, ptr)
emh203 0:3d9c67d97d6f 238
emh203 0:3d9c67d97d6f 239
emh203 0:3d9c67d97d6f 240 /** \brief STR Exclusive (32 bit)
emh203 0:3d9c67d97d6f 241
emh203 0:3d9c67d97d6f 242 This function performs a exclusive STR command for 32 bit values.
emh203 0:3d9c67d97d6f 243
emh203 0:3d9c67d97d6f 244 \param [in] value Value to store
emh203 0:3d9c67d97d6f 245 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 246 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 247 \return 1 Function failed
emh203 0:3d9c67d97d6f 248 */
emh203 0:3d9c67d97d6f 249 #define __STREXW(value, ptr) __strex(value, ptr)
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251
emh203 0:3d9c67d97d6f 252 /** \brief Remove the exclusive lock
emh203 0:3d9c67d97d6f 253
emh203 0:3d9c67d97d6f 254 This function removes the exclusive lock which is created by LDREX.
emh203 0:3d9c67d97d6f 255
emh203 0:3d9c67d97d6f 256 */
emh203 0:3d9c67d97d6f 257 #define __CLREX __clrex
emh203 0:3d9c67d97d6f 258
emh203 0:3d9c67d97d6f 259
emh203 0:3d9c67d97d6f 260 /** \brief Signed Saturate
emh203 0:3d9c67d97d6f 261
emh203 0:3d9c67d97d6f 262 This function saturates a signed value.
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 \param [in] value Value to be saturated
emh203 0:3d9c67d97d6f 265 \param [in] sat Bit position to saturate to (1..32)
emh203 0:3d9c67d97d6f 266 \return Saturated value
emh203 0:3d9c67d97d6f 267 */
emh203 0:3d9c67d97d6f 268 #define __SSAT __ssat
emh203 0:3d9c67d97d6f 269
emh203 0:3d9c67d97d6f 270
emh203 0:3d9c67d97d6f 271 /** \brief Unsigned Saturate
emh203 0:3d9c67d97d6f 272
emh203 0:3d9c67d97d6f 273 This function saturates an unsigned value.
emh203 0:3d9c67d97d6f 274
emh203 0:3d9c67d97d6f 275 \param [in] value Value to be saturated
emh203 0:3d9c67d97d6f 276 \param [in] sat Bit position to saturate to (0..31)
emh203 0:3d9c67d97d6f 277 \return Saturated value
emh203 0:3d9c67d97d6f 278 */
emh203 0:3d9c67d97d6f 279 #define __USAT __usat
emh203 0:3d9c67d97d6f 280
emh203 0:3d9c67d97d6f 281
emh203 0:3d9c67d97d6f 282 /** \brief Count leading zeros
emh203 0:3d9c67d97d6f 283
emh203 0:3d9c67d97d6f 284 This function counts the number of leading zeros of a data value.
emh203 0:3d9c67d97d6f 285
emh203 0:3d9c67d97d6f 286 \param [in] value Value to count the leading zeros
emh203 0:3d9c67d97d6f 287 \return number of leading zeros in value
emh203 0:3d9c67d97d6f 288 */
emh203 0:3d9c67d97d6f 289 #define __CLZ __clz
emh203 0:3d9c67d97d6f 290
emh203 0:3d9c67d97d6f 291 #endif /* (__CORTEX_M >= 0x03) */
emh203 0:3d9c67d97d6f 292
emh203 0:3d9c67d97d6f 293
emh203 0:3d9c67d97d6f 294 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
emh203 0:3d9c67d97d6f 295 /* GNU gcc specific functions */
emh203 0:3d9c67d97d6f 296
emh203 0:3d9c67d97d6f 297 /* Define macros for porting to both thumb1 and thumb2.
emh203 0:3d9c67d97d6f 298 * For thumb1, use low register (r0-r7), specified by constrant "l"
emh203 0:3d9c67d97d6f 299 * Otherwise, use general registers, specified by constrant "r" */
emh203 0:3d9c67d97d6f 300 #if defined (__thumb__) && !defined (__thumb2__)
emh203 0:3d9c67d97d6f 301 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
emh203 0:3d9c67d97d6f 302 #define __CMSIS_GCC_USE_REG(r) "l" (r)
emh203 0:3d9c67d97d6f 303 #else
emh203 0:3d9c67d97d6f 304 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
emh203 0:3d9c67d97d6f 305 #define __CMSIS_GCC_USE_REG(r) "r" (r)
emh203 0:3d9c67d97d6f 306 #endif
emh203 0:3d9c67d97d6f 307
emh203 0:3d9c67d97d6f 308 /** \brief No Operation
emh203 0:3d9c67d97d6f 309
emh203 0:3d9c67d97d6f 310 No Operation does nothing. This instruction can be used for code alignment purposes.
emh203 0:3d9c67d97d6f 311 */
emh203 0:3d9c67d97d6f 312 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
emh203 0:3d9c67d97d6f 313 {
emh203 0:3d9c67d97d6f 314 __ASM volatile ("nop");
emh203 0:3d9c67d97d6f 315 }
emh203 0:3d9c67d97d6f 316
emh203 0:3d9c67d97d6f 317
emh203 0:3d9c67d97d6f 318 /** \brief Wait For Interrupt
emh203 0:3d9c67d97d6f 319
emh203 0:3d9c67d97d6f 320 Wait For Interrupt is a hint instruction that suspends execution
emh203 0:3d9c67d97d6f 321 until one of a number of events occurs.
emh203 0:3d9c67d97d6f 322 */
emh203 0:3d9c67d97d6f 323 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
emh203 0:3d9c67d97d6f 324 {
emh203 0:3d9c67d97d6f 325 __ASM volatile ("wfi");
emh203 0:3d9c67d97d6f 326 }
emh203 0:3d9c67d97d6f 327
emh203 0:3d9c67d97d6f 328
emh203 0:3d9c67d97d6f 329 /** \brief Wait For Event
emh203 0:3d9c67d97d6f 330
emh203 0:3d9c67d97d6f 331 Wait For Event is a hint instruction that permits the processor to enter
emh203 0:3d9c67d97d6f 332 a low-power state until one of a number of events occurs.
emh203 0:3d9c67d97d6f 333 */
emh203 0:3d9c67d97d6f 334 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
emh203 0:3d9c67d97d6f 335 {
emh203 0:3d9c67d97d6f 336 __ASM volatile ("wfe");
emh203 0:3d9c67d97d6f 337 }
emh203 0:3d9c67d97d6f 338
emh203 0:3d9c67d97d6f 339
emh203 0:3d9c67d97d6f 340 /** \brief Send Event
emh203 0:3d9c67d97d6f 341
emh203 0:3d9c67d97d6f 342 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emh203 0:3d9c67d97d6f 343 */
emh203 0:3d9c67d97d6f 344 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
emh203 0:3d9c67d97d6f 345 {
emh203 0:3d9c67d97d6f 346 __ASM volatile ("sev");
emh203 0:3d9c67d97d6f 347 }
emh203 0:3d9c67d97d6f 348
emh203 0:3d9c67d97d6f 349
emh203 0:3d9c67d97d6f 350 /** \brief Instruction Synchronization Barrier
emh203 0:3d9c67d97d6f 351
emh203 0:3d9c67d97d6f 352 Instruction Synchronization Barrier flushes the pipeline in the processor,
emh203 0:3d9c67d97d6f 353 so that all instructions following the ISB are fetched from cache or
emh203 0:3d9c67d97d6f 354 memory, after the instruction has been completed.
emh203 0:3d9c67d97d6f 355 */
emh203 0:3d9c67d97d6f 356 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
emh203 0:3d9c67d97d6f 357 {
emh203 0:3d9c67d97d6f 358 __ASM volatile ("isb");
emh203 0:3d9c67d97d6f 359 }
emh203 0:3d9c67d97d6f 360
emh203 0:3d9c67d97d6f 361
emh203 0:3d9c67d97d6f 362 /** \brief Data Synchronization Barrier
emh203 0:3d9c67d97d6f 363
emh203 0:3d9c67d97d6f 364 This function acts as a special kind of Data Memory Barrier.
emh203 0:3d9c67d97d6f 365 It completes when all explicit memory accesses before this instruction complete.
emh203 0:3d9c67d97d6f 366 */
emh203 0:3d9c67d97d6f 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
emh203 0:3d9c67d97d6f 368 {
emh203 0:3d9c67d97d6f 369 __ASM volatile ("dsb");
emh203 0:3d9c67d97d6f 370 }
emh203 0:3d9c67d97d6f 371
emh203 0:3d9c67d97d6f 372
emh203 0:3d9c67d97d6f 373 /** \brief Data Memory Barrier
emh203 0:3d9c67d97d6f 374
emh203 0:3d9c67d97d6f 375 This function ensures the apparent order of the explicit memory operations before
emh203 0:3d9c67d97d6f 376 and after the instruction, without ensuring their completion.
emh203 0:3d9c67d97d6f 377 */
emh203 0:3d9c67d97d6f 378 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
emh203 0:3d9c67d97d6f 379 {
emh203 0:3d9c67d97d6f 380 __ASM volatile ("dmb");
emh203 0:3d9c67d97d6f 381 }
emh203 0:3d9c67d97d6f 382
emh203 0:3d9c67d97d6f 383
emh203 0:3d9c67d97d6f 384 /** \brief Reverse byte order (32 bit)
emh203 0:3d9c67d97d6f 385
emh203 0:3d9c67d97d6f 386 This function reverses the byte order in integer value.
emh203 0:3d9c67d97d6f 387
emh203 0:3d9c67d97d6f 388 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 389 \return Reversed value
emh203 0:3d9c67d97d6f 390 */
emh203 0:3d9c67d97d6f 391 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
emh203 0:3d9c67d97d6f 392 {
emh203 0:3d9c67d97d6f 393 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
emh203 0:3d9c67d97d6f 394 return __builtin_bswap32(value);
emh203 0:3d9c67d97d6f 395 #else
emh203 0:3d9c67d97d6f 396 uint32_t result;
emh203 0:3d9c67d97d6f 397
emh203 0:3d9c67d97d6f 398 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emh203 0:3d9c67d97d6f 399 return(result);
emh203 0:3d9c67d97d6f 400 #endif
emh203 0:3d9c67d97d6f 401 }
emh203 0:3d9c67d97d6f 402
emh203 0:3d9c67d97d6f 403
emh203 0:3d9c67d97d6f 404 /** \brief Reverse byte order (16 bit)
emh203 0:3d9c67d97d6f 405
emh203 0:3d9c67d97d6f 406 This function reverses the byte order in two unsigned short values.
emh203 0:3d9c67d97d6f 407
emh203 0:3d9c67d97d6f 408 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 409 \return Reversed value
emh203 0:3d9c67d97d6f 410 */
emh203 0:3d9c67d97d6f 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
emh203 0:3d9c67d97d6f 412 {
emh203 0:3d9c67d97d6f 413 uint32_t result;
emh203 0:3d9c67d97d6f 414
emh203 0:3d9c67d97d6f 415 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emh203 0:3d9c67d97d6f 416 return(result);
emh203 0:3d9c67d97d6f 417 }
emh203 0:3d9c67d97d6f 418
emh203 0:3d9c67d97d6f 419
emh203 0:3d9c67d97d6f 420 /** \brief Reverse byte order in signed short value
emh203 0:3d9c67d97d6f 421
emh203 0:3d9c67d97d6f 422 This function reverses the byte order in a signed short value with sign extension to integer.
emh203 0:3d9c67d97d6f 423
emh203 0:3d9c67d97d6f 424 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 425 \return Reversed value
emh203 0:3d9c67d97d6f 426 */
emh203 0:3d9c67d97d6f 427 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
emh203 0:3d9c67d97d6f 428 {
emh203 0:3d9c67d97d6f 429 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emh203 0:3d9c67d97d6f 430 return (short)__builtin_bswap16(value);
emh203 0:3d9c67d97d6f 431 #else
emh203 0:3d9c67d97d6f 432 uint32_t result;
emh203 0:3d9c67d97d6f 433
emh203 0:3d9c67d97d6f 434 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emh203 0:3d9c67d97d6f 435 return(result);
emh203 0:3d9c67d97d6f 436 #endif
emh203 0:3d9c67d97d6f 437 }
emh203 0:3d9c67d97d6f 438
emh203 0:3d9c67d97d6f 439
emh203 0:3d9c67d97d6f 440 /** \brief Rotate Right in unsigned value (32 bit)
emh203 0:3d9c67d97d6f 441
emh203 0:3d9c67d97d6f 442 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emh203 0:3d9c67d97d6f 443
emh203 0:3d9c67d97d6f 444 \param [in] value Value to rotate
emh203 0:3d9c67d97d6f 445 \param [in] value Number of Bits to rotate
emh203 0:3d9c67d97d6f 446 \return Rotated value
emh203 0:3d9c67d97d6f 447 */
emh203 0:3d9c67d97d6f 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
emh203 0:3d9c67d97d6f 449 {
emh203 0:3d9c67d97d6f 450 return (op1 >> op2) | (op1 << (32 - op2));
emh203 0:3d9c67d97d6f 451 }
emh203 0:3d9c67d97d6f 452
emh203 0:3d9c67d97d6f 453
emh203 0:3d9c67d97d6f 454 /** \brief Breakpoint
emh203 0:3d9c67d97d6f 455
emh203 0:3d9c67d97d6f 456 This function causes the processor to enter Debug state.
emh203 0:3d9c67d97d6f 457 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emh203 0:3d9c67d97d6f 458
emh203 0:3d9c67d97d6f 459 \param [in] value is ignored by the processor.
emh203 0:3d9c67d97d6f 460 If required, a debugger can use it to store additional information about the breakpoint.
emh203 0:3d9c67d97d6f 461 */
emh203 0:3d9c67d97d6f 462 #define __BKPT(value) __ASM volatile ("bkpt "#value)
emh203 0:3d9c67d97d6f 463
emh203 0:3d9c67d97d6f 464
emh203 0:3d9c67d97d6f 465 #if (__CORTEX_M >= 0x03)
emh203 0:3d9c67d97d6f 466
emh203 0:3d9c67d97d6f 467 /** \brief Reverse bit order of value
emh203 0:3d9c67d97d6f 468
emh203 0:3d9c67d97d6f 469 This function reverses the bit order of the given value.
emh203 0:3d9c67d97d6f 470
emh203 0:3d9c67d97d6f 471 \param [in] value Value to reverse
emh203 0:3d9c67d97d6f 472 \return Reversed value
emh203 0:3d9c67d97d6f 473 */
emh203 0:3d9c67d97d6f 474 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
emh203 0:3d9c67d97d6f 475 {
emh203 0:3d9c67d97d6f 476 uint32_t result;
emh203 0:3d9c67d97d6f 477
emh203 0:3d9c67d97d6f 478 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
emh203 0:3d9c67d97d6f 479 return(result);
emh203 0:3d9c67d97d6f 480 }
emh203 0:3d9c67d97d6f 481
emh203 0:3d9c67d97d6f 482
emh203 0:3d9c67d97d6f 483 /** \brief LDR Exclusive (8 bit)
emh203 0:3d9c67d97d6f 484
emh203 0:3d9c67d97d6f 485 This function performs a exclusive LDR command for 8 bit value.
emh203 0:3d9c67d97d6f 486
emh203 0:3d9c67d97d6f 487 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 488 \return value of type uint8_t at (*ptr)
emh203 0:3d9c67d97d6f 489 */
emh203 0:3d9c67d97d6f 490 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
emh203 0:3d9c67d97d6f 491 {
emh203 0:3d9c67d97d6f 492 uint32_t result;
emh203 0:3d9c67d97d6f 493
emh203 0:3d9c67d97d6f 494 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emh203 0:3d9c67d97d6f 495 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
emh203 0:3d9c67d97d6f 496 #else
emh203 0:3d9c67d97d6f 497 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emh203 0:3d9c67d97d6f 498 accepted by assembler. So has to use following less efficient pattern.
emh203 0:3d9c67d97d6f 499 */
emh203 0:3d9c67d97d6f 500 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emh203 0:3d9c67d97d6f 501 #endif
emh203 0:3d9c67d97d6f 502 return ((uint8_t) result); /* Add explicit type cast here */
emh203 0:3d9c67d97d6f 503 }
emh203 0:3d9c67d97d6f 504
emh203 0:3d9c67d97d6f 505
emh203 0:3d9c67d97d6f 506 /** \brief LDR Exclusive (16 bit)
emh203 0:3d9c67d97d6f 507
emh203 0:3d9c67d97d6f 508 This function performs a exclusive LDR command for 16 bit values.
emh203 0:3d9c67d97d6f 509
emh203 0:3d9c67d97d6f 510 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 511 \return value of type uint16_t at (*ptr)
emh203 0:3d9c67d97d6f 512 */
emh203 0:3d9c67d97d6f 513 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
emh203 0:3d9c67d97d6f 514 {
emh203 0:3d9c67d97d6f 515 uint32_t result;
emh203 0:3d9c67d97d6f 516
emh203 0:3d9c67d97d6f 517 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emh203 0:3d9c67d97d6f 518 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
emh203 0:3d9c67d97d6f 519 #else
emh203 0:3d9c67d97d6f 520 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emh203 0:3d9c67d97d6f 521 accepted by assembler. So has to use following less efficient pattern.
emh203 0:3d9c67d97d6f 522 */
emh203 0:3d9c67d97d6f 523 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emh203 0:3d9c67d97d6f 524 #endif
emh203 0:3d9c67d97d6f 525 return ((uint16_t) result); /* Add explicit type cast here */
emh203 0:3d9c67d97d6f 526 }
emh203 0:3d9c67d97d6f 527
emh203 0:3d9c67d97d6f 528
emh203 0:3d9c67d97d6f 529 /** \brief LDR Exclusive (32 bit)
emh203 0:3d9c67d97d6f 530
emh203 0:3d9c67d97d6f 531 This function performs a exclusive LDR command for 32 bit values.
emh203 0:3d9c67d97d6f 532
emh203 0:3d9c67d97d6f 533 \param [in] ptr Pointer to data
emh203 0:3d9c67d97d6f 534 \return value of type uint32_t at (*ptr)
emh203 0:3d9c67d97d6f 535 */
emh203 0:3d9c67d97d6f 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
emh203 0:3d9c67d97d6f 537 {
emh203 0:3d9c67d97d6f 538 uint32_t result;
emh203 0:3d9c67d97d6f 539
emh203 0:3d9c67d97d6f 540 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
emh203 0:3d9c67d97d6f 541 return(result);
emh203 0:3d9c67d97d6f 542 }
emh203 0:3d9c67d97d6f 543
emh203 0:3d9c67d97d6f 544
emh203 0:3d9c67d97d6f 545 /** \brief STR Exclusive (8 bit)
emh203 0:3d9c67d97d6f 546
emh203 0:3d9c67d97d6f 547 This function performs a exclusive STR command for 8 bit values.
emh203 0:3d9c67d97d6f 548
emh203 0:3d9c67d97d6f 549 \param [in] value Value to store
emh203 0:3d9c67d97d6f 550 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 551 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 552 \return 1 Function failed
emh203 0:3d9c67d97d6f 553 */
emh203 0:3d9c67d97d6f 554 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
emh203 0:3d9c67d97d6f 555 {
emh203 0:3d9c67d97d6f 556 uint32_t result;
emh203 0:3d9c67d97d6f 557
emh203 0:3d9c67d97d6f 558 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emh203 0:3d9c67d97d6f 559 return(result);
emh203 0:3d9c67d97d6f 560 }
emh203 0:3d9c67d97d6f 561
emh203 0:3d9c67d97d6f 562
emh203 0:3d9c67d97d6f 563 /** \brief STR Exclusive (16 bit)
emh203 0:3d9c67d97d6f 564
emh203 0:3d9c67d97d6f 565 This function performs a exclusive STR command for 16 bit values.
emh203 0:3d9c67d97d6f 566
emh203 0:3d9c67d97d6f 567 \param [in] value Value to store
emh203 0:3d9c67d97d6f 568 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 569 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 570 \return 1 Function failed
emh203 0:3d9c67d97d6f 571 */
emh203 0:3d9c67d97d6f 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
emh203 0:3d9c67d97d6f 573 {
emh203 0:3d9c67d97d6f 574 uint32_t result;
emh203 0:3d9c67d97d6f 575
emh203 0:3d9c67d97d6f 576 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emh203 0:3d9c67d97d6f 577 return(result);
emh203 0:3d9c67d97d6f 578 }
emh203 0:3d9c67d97d6f 579
emh203 0:3d9c67d97d6f 580
emh203 0:3d9c67d97d6f 581 /** \brief STR Exclusive (32 bit)
emh203 0:3d9c67d97d6f 582
emh203 0:3d9c67d97d6f 583 This function performs a exclusive STR command for 32 bit values.
emh203 0:3d9c67d97d6f 584
emh203 0:3d9c67d97d6f 585 \param [in] value Value to store
emh203 0:3d9c67d97d6f 586 \param [in] ptr Pointer to location
emh203 0:3d9c67d97d6f 587 \return 0 Function succeeded
emh203 0:3d9c67d97d6f 588 \return 1 Function failed
emh203 0:3d9c67d97d6f 589 */
emh203 0:3d9c67d97d6f 590 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
emh203 0:3d9c67d97d6f 591 {
emh203 0:3d9c67d97d6f 592 uint32_t result;
emh203 0:3d9c67d97d6f 593
emh203 0:3d9c67d97d6f 594 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
emh203 0:3d9c67d97d6f 595 return(result);
emh203 0:3d9c67d97d6f 596 }
emh203 0:3d9c67d97d6f 597
emh203 0:3d9c67d97d6f 598
emh203 0:3d9c67d97d6f 599 /** \brief Remove the exclusive lock
emh203 0:3d9c67d97d6f 600
emh203 0:3d9c67d97d6f 601 This function removes the exclusive lock which is created by LDREX.
emh203 0:3d9c67d97d6f 602
emh203 0:3d9c67d97d6f 603 */
emh203 0:3d9c67d97d6f 604 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
emh203 0:3d9c67d97d6f 605 {
emh203 0:3d9c67d97d6f 606 __ASM volatile ("clrex" ::: "memory");
emh203 0:3d9c67d97d6f 607 }
emh203 0:3d9c67d97d6f 608
emh203 0:3d9c67d97d6f 609
emh203 0:3d9c67d97d6f 610 /** \brief Signed Saturate
emh203 0:3d9c67d97d6f 611
emh203 0:3d9c67d97d6f 612 This function saturates a signed value.
emh203 0:3d9c67d97d6f 613
emh203 0:3d9c67d97d6f 614 \param [in] value Value to be saturated
emh203 0:3d9c67d97d6f 615 \param [in] sat Bit position to saturate to (1..32)
emh203 0:3d9c67d97d6f 616 \return Saturated value
emh203 0:3d9c67d97d6f 617 */
emh203 0:3d9c67d97d6f 618 #define __SSAT(ARG1,ARG2) \
emh203 0:3d9c67d97d6f 619 ({ \
emh203 0:3d9c67d97d6f 620 uint32_t __RES, __ARG1 = (ARG1); \
emh203 0:3d9c67d97d6f 621 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emh203 0:3d9c67d97d6f 622 __RES; \
emh203 0:3d9c67d97d6f 623 })
emh203 0:3d9c67d97d6f 624
emh203 0:3d9c67d97d6f 625
emh203 0:3d9c67d97d6f 626 /** \brief Unsigned Saturate
emh203 0:3d9c67d97d6f 627
emh203 0:3d9c67d97d6f 628 This function saturates an unsigned value.
emh203 0:3d9c67d97d6f 629
emh203 0:3d9c67d97d6f 630 \param [in] value Value to be saturated
emh203 0:3d9c67d97d6f 631 \param [in] sat Bit position to saturate to (0..31)
emh203 0:3d9c67d97d6f 632 \return Saturated value
emh203 0:3d9c67d97d6f 633 */
emh203 0:3d9c67d97d6f 634 #define __USAT(ARG1,ARG2) \
emh203 0:3d9c67d97d6f 635 ({ \
emh203 0:3d9c67d97d6f 636 uint32_t __RES, __ARG1 = (ARG1); \
emh203 0:3d9c67d97d6f 637 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emh203 0:3d9c67d97d6f 638 __RES; \
emh203 0:3d9c67d97d6f 639 })
emh203 0:3d9c67d97d6f 640
emh203 0:3d9c67d97d6f 641
emh203 0:3d9c67d97d6f 642 /** \brief Count leading zeros
emh203 0:3d9c67d97d6f 643
emh203 0:3d9c67d97d6f 644 This function counts the number of leading zeros of a data value.
emh203 0:3d9c67d97d6f 645
emh203 0:3d9c67d97d6f 646 \param [in] value Value to count the leading zeros
emh203 0:3d9c67d97d6f 647 \return number of leading zeros in value
emh203 0:3d9c67d97d6f 648 */
emh203 0:3d9c67d97d6f 649 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
emh203 0:3d9c67d97d6f 650 {
emh203 0:3d9c67d97d6f 651 uint32_t result;
emh203 0:3d9c67d97d6f 652
emh203 0:3d9c67d97d6f 653 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
emh203 0:3d9c67d97d6f 654 return ((uint8_t) result); /* Add explicit type cast here */
emh203 0:3d9c67d97d6f 655 }
emh203 0:3d9c67d97d6f 656
emh203 0:3d9c67d97d6f 657 #endif /* (__CORTEX_M >= 0x03) */
emh203 0:3d9c67d97d6f 658
emh203 0:3d9c67d97d6f 659
emh203 0:3d9c67d97d6f 660 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
emh203 0:3d9c67d97d6f 661 /* IAR iccarm specific functions */
emh203 0:3d9c67d97d6f 662 #include <cmsis_iar.h>
emh203 0:3d9c67d97d6f 663
emh203 0:3d9c67d97d6f 664
emh203 0:3d9c67d97d6f 665 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
emh203 0:3d9c67d97d6f 666 /* TI CCS specific functions */
emh203 0:3d9c67d97d6f 667 #include <cmsis_ccs.h>
emh203 0:3d9c67d97d6f 668
emh203 0:3d9c67d97d6f 669
emh203 0:3d9c67d97d6f 670 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
emh203 0:3d9c67d97d6f 671 /* TASKING carm specific functions */
emh203 0:3d9c67d97d6f 672 /*
emh203 0:3d9c67d97d6f 673 * The CMSIS functions have been implemented as intrinsics in the compiler.
emh203 0:3d9c67d97d6f 674 * Please use "carm -?i" to get an up to date list of all intrinsics,
emh203 0:3d9c67d97d6f 675 * Including the CMSIS ones.
emh203 0:3d9c67d97d6f 676 */
emh203 0:3d9c67d97d6f 677
emh203 0:3d9c67d97d6f 678
emh203 0:3d9c67d97d6f 679 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
emh203 0:3d9c67d97d6f 680 /* Cosmic specific functions */
emh203 0:3d9c67d97d6f 681 #include <cmsis_csm.h>
emh203 0:3d9c67d97d6f 682
emh203 0:3d9c67d97d6f 683 #endif
emh203 0:3d9c67d97d6f 684
emh203 0:3d9c67d97d6f 685 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
emh203 0:3d9c67d97d6f 686
emh203 0:3d9c67d97d6f 687 #endif /* __CORE_CMINSTR_H */