V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.
Dependents: MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more
core_cmFunc.h@0:3d9c67d97d6f, 2014-07-28 (annotated)
- Committer:
- emh203
- Date:
- Mon Jul 28 15:03:15 2014 +0000
- Revision:
- 0:3d9c67d97d6f
1st working commit. Had to remove arm_bitreversal2.s arm_cfft_f32.c and arm_rfft_fast_f32.c. The .s will not assemble. For now I removed these functions so we could at least have a library for the other functions.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emh203 | 0:3d9c67d97d6f | 1 | /**************************************************************************//** |
emh203 | 0:3d9c67d97d6f | 2 | * @file core_cmFunc.h |
emh203 | 0:3d9c67d97d6f | 3 | * @brief CMSIS Cortex-M Core Function Access Header File |
emh203 | 0:3d9c67d97d6f | 4 | * @version V3.30 |
emh203 | 0:3d9c67d97d6f | 5 | * @date 17. February 2014 |
emh203 | 0:3d9c67d97d6f | 6 | * |
emh203 | 0:3d9c67d97d6f | 7 | * @note |
emh203 | 0:3d9c67d97d6f | 8 | * |
emh203 | 0:3d9c67d97d6f | 9 | ******************************************************************************/ |
emh203 | 0:3d9c67d97d6f | 10 | /* Copyright (c) 2009 - 2014 ARM LIMITED |
emh203 | 0:3d9c67d97d6f | 11 | |
emh203 | 0:3d9c67d97d6f | 12 | All rights reserved. |
emh203 | 0:3d9c67d97d6f | 13 | Redistribution and use in source and binary forms, with or without |
emh203 | 0:3d9c67d97d6f | 14 | modification, are permitted provided that the following conditions are met: |
emh203 | 0:3d9c67d97d6f | 15 | - Redistributions of source code must retain the above copyright |
emh203 | 0:3d9c67d97d6f | 16 | notice, this list of conditions and the following disclaimer. |
emh203 | 0:3d9c67d97d6f | 17 | - Redistributions in binary form must reproduce the above copyright |
emh203 | 0:3d9c67d97d6f | 18 | notice, this list of conditions and the following disclaimer in the |
emh203 | 0:3d9c67d97d6f | 19 | documentation and/or other materials provided with the distribution. |
emh203 | 0:3d9c67d97d6f | 20 | - Neither the name of ARM nor the names of its contributors may be used |
emh203 | 0:3d9c67d97d6f | 21 | to endorse or promote products derived from this software without |
emh203 | 0:3d9c67d97d6f | 22 | specific prior written permission. |
emh203 | 0:3d9c67d97d6f | 23 | * |
emh203 | 0:3d9c67d97d6f | 24 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emh203 | 0:3d9c67d97d6f | 25 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emh203 | 0:3d9c67d97d6f | 26 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
emh203 | 0:3d9c67d97d6f | 27 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
emh203 | 0:3d9c67d97d6f | 28 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
emh203 | 0:3d9c67d97d6f | 29 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
emh203 | 0:3d9c67d97d6f | 30 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
emh203 | 0:3d9c67d97d6f | 31 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
emh203 | 0:3d9c67d97d6f | 32 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
emh203 | 0:3d9c67d97d6f | 33 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
emh203 | 0:3d9c67d97d6f | 34 | POSSIBILITY OF SUCH DAMAGE. |
emh203 | 0:3d9c67d97d6f | 35 | ---------------------------------------------------------------------------*/ |
emh203 | 0:3d9c67d97d6f | 36 | |
emh203 | 0:3d9c67d97d6f | 37 | |
emh203 | 0:3d9c67d97d6f | 38 | #ifndef __CORE_CMFUNC_H |
emh203 | 0:3d9c67d97d6f | 39 | #define __CORE_CMFUNC_H |
emh203 | 0:3d9c67d97d6f | 40 | |
emh203 | 0:3d9c67d97d6f | 41 | |
emh203 | 0:3d9c67d97d6f | 42 | /* ########################### Core Function Access ########################### */ |
emh203 | 0:3d9c67d97d6f | 43 | /** \ingroup CMSIS_Core_FunctionInterface |
emh203 | 0:3d9c67d97d6f | 44 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions |
emh203 | 0:3d9c67d97d6f | 45 | @{ |
emh203 | 0:3d9c67d97d6f | 46 | */ |
emh203 | 0:3d9c67d97d6f | 47 | |
emh203 | 0:3d9c67d97d6f | 48 | #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
emh203 | 0:3d9c67d97d6f | 49 | /* ARM armcc specific functions */ |
emh203 | 0:3d9c67d97d6f | 50 | |
emh203 | 0:3d9c67d97d6f | 51 | #if (__ARMCC_VERSION < 400677) |
emh203 | 0:3d9c67d97d6f | 52 | #error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
emh203 | 0:3d9c67d97d6f | 53 | #endif |
emh203 | 0:3d9c67d97d6f | 54 | |
emh203 | 0:3d9c67d97d6f | 55 | /* intrinsic void __enable_irq(); */ |
emh203 | 0:3d9c67d97d6f | 56 | /* intrinsic void __disable_irq(); */ |
emh203 | 0:3d9c67d97d6f | 57 | |
emh203 | 0:3d9c67d97d6f | 58 | /** \brief Get Control Register |
emh203 | 0:3d9c67d97d6f | 59 | |
emh203 | 0:3d9c67d97d6f | 60 | This function returns the content of the Control Register. |
emh203 | 0:3d9c67d97d6f | 61 | |
emh203 | 0:3d9c67d97d6f | 62 | \return Control Register value |
emh203 | 0:3d9c67d97d6f | 63 | */ |
emh203 | 0:3d9c67d97d6f | 64 | __STATIC_INLINE uint32_t __get_CONTROL(void) |
emh203 | 0:3d9c67d97d6f | 65 | { |
emh203 | 0:3d9c67d97d6f | 66 | register uint32_t __regControl __ASM("control"); |
emh203 | 0:3d9c67d97d6f | 67 | return(__regControl); |
emh203 | 0:3d9c67d97d6f | 68 | } |
emh203 | 0:3d9c67d97d6f | 69 | |
emh203 | 0:3d9c67d97d6f | 70 | |
emh203 | 0:3d9c67d97d6f | 71 | /** \brief Set Control Register |
emh203 | 0:3d9c67d97d6f | 72 | |
emh203 | 0:3d9c67d97d6f | 73 | This function writes the given value to the Control Register. |
emh203 | 0:3d9c67d97d6f | 74 | |
emh203 | 0:3d9c67d97d6f | 75 | \param [in] control Control Register value to set |
emh203 | 0:3d9c67d97d6f | 76 | */ |
emh203 | 0:3d9c67d97d6f | 77 | __STATIC_INLINE void __set_CONTROL(uint32_t control) |
emh203 | 0:3d9c67d97d6f | 78 | { |
emh203 | 0:3d9c67d97d6f | 79 | register uint32_t __regControl __ASM("control"); |
emh203 | 0:3d9c67d97d6f | 80 | __regControl = control; |
emh203 | 0:3d9c67d97d6f | 81 | } |
emh203 | 0:3d9c67d97d6f | 82 | |
emh203 | 0:3d9c67d97d6f | 83 | |
emh203 | 0:3d9c67d97d6f | 84 | /** \brief Get IPSR Register |
emh203 | 0:3d9c67d97d6f | 85 | |
emh203 | 0:3d9c67d97d6f | 86 | This function returns the content of the IPSR Register. |
emh203 | 0:3d9c67d97d6f | 87 | |
emh203 | 0:3d9c67d97d6f | 88 | \return IPSR Register value |
emh203 | 0:3d9c67d97d6f | 89 | */ |
emh203 | 0:3d9c67d97d6f | 90 | __STATIC_INLINE uint32_t __get_IPSR(void) |
emh203 | 0:3d9c67d97d6f | 91 | { |
emh203 | 0:3d9c67d97d6f | 92 | register uint32_t __regIPSR __ASM("ipsr"); |
emh203 | 0:3d9c67d97d6f | 93 | return(__regIPSR); |
emh203 | 0:3d9c67d97d6f | 94 | } |
emh203 | 0:3d9c67d97d6f | 95 | |
emh203 | 0:3d9c67d97d6f | 96 | |
emh203 | 0:3d9c67d97d6f | 97 | /** \brief Get APSR Register |
emh203 | 0:3d9c67d97d6f | 98 | |
emh203 | 0:3d9c67d97d6f | 99 | This function returns the content of the APSR Register. |
emh203 | 0:3d9c67d97d6f | 100 | |
emh203 | 0:3d9c67d97d6f | 101 | \return APSR Register value |
emh203 | 0:3d9c67d97d6f | 102 | */ |
emh203 | 0:3d9c67d97d6f | 103 | __STATIC_INLINE uint32_t __get_APSR(void) |
emh203 | 0:3d9c67d97d6f | 104 | { |
emh203 | 0:3d9c67d97d6f | 105 | register uint32_t __regAPSR __ASM("apsr"); |
emh203 | 0:3d9c67d97d6f | 106 | return(__regAPSR); |
emh203 | 0:3d9c67d97d6f | 107 | } |
emh203 | 0:3d9c67d97d6f | 108 | |
emh203 | 0:3d9c67d97d6f | 109 | |
emh203 | 0:3d9c67d97d6f | 110 | /** \brief Get xPSR Register |
emh203 | 0:3d9c67d97d6f | 111 | |
emh203 | 0:3d9c67d97d6f | 112 | This function returns the content of the xPSR Register. |
emh203 | 0:3d9c67d97d6f | 113 | |
emh203 | 0:3d9c67d97d6f | 114 | \return xPSR Register value |
emh203 | 0:3d9c67d97d6f | 115 | */ |
emh203 | 0:3d9c67d97d6f | 116 | __STATIC_INLINE uint32_t __get_xPSR(void) |
emh203 | 0:3d9c67d97d6f | 117 | { |
emh203 | 0:3d9c67d97d6f | 118 | register uint32_t __regXPSR __ASM("xpsr"); |
emh203 | 0:3d9c67d97d6f | 119 | return(__regXPSR); |
emh203 | 0:3d9c67d97d6f | 120 | } |
emh203 | 0:3d9c67d97d6f | 121 | |
emh203 | 0:3d9c67d97d6f | 122 | |
emh203 | 0:3d9c67d97d6f | 123 | /** \brief Get Process Stack Pointer |
emh203 | 0:3d9c67d97d6f | 124 | |
emh203 | 0:3d9c67d97d6f | 125 | This function returns the current value of the Process Stack Pointer (PSP). |
emh203 | 0:3d9c67d97d6f | 126 | |
emh203 | 0:3d9c67d97d6f | 127 | \return PSP Register value |
emh203 | 0:3d9c67d97d6f | 128 | */ |
emh203 | 0:3d9c67d97d6f | 129 | __STATIC_INLINE uint32_t __get_PSP(void) |
emh203 | 0:3d9c67d97d6f | 130 | { |
emh203 | 0:3d9c67d97d6f | 131 | register uint32_t __regProcessStackPointer __ASM("psp"); |
emh203 | 0:3d9c67d97d6f | 132 | return(__regProcessStackPointer); |
emh203 | 0:3d9c67d97d6f | 133 | } |
emh203 | 0:3d9c67d97d6f | 134 | |
emh203 | 0:3d9c67d97d6f | 135 | |
emh203 | 0:3d9c67d97d6f | 136 | /** \brief Set Process Stack Pointer |
emh203 | 0:3d9c67d97d6f | 137 | |
emh203 | 0:3d9c67d97d6f | 138 | This function assigns the given value to the Process Stack Pointer (PSP). |
emh203 | 0:3d9c67d97d6f | 139 | |
emh203 | 0:3d9c67d97d6f | 140 | \param [in] topOfProcStack Process Stack Pointer value to set |
emh203 | 0:3d9c67d97d6f | 141 | */ |
emh203 | 0:3d9c67d97d6f | 142 | __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) |
emh203 | 0:3d9c67d97d6f | 143 | { |
emh203 | 0:3d9c67d97d6f | 144 | register uint32_t __regProcessStackPointer __ASM("psp"); |
emh203 | 0:3d9c67d97d6f | 145 | __regProcessStackPointer = topOfProcStack; |
emh203 | 0:3d9c67d97d6f | 146 | } |
emh203 | 0:3d9c67d97d6f | 147 | |
emh203 | 0:3d9c67d97d6f | 148 | |
emh203 | 0:3d9c67d97d6f | 149 | /** \brief Get Main Stack Pointer |
emh203 | 0:3d9c67d97d6f | 150 | |
emh203 | 0:3d9c67d97d6f | 151 | This function returns the current value of the Main Stack Pointer (MSP). |
emh203 | 0:3d9c67d97d6f | 152 | |
emh203 | 0:3d9c67d97d6f | 153 | \return MSP Register value |
emh203 | 0:3d9c67d97d6f | 154 | */ |
emh203 | 0:3d9c67d97d6f | 155 | __STATIC_INLINE uint32_t __get_MSP(void) |
emh203 | 0:3d9c67d97d6f | 156 | { |
emh203 | 0:3d9c67d97d6f | 157 | register uint32_t __regMainStackPointer __ASM("msp"); |
emh203 | 0:3d9c67d97d6f | 158 | return(__regMainStackPointer); |
emh203 | 0:3d9c67d97d6f | 159 | } |
emh203 | 0:3d9c67d97d6f | 160 | |
emh203 | 0:3d9c67d97d6f | 161 | |
emh203 | 0:3d9c67d97d6f | 162 | /** \brief Set Main Stack Pointer |
emh203 | 0:3d9c67d97d6f | 163 | |
emh203 | 0:3d9c67d97d6f | 164 | This function assigns the given value to the Main Stack Pointer (MSP). |
emh203 | 0:3d9c67d97d6f | 165 | |
emh203 | 0:3d9c67d97d6f | 166 | \param [in] topOfMainStack Main Stack Pointer value to set |
emh203 | 0:3d9c67d97d6f | 167 | */ |
emh203 | 0:3d9c67d97d6f | 168 | __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) |
emh203 | 0:3d9c67d97d6f | 169 | { |
emh203 | 0:3d9c67d97d6f | 170 | register uint32_t __regMainStackPointer __ASM("msp"); |
emh203 | 0:3d9c67d97d6f | 171 | __regMainStackPointer = topOfMainStack; |
emh203 | 0:3d9c67d97d6f | 172 | } |
emh203 | 0:3d9c67d97d6f | 173 | |
emh203 | 0:3d9c67d97d6f | 174 | |
emh203 | 0:3d9c67d97d6f | 175 | /** \brief Get Priority Mask |
emh203 | 0:3d9c67d97d6f | 176 | |
emh203 | 0:3d9c67d97d6f | 177 | This function returns the current state of the priority mask bit from the Priority Mask Register. |
emh203 | 0:3d9c67d97d6f | 178 | |
emh203 | 0:3d9c67d97d6f | 179 | \return Priority Mask value |
emh203 | 0:3d9c67d97d6f | 180 | */ |
emh203 | 0:3d9c67d97d6f | 181 | __STATIC_INLINE uint32_t __get_PRIMASK(void) |
emh203 | 0:3d9c67d97d6f | 182 | { |
emh203 | 0:3d9c67d97d6f | 183 | register uint32_t __regPriMask __ASM("primask"); |
emh203 | 0:3d9c67d97d6f | 184 | return(__regPriMask); |
emh203 | 0:3d9c67d97d6f | 185 | } |
emh203 | 0:3d9c67d97d6f | 186 | |
emh203 | 0:3d9c67d97d6f | 187 | |
emh203 | 0:3d9c67d97d6f | 188 | /** \brief Set Priority Mask |
emh203 | 0:3d9c67d97d6f | 189 | |
emh203 | 0:3d9c67d97d6f | 190 | This function assigns the given value to the Priority Mask Register. |
emh203 | 0:3d9c67d97d6f | 191 | |
emh203 | 0:3d9c67d97d6f | 192 | \param [in] priMask Priority Mask |
emh203 | 0:3d9c67d97d6f | 193 | */ |
emh203 | 0:3d9c67d97d6f | 194 | __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) |
emh203 | 0:3d9c67d97d6f | 195 | { |
emh203 | 0:3d9c67d97d6f | 196 | register uint32_t __regPriMask __ASM("primask"); |
emh203 | 0:3d9c67d97d6f | 197 | __regPriMask = (priMask); |
emh203 | 0:3d9c67d97d6f | 198 | } |
emh203 | 0:3d9c67d97d6f | 199 | |
emh203 | 0:3d9c67d97d6f | 200 | |
emh203 | 0:3d9c67d97d6f | 201 | #if (__CORTEX_M >= 0x03) |
emh203 | 0:3d9c67d97d6f | 202 | |
emh203 | 0:3d9c67d97d6f | 203 | /** \brief Enable FIQ |
emh203 | 0:3d9c67d97d6f | 204 | |
emh203 | 0:3d9c67d97d6f | 205 | This function enables FIQ interrupts by clearing the F-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 206 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 207 | */ |
emh203 | 0:3d9c67d97d6f | 208 | #define __enable_fault_irq __enable_fiq |
emh203 | 0:3d9c67d97d6f | 209 | |
emh203 | 0:3d9c67d97d6f | 210 | |
emh203 | 0:3d9c67d97d6f | 211 | /** \brief Disable FIQ |
emh203 | 0:3d9c67d97d6f | 212 | |
emh203 | 0:3d9c67d97d6f | 213 | This function disables FIQ interrupts by setting the F-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 214 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 215 | */ |
emh203 | 0:3d9c67d97d6f | 216 | #define __disable_fault_irq __disable_fiq |
emh203 | 0:3d9c67d97d6f | 217 | |
emh203 | 0:3d9c67d97d6f | 218 | |
emh203 | 0:3d9c67d97d6f | 219 | /** \brief Get Base Priority |
emh203 | 0:3d9c67d97d6f | 220 | |
emh203 | 0:3d9c67d97d6f | 221 | This function returns the current value of the Base Priority register. |
emh203 | 0:3d9c67d97d6f | 222 | |
emh203 | 0:3d9c67d97d6f | 223 | \return Base Priority register value |
emh203 | 0:3d9c67d97d6f | 224 | */ |
emh203 | 0:3d9c67d97d6f | 225 | __STATIC_INLINE uint32_t __get_BASEPRI(void) |
emh203 | 0:3d9c67d97d6f | 226 | { |
emh203 | 0:3d9c67d97d6f | 227 | register uint32_t __regBasePri __ASM("basepri"); |
emh203 | 0:3d9c67d97d6f | 228 | return(__regBasePri); |
emh203 | 0:3d9c67d97d6f | 229 | } |
emh203 | 0:3d9c67d97d6f | 230 | |
emh203 | 0:3d9c67d97d6f | 231 | |
emh203 | 0:3d9c67d97d6f | 232 | /** \brief Set Base Priority |
emh203 | 0:3d9c67d97d6f | 233 | |
emh203 | 0:3d9c67d97d6f | 234 | This function assigns the given value to the Base Priority register. |
emh203 | 0:3d9c67d97d6f | 235 | |
emh203 | 0:3d9c67d97d6f | 236 | \param [in] basePri Base Priority value to set |
emh203 | 0:3d9c67d97d6f | 237 | */ |
emh203 | 0:3d9c67d97d6f | 238 | __STATIC_INLINE void __set_BASEPRI(uint32_t basePri) |
emh203 | 0:3d9c67d97d6f | 239 | { |
emh203 | 0:3d9c67d97d6f | 240 | register uint32_t __regBasePri __ASM("basepri"); |
emh203 | 0:3d9c67d97d6f | 241 | __regBasePri = (basePri & 0xff); |
emh203 | 0:3d9c67d97d6f | 242 | } |
emh203 | 0:3d9c67d97d6f | 243 | |
emh203 | 0:3d9c67d97d6f | 244 | |
emh203 | 0:3d9c67d97d6f | 245 | /** \brief Get Fault Mask |
emh203 | 0:3d9c67d97d6f | 246 | |
emh203 | 0:3d9c67d97d6f | 247 | This function returns the current value of the Fault Mask register. |
emh203 | 0:3d9c67d97d6f | 248 | |
emh203 | 0:3d9c67d97d6f | 249 | \return Fault Mask register value |
emh203 | 0:3d9c67d97d6f | 250 | */ |
emh203 | 0:3d9c67d97d6f | 251 | __STATIC_INLINE uint32_t __get_FAULTMASK(void) |
emh203 | 0:3d9c67d97d6f | 252 | { |
emh203 | 0:3d9c67d97d6f | 253 | register uint32_t __regFaultMask __ASM("faultmask"); |
emh203 | 0:3d9c67d97d6f | 254 | return(__regFaultMask); |
emh203 | 0:3d9c67d97d6f | 255 | } |
emh203 | 0:3d9c67d97d6f | 256 | |
emh203 | 0:3d9c67d97d6f | 257 | |
emh203 | 0:3d9c67d97d6f | 258 | /** \brief Set Fault Mask |
emh203 | 0:3d9c67d97d6f | 259 | |
emh203 | 0:3d9c67d97d6f | 260 | This function assigns the given value to the Fault Mask register. |
emh203 | 0:3d9c67d97d6f | 261 | |
emh203 | 0:3d9c67d97d6f | 262 | \param [in] faultMask Fault Mask value to set |
emh203 | 0:3d9c67d97d6f | 263 | */ |
emh203 | 0:3d9c67d97d6f | 264 | __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) |
emh203 | 0:3d9c67d97d6f | 265 | { |
emh203 | 0:3d9c67d97d6f | 266 | register uint32_t __regFaultMask __ASM("faultmask"); |
emh203 | 0:3d9c67d97d6f | 267 | __regFaultMask = (faultMask & (uint32_t)1); |
emh203 | 0:3d9c67d97d6f | 268 | } |
emh203 | 0:3d9c67d97d6f | 269 | |
emh203 | 0:3d9c67d97d6f | 270 | #endif /* (__CORTEX_M >= 0x03) */ |
emh203 | 0:3d9c67d97d6f | 271 | |
emh203 | 0:3d9c67d97d6f | 272 | |
emh203 | 0:3d9c67d97d6f | 273 | #if (__CORTEX_M == 0x04) |
emh203 | 0:3d9c67d97d6f | 274 | |
emh203 | 0:3d9c67d97d6f | 275 | /** \brief Get FPSCR |
emh203 | 0:3d9c67d97d6f | 276 | |
emh203 | 0:3d9c67d97d6f | 277 | This function returns the current value of the Floating Point Status/Control register. |
emh203 | 0:3d9c67d97d6f | 278 | |
emh203 | 0:3d9c67d97d6f | 279 | \return Floating Point Status/Control register value |
emh203 | 0:3d9c67d97d6f | 280 | */ |
emh203 | 0:3d9c67d97d6f | 281 | __STATIC_INLINE uint32_t __get_FPSCR(void) |
emh203 | 0:3d9c67d97d6f | 282 | { |
emh203 | 0:3d9c67d97d6f | 283 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
emh203 | 0:3d9c67d97d6f | 284 | register uint32_t __regfpscr __ASM("fpscr"); |
emh203 | 0:3d9c67d97d6f | 285 | return(__regfpscr); |
emh203 | 0:3d9c67d97d6f | 286 | #else |
emh203 | 0:3d9c67d97d6f | 287 | return(0); |
emh203 | 0:3d9c67d97d6f | 288 | #endif |
emh203 | 0:3d9c67d97d6f | 289 | } |
emh203 | 0:3d9c67d97d6f | 290 | |
emh203 | 0:3d9c67d97d6f | 291 | |
emh203 | 0:3d9c67d97d6f | 292 | /** \brief Set FPSCR |
emh203 | 0:3d9c67d97d6f | 293 | |
emh203 | 0:3d9c67d97d6f | 294 | This function assigns the given value to the Floating Point Status/Control register. |
emh203 | 0:3d9c67d97d6f | 295 | |
emh203 | 0:3d9c67d97d6f | 296 | \param [in] fpscr Floating Point Status/Control value to set |
emh203 | 0:3d9c67d97d6f | 297 | */ |
emh203 | 0:3d9c67d97d6f | 298 | __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) |
emh203 | 0:3d9c67d97d6f | 299 | { |
emh203 | 0:3d9c67d97d6f | 300 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
emh203 | 0:3d9c67d97d6f | 301 | register uint32_t __regfpscr __ASM("fpscr"); |
emh203 | 0:3d9c67d97d6f | 302 | __regfpscr = (fpscr); |
emh203 | 0:3d9c67d97d6f | 303 | #endif |
emh203 | 0:3d9c67d97d6f | 304 | } |
emh203 | 0:3d9c67d97d6f | 305 | |
emh203 | 0:3d9c67d97d6f | 306 | #endif /* (__CORTEX_M == 0x04) */ |
emh203 | 0:3d9c67d97d6f | 307 | |
emh203 | 0:3d9c67d97d6f | 308 | |
emh203 | 0:3d9c67d97d6f | 309 | #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ |
emh203 | 0:3d9c67d97d6f | 310 | /* GNU gcc specific functions */ |
emh203 | 0:3d9c67d97d6f | 311 | |
emh203 | 0:3d9c67d97d6f | 312 | /** \brief Enable IRQ Interrupts |
emh203 | 0:3d9c67d97d6f | 313 | |
emh203 | 0:3d9c67d97d6f | 314 | This function enables IRQ interrupts by clearing the I-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 315 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 316 | */ |
emh203 | 0:3d9c67d97d6f | 317 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) |
emh203 | 0:3d9c67d97d6f | 318 | { |
emh203 | 0:3d9c67d97d6f | 319 | __ASM volatile ("cpsie i" : : : "memory"); |
emh203 | 0:3d9c67d97d6f | 320 | } |
emh203 | 0:3d9c67d97d6f | 321 | |
emh203 | 0:3d9c67d97d6f | 322 | |
emh203 | 0:3d9c67d97d6f | 323 | /** \brief Disable IRQ Interrupts |
emh203 | 0:3d9c67d97d6f | 324 | |
emh203 | 0:3d9c67d97d6f | 325 | This function disables IRQ interrupts by setting the I-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 326 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 327 | */ |
emh203 | 0:3d9c67d97d6f | 328 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) |
emh203 | 0:3d9c67d97d6f | 329 | { |
emh203 | 0:3d9c67d97d6f | 330 | __ASM volatile ("cpsid i" : : : "memory"); |
emh203 | 0:3d9c67d97d6f | 331 | } |
emh203 | 0:3d9c67d97d6f | 332 | |
emh203 | 0:3d9c67d97d6f | 333 | |
emh203 | 0:3d9c67d97d6f | 334 | /** \brief Get Control Register |
emh203 | 0:3d9c67d97d6f | 335 | |
emh203 | 0:3d9c67d97d6f | 336 | This function returns the content of the Control Register. |
emh203 | 0:3d9c67d97d6f | 337 | |
emh203 | 0:3d9c67d97d6f | 338 | \return Control Register value |
emh203 | 0:3d9c67d97d6f | 339 | */ |
emh203 | 0:3d9c67d97d6f | 340 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) |
emh203 | 0:3d9c67d97d6f | 341 | { |
emh203 | 0:3d9c67d97d6f | 342 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 343 | |
emh203 | 0:3d9c67d97d6f | 344 | __ASM volatile ("MRS %0, control" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 345 | return(result); |
emh203 | 0:3d9c67d97d6f | 346 | } |
emh203 | 0:3d9c67d97d6f | 347 | |
emh203 | 0:3d9c67d97d6f | 348 | |
emh203 | 0:3d9c67d97d6f | 349 | /** \brief Set Control Register |
emh203 | 0:3d9c67d97d6f | 350 | |
emh203 | 0:3d9c67d97d6f | 351 | This function writes the given value to the Control Register. |
emh203 | 0:3d9c67d97d6f | 352 | |
emh203 | 0:3d9c67d97d6f | 353 | \param [in] control Control Register value to set |
emh203 | 0:3d9c67d97d6f | 354 | */ |
emh203 | 0:3d9c67d97d6f | 355 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) |
emh203 | 0:3d9c67d97d6f | 356 | { |
emh203 | 0:3d9c67d97d6f | 357 | __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); |
emh203 | 0:3d9c67d97d6f | 358 | } |
emh203 | 0:3d9c67d97d6f | 359 | |
emh203 | 0:3d9c67d97d6f | 360 | |
emh203 | 0:3d9c67d97d6f | 361 | /** \brief Get IPSR Register |
emh203 | 0:3d9c67d97d6f | 362 | |
emh203 | 0:3d9c67d97d6f | 363 | This function returns the content of the IPSR Register. |
emh203 | 0:3d9c67d97d6f | 364 | |
emh203 | 0:3d9c67d97d6f | 365 | \return IPSR Register value |
emh203 | 0:3d9c67d97d6f | 366 | */ |
emh203 | 0:3d9c67d97d6f | 367 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) |
emh203 | 0:3d9c67d97d6f | 368 | { |
emh203 | 0:3d9c67d97d6f | 369 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 370 | |
emh203 | 0:3d9c67d97d6f | 371 | __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 372 | return(result); |
emh203 | 0:3d9c67d97d6f | 373 | } |
emh203 | 0:3d9c67d97d6f | 374 | |
emh203 | 0:3d9c67d97d6f | 375 | |
emh203 | 0:3d9c67d97d6f | 376 | /** \brief Get APSR Register |
emh203 | 0:3d9c67d97d6f | 377 | |
emh203 | 0:3d9c67d97d6f | 378 | This function returns the content of the APSR Register. |
emh203 | 0:3d9c67d97d6f | 379 | |
emh203 | 0:3d9c67d97d6f | 380 | \return APSR Register value |
emh203 | 0:3d9c67d97d6f | 381 | */ |
emh203 | 0:3d9c67d97d6f | 382 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) |
emh203 | 0:3d9c67d97d6f | 383 | { |
emh203 | 0:3d9c67d97d6f | 384 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 385 | |
emh203 | 0:3d9c67d97d6f | 386 | __ASM volatile ("MRS %0, apsr" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 387 | return(result); |
emh203 | 0:3d9c67d97d6f | 388 | } |
emh203 | 0:3d9c67d97d6f | 389 | |
emh203 | 0:3d9c67d97d6f | 390 | |
emh203 | 0:3d9c67d97d6f | 391 | /** \brief Get xPSR Register |
emh203 | 0:3d9c67d97d6f | 392 | |
emh203 | 0:3d9c67d97d6f | 393 | This function returns the content of the xPSR Register. |
emh203 | 0:3d9c67d97d6f | 394 | |
emh203 | 0:3d9c67d97d6f | 395 | \return xPSR Register value |
emh203 | 0:3d9c67d97d6f | 396 | */ |
emh203 | 0:3d9c67d97d6f | 397 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) |
emh203 | 0:3d9c67d97d6f | 398 | { |
emh203 | 0:3d9c67d97d6f | 399 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 400 | |
emh203 | 0:3d9c67d97d6f | 401 | __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 402 | return(result); |
emh203 | 0:3d9c67d97d6f | 403 | } |
emh203 | 0:3d9c67d97d6f | 404 | |
emh203 | 0:3d9c67d97d6f | 405 | |
emh203 | 0:3d9c67d97d6f | 406 | /** \brief Get Process Stack Pointer |
emh203 | 0:3d9c67d97d6f | 407 | |
emh203 | 0:3d9c67d97d6f | 408 | This function returns the current value of the Process Stack Pointer (PSP). |
emh203 | 0:3d9c67d97d6f | 409 | |
emh203 | 0:3d9c67d97d6f | 410 | \return PSP Register value |
emh203 | 0:3d9c67d97d6f | 411 | */ |
emh203 | 0:3d9c67d97d6f | 412 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) |
emh203 | 0:3d9c67d97d6f | 413 | { |
emh203 | 0:3d9c67d97d6f | 414 | register uint32_t result; |
emh203 | 0:3d9c67d97d6f | 415 | |
emh203 | 0:3d9c67d97d6f | 416 | __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 417 | return(result); |
emh203 | 0:3d9c67d97d6f | 418 | } |
emh203 | 0:3d9c67d97d6f | 419 | |
emh203 | 0:3d9c67d97d6f | 420 | |
emh203 | 0:3d9c67d97d6f | 421 | /** \brief Set Process Stack Pointer |
emh203 | 0:3d9c67d97d6f | 422 | |
emh203 | 0:3d9c67d97d6f | 423 | This function assigns the given value to the Process Stack Pointer (PSP). |
emh203 | 0:3d9c67d97d6f | 424 | |
emh203 | 0:3d9c67d97d6f | 425 | \param [in] topOfProcStack Process Stack Pointer value to set |
emh203 | 0:3d9c67d97d6f | 426 | */ |
emh203 | 0:3d9c67d97d6f | 427 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) |
emh203 | 0:3d9c67d97d6f | 428 | { |
emh203 | 0:3d9c67d97d6f | 429 | __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); |
emh203 | 0:3d9c67d97d6f | 430 | } |
emh203 | 0:3d9c67d97d6f | 431 | |
emh203 | 0:3d9c67d97d6f | 432 | |
emh203 | 0:3d9c67d97d6f | 433 | /** \brief Get Main Stack Pointer |
emh203 | 0:3d9c67d97d6f | 434 | |
emh203 | 0:3d9c67d97d6f | 435 | This function returns the current value of the Main Stack Pointer (MSP). |
emh203 | 0:3d9c67d97d6f | 436 | |
emh203 | 0:3d9c67d97d6f | 437 | \return MSP Register value |
emh203 | 0:3d9c67d97d6f | 438 | */ |
emh203 | 0:3d9c67d97d6f | 439 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) |
emh203 | 0:3d9c67d97d6f | 440 | { |
emh203 | 0:3d9c67d97d6f | 441 | register uint32_t result; |
emh203 | 0:3d9c67d97d6f | 442 | |
emh203 | 0:3d9c67d97d6f | 443 | __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 444 | return(result); |
emh203 | 0:3d9c67d97d6f | 445 | } |
emh203 | 0:3d9c67d97d6f | 446 | |
emh203 | 0:3d9c67d97d6f | 447 | |
emh203 | 0:3d9c67d97d6f | 448 | /** \brief Set Main Stack Pointer |
emh203 | 0:3d9c67d97d6f | 449 | |
emh203 | 0:3d9c67d97d6f | 450 | This function assigns the given value to the Main Stack Pointer (MSP). |
emh203 | 0:3d9c67d97d6f | 451 | |
emh203 | 0:3d9c67d97d6f | 452 | \param [in] topOfMainStack Main Stack Pointer value to set |
emh203 | 0:3d9c67d97d6f | 453 | */ |
emh203 | 0:3d9c67d97d6f | 454 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) |
emh203 | 0:3d9c67d97d6f | 455 | { |
emh203 | 0:3d9c67d97d6f | 456 | __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); |
emh203 | 0:3d9c67d97d6f | 457 | } |
emh203 | 0:3d9c67d97d6f | 458 | |
emh203 | 0:3d9c67d97d6f | 459 | |
emh203 | 0:3d9c67d97d6f | 460 | /** \brief Get Priority Mask |
emh203 | 0:3d9c67d97d6f | 461 | |
emh203 | 0:3d9c67d97d6f | 462 | This function returns the current state of the priority mask bit from the Priority Mask Register. |
emh203 | 0:3d9c67d97d6f | 463 | |
emh203 | 0:3d9c67d97d6f | 464 | \return Priority Mask value |
emh203 | 0:3d9c67d97d6f | 465 | */ |
emh203 | 0:3d9c67d97d6f | 466 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) |
emh203 | 0:3d9c67d97d6f | 467 | { |
emh203 | 0:3d9c67d97d6f | 468 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 469 | |
emh203 | 0:3d9c67d97d6f | 470 | __ASM volatile ("MRS %0, primask" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 471 | return(result); |
emh203 | 0:3d9c67d97d6f | 472 | } |
emh203 | 0:3d9c67d97d6f | 473 | |
emh203 | 0:3d9c67d97d6f | 474 | |
emh203 | 0:3d9c67d97d6f | 475 | /** \brief Set Priority Mask |
emh203 | 0:3d9c67d97d6f | 476 | |
emh203 | 0:3d9c67d97d6f | 477 | This function assigns the given value to the Priority Mask Register. |
emh203 | 0:3d9c67d97d6f | 478 | |
emh203 | 0:3d9c67d97d6f | 479 | \param [in] priMask Priority Mask |
emh203 | 0:3d9c67d97d6f | 480 | */ |
emh203 | 0:3d9c67d97d6f | 481 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) |
emh203 | 0:3d9c67d97d6f | 482 | { |
emh203 | 0:3d9c67d97d6f | 483 | __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); |
emh203 | 0:3d9c67d97d6f | 484 | } |
emh203 | 0:3d9c67d97d6f | 485 | |
emh203 | 0:3d9c67d97d6f | 486 | |
emh203 | 0:3d9c67d97d6f | 487 | #if (__CORTEX_M >= 0x03) |
emh203 | 0:3d9c67d97d6f | 488 | |
emh203 | 0:3d9c67d97d6f | 489 | /** \brief Enable FIQ |
emh203 | 0:3d9c67d97d6f | 490 | |
emh203 | 0:3d9c67d97d6f | 491 | This function enables FIQ interrupts by clearing the F-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 492 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 493 | */ |
emh203 | 0:3d9c67d97d6f | 494 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) |
emh203 | 0:3d9c67d97d6f | 495 | { |
emh203 | 0:3d9c67d97d6f | 496 | __ASM volatile ("cpsie f" : : : "memory"); |
emh203 | 0:3d9c67d97d6f | 497 | } |
emh203 | 0:3d9c67d97d6f | 498 | |
emh203 | 0:3d9c67d97d6f | 499 | |
emh203 | 0:3d9c67d97d6f | 500 | /** \brief Disable FIQ |
emh203 | 0:3d9c67d97d6f | 501 | |
emh203 | 0:3d9c67d97d6f | 502 | This function disables FIQ interrupts by setting the F-bit in the CPSR. |
emh203 | 0:3d9c67d97d6f | 503 | Can only be executed in Privileged modes. |
emh203 | 0:3d9c67d97d6f | 504 | */ |
emh203 | 0:3d9c67d97d6f | 505 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) |
emh203 | 0:3d9c67d97d6f | 506 | { |
emh203 | 0:3d9c67d97d6f | 507 | __ASM volatile ("cpsid f" : : : "memory"); |
emh203 | 0:3d9c67d97d6f | 508 | } |
emh203 | 0:3d9c67d97d6f | 509 | |
emh203 | 0:3d9c67d97d6f | 510 | |
emh203 | 0:3d9c67d97d6f | 511 | /** \brief Get Base Priority |
emh203 | 0:3d9c67d97d6f | 512 | |
emh203 | 0:3d9c67d97d6f | 513 | This function returns the current value of the Base Priority register. |
emh203 | 0:3d9c67d97d6f | 514 | |
emh203 | 0:3d9c67d97d6f | 515 | \return Base Priority register value |
emh203 | 0:3d9c67d97d6f | 516 | */ |
emh203 | 0:3d9c67d97d6f | 517 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) |
emh203 | 0:3d9c67d97d6f | 518 | { |
emh203 | 0:3d9c67d97d6f | 519 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 520 | |
emh203 | 0:3d9c67d97d6f | 521 | __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 522 | return(result); |
emh203 | 0:3d9c67d97d6f | 523 | } |
emh203 | 0:3d9c67d97d6f | 524 | |
emh203 | 0:3d9c67d97d6f | 525 | |
emh203 | 0:3d9c67d97d6f | 526 | /** \brief Set Base Priority |
emh203 | 0:3d9c67d97d6f | 527 | |
emh203 | 0:3d9c67d97d6f | 528 | This function assigns the given value to the Base Priority register. |
emh203 | 0:3d9c67d97d6f | 529 | |
emh203 | 0:3d9c67d97d6f | 530 | \param [in] basePri Base Priority value to set |
emh203 | 0:3d9c67d97d6f | 531 | */ |
emh203 | 0:3d9c67d97d6f | 532 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) |
emh203 | 0:3d9c67d97d6f | 533 | { |
emh203 | 0:3d9c67d97d6f | 534 | __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); |
emh203 | 0:3d9c67d97d6f | 535 | } |
emh203 | 0:3d9c67d97d6f | 536 | |
emh203 | 0:3d9c67d97d6f | 537 | |
emh203 | 0:3d9c67d97d6f | 538 | /** \brief Get Fault Mask |
emh203 | 0:3d9c67d97d6f | 539 | |
emh203 | 0:3d9c67d97d6f | 540 | This function returns the current value of the Fault Mask register. |
emh203 | 0:3d9c67d97d6f | 541 | |
emh203 | 0:3d9c67d97d6f | 542 | \return Fault Mask register value |
emh203 | 0:3d9c67d97d6f | 543 | */ |
emh203 | 0:3d9c67d97d6f | 544 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) |
emh203 | 0:3d9c67d97d6f | 545 | { |
emh203 | 0:3d9c67d97d6f | 546 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 547 | |
emh203 | 0:3d9c67d97d6f | 548 | __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 549 | return(result); |
emh203 | 0:3d9c67d97d6f | 550 | } |
emh203 | 0:3d9c67d97d6f | 551 | |
emh203 | 0:3d9c67d97d6f | 552 | |
emh203 | 0:3d9c67d97d6f | 553 | /** \brief Set Fault Mask |
emh203 | 0:3d9c67d97d6f | 554 | |
emh203 | 0:3d9c67d97d6f | 555 | This function assigns the given value to the Fault Mask register. |
emh203 | 0:3d9c67d97d6f | 556 | |
emh203 | 0:3d9c67d97d6f | 557 | \param [in] faultMask Fault Mask value to set |
emh203 | 0:3d9c67d97d6f | 558 | */ |
emh203 | 0:3d9c67d97d6f | 559 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) |
emh203 | 0:3d9c67d97d6f | 560 | { |
emh203 | 0:3d9c67d97d6f | 561 | __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); |
emh203 | 0:3d9c67d97d6f | 562 | } |
emh203 | 0:3d9c67d97d6f | 563 | |
emh203 | 0:3d9c67d97d6f | 564 | #endif /* (__CORTEX_M >= 0x03) */ |
emh203 | 0:3d9c67d97d6f | 565 | |
emh203 | 0:3d9c67d97d6f | 566 | |
emh203 | 0:3d9c67d97d6f | 567 | #if (__CORTEX_M == 0x04) |
emh203 | 0:3d9c67d97d6f | 568 | |
emh203 | 0:3d9c67d97d6f | 569 | /** \brief Get FPSCR |
emh203 | 0:3d9c67d97d6f | 570 | |
emh203 | 0:3d9c67d97d6f | 571 | This function returns the current value of the Floating Point Status/Control register. |
emh203 | 0:3d9c67d97d6f | 572 | |
emh203 | 0:3d9c67d97d6f | 573 | \return Floating Point Status/Control register value |
emh203 | 0:3d9c67d97d6f | 574 | */ |
emh203 | 0:3d9c67d97d6f | 575 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) |
emh203 | 0:3d9c67d97d6f | 576 | { |
emh203 | 0:3d9c67d97d6f | 577 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
emh203 | 0:3d9c67d97d6f | 578 | uint32_t result; |
emh203 | 0:3d9c67d97d6f | 579 | |
emh203 | 0:3d9c67d97d6f | 580 | /* Empty asm statement works as a scheduling barrier */ |
emh203 | 0:3d9c67d97d6f | 581 | __ASM volatile (""); |
emh203 | 0:3d9c67d97d6f | 582 | __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); |
emh203 | 0:3d9c67d97d6f | 583 | __ASM volatile (""); |
emh203 | 0:3d9c67d97d6f | 584 | return(result); |
emh203 | 0:3d9c67d97d6f | 585 | #else |
emh203 | 0:3d9c67d97d6f | 586 | return(0); |
emh203 | 0:3d9c67d97d6f | 587 | #endif |
emh203 | 0:3d9c67d97d6f | 588 | } |
emh203 | 0:3d9c67d97d6f | 589 | |
emh203 | 0:3d9c67d97d6f | 590 | |
emh203 | 0:3d9c67d97d6f | 591 | /** \brief Set FPSCR |
emh203 | 0:3d9c67d97d6f | 592 | |
emh203 | 0:3d9c67d97d6f | 593 | This function assigns the given value to the Floating Point Status/Control register. |
emh203 | 0:3d9c67d97d6f | 594 | |
emh203 | 0:3d9c67d97d6f | 595 | \param [in] fpscr Floating Point Status/Control value to set |
emh203 | 0:3d9c67d97d6f | 596 | */ |
emh203 | 0:3d9c67d97d6f | 597 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) |
emh203 | 0:3d9c67d97d6f | 598 | { |
emh203 | 0:3d9c67d97d6f | 599 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
emh203 | 0:3d9c67d97d6f | 600 | /* Empty asm statement works as a scheduling barrier */ |
emh203 | 0:3d9c67d97d6f | 601 | __ASM volatile (""); |
emh203 | 0:3d9c67d97d6f | 602 | __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); |
emh203 | 0:3d9c67d97d6f | 603 | __ASM volatile (""); |
emh203 | 0:3d9c67d97d6f | 604 | #endif |
emh203 | 0:3d9c67d97d6f | 605 | } |
emh203 | 0:3d9c67d97d6f | 606 | |
emh203 | 0:3d9c67d97d6f | 607 | #endif /* (__CORTEX_M == 0x04) */ |
emh203 | 0:3d9c67d97d6f | 608 | |
emh203 | 0:3d9c67d97d6f | 609 | |
emh203 | 0:3d9c67d97d6f | 610 | #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ |
emh203 | 0:3d9c67d97d6f | 611 | /* IAR iccarm specific functions */ |
emh203 | 0:3d9c67d97d6f | 612 | #include <cmsis_iar.h> |
emh203 | 0:3d9c67d97d6f | 613 | |
emh203 | 0:3d9c67d97d6f | 614 | |
emh203 | 0:3d9c67d97d6f | 615 | #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ |
emh203 | 0:3d9c67d97d6f | 616 | /* TI CCS specific functions */ |
emh203 | 0:3d9c67d97d6f | 617 | #include <cmsis_ccs.h> |
emh203 | 0:3d9c67d97d6f | 618 | |
emh203 | 0:3d9c67d97d6f | 619 | |
emh203 | 0:3d9c67d97d6f | 620 | #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ |
emh203 | 0:3d9c67d97d6f | 621 | /* TASKING carm specific functions */ |
emh203 | 0:3d9c67d97d6f | 622 | /* |
emh203 | 0:3d9c67d97d6f | 623 | * The CMSIS functions have been implemented as intrinsics in the compiler. |
emh203 | 0:3d9c67d97d6f | 624 | * Please use "carm -?i" to get an up to date list of all intrinsics, |
emh203 | 0:3d9c67d97d6f | 625 | * Including the CMSIS ones. |
emh203 | 0:3d9c67d97d6f | 626 | */ |
emh203 | 0:3d9c67d97d6f | 627 | |
emh203 | 0:3d9c67d97d6f | 628 | |
emh203 | 0:3d9c67d97d6f | 629 | #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/ |
emh203 | 0:3d9c67d97d6f | 630 | /* Cosmic specific functions */ |
emh203 | 0:3d9c67d97d6f | 631 | #include <cmsis_csm.h> |
emh203 | 0:3d9c67d97d6f | 632 | |
emh203 | 0:3d9c67d97d6f | 633 | #endif |
emh203 | 0:3d9c67d97d6f | 634 | |
emh203 | 0:3d9c67d97d6f | 635 | /*@} end of CMSIS_Core_RegAccFunctions */ |
emh203 | 0:3d9c67d97d6f | 636 | |
emh203 | 0:3d9c67d97d6f | 637 | #endif /* __CORE_CMFUNC_H */ |