Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

FilteringFunctions/arm_biquad_cascade_df2T_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_biquad_cascade_df2T_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Processing function for the floating-point transposed
emh203 0:3d9c67d97d6f 11 * direct form II Biquad cascade filter.
emh203 0:3d9c67d97d6f 12 *
emh203 0:3d9c67d97d6f 13 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 14 *
emh203 0:3d9c67d97d6f 15 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 16 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 17 * are met:
emh203 0:3d9c67d97d6f 18 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 19 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 20 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 21 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 22 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 23 * distribution.
emh203 0:3d9c67d97d6f 24 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 25 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 26 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 27 *
emh203 0:3d9c67d97d6f 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 31 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 32 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 33 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 34 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 35 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 39 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 40 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 #include "arm_math.h"
emh203 0:3d9c67d97d6f 43
emh203 0:3d9c67d97d6f 44 /**
emh203 0:3d9c67d97d6f 45 * @ingroup groupFilters
emh203 0:3d9c67d97d6f 46 */
emh203 0:3d9c67d97d6f 47
emh203 0:3d9c67d97d6f 48 /**
emh203 0:3d9c67d97d6f 49 * @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
emh203 0:3d9c67d97d6f 50 *
emh203 0:3d9c67d97d6f 51 * This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
emh203 0:3d9c67d97d6f 52 * The filters are implemented as a cascade of second order Biquad sections.
emh203 0:3d9c67d97d6f 53 * These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
emh203 0:3d9c67d97d6f 54 * Only floating-point data is supported.
emh203 0:3d9c67d97d6f 55 *
emh203 0:3d9c67d97d6f 56 * This function operate on blocks of input and output data and each call to the function
emh203 0:3d9c67d97d6f 57 * processes <code>blockSize</code> samples through the filter.
emh203 0:3d9c67d97d6f 58 * <code>pSrc</code> points to the array of input data and
emh203 0:3d9c67d97d6f 59 * <code>pDst</code> points to the array of output data.
emh203 0:3d9c67d97d6f 60 * Both arrays contain <code>blockSize</code> values.
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 * \par Algorithm
emh203 0:3d9c67d97d6f 63 * Each Biquad stage implements a second order filter using the difference equation:
emh203 0:3d9c67d97d6f 64 * <pre>
emh203 0:3d9c67d97d6f 65 * y[n] = b0 * x[n] + d1
emh203 0:3d9c67d97d6f 66 * d1 = b1 * x[n] + a1 * y[n] + d2
emh203 0:3d9c67d97d6f 67 * d2 = b2 * x[n] + a2 * y[n]
emh203 0:3d9c67d97d6f 68 * </pre>
emh203 0:3d9c67d97d6f 69 * where d1 and d2 represent the two state values.
emh203 0:3d9c67d97d6f 70 *
emh203 0:3d9c67d97d6f 71 * \par
emh203 0:3d9c67d97d6f 72 * A Biquad filter using a transposed Direct Form II structure is shown below.
emh203 0:3d9c67d97d6f 73 * \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
emh203 0:3d9c67d97d6f 74 * Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
emh203 0:3d9c67d97d6f 75 * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
emh203 0:3d9c67d97d6f 76 * Pay careful attention to the sign of the feedback coefficients.
emh203 0:3d9c67d97d6f 77 * Some design tools flip the sign of the feedback coefficients:
emh203 0:3d9c67d97d6f 78 * <pre>
emh203 0:3d9c67d97d6f 79 * y[n] = b0 * x[n] + d1;
emh203 0:3d9c67d97d6f 80 * d1 = b1 * x[n] - a1 * y[n] + d2;
emh203 0:3d9c67d97d6f 81 * d2 = b2 * x[n] - a2 * y[n];
emh203 0:3d9c67d97d6f 82 * </pre>
emh203 0:3d9c67d97d6f 83 * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
emh203 0:3d9c67d97d6f 84 *
emh203 0:3d9c67d97d6f 85 * \par
emh203 0:3d9c67d97d6f 86 * Higher order filters are realized as a cascade of second order sections.
emh203 0:3d9c67d97d6f 87 * <code>numStages</code> refers to the number of second order stages used.
emh203 0:3d9c67d97d6f 88 * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
emh203 0:3d9c67d97d6f 89 * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
emh203 0:3d9c67d97d6f 90 * coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
emh203 0:3d9c67d97d6f 91 *
emh203 0:3d9c67d97d6f 92 * \par
emh203 0:3d9c67d97d6f 93 * <code>pState</code> points to the state variable array.
emh203 0:3d9c67d97d6f 94 * Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
emh203 0:3d9c67d97d6f 95 * The state variables are arranged in the <code>pState</code> array as:
emh203 0:3d9c67d97d6f 96 * <pre>
emh203 0:3d9c67d97d6f 97 * {d11, d12, d21, d22, ...}
emh203 0:3d9c67d97d6f 98 * </pre>
emh203 0:3d9c67d97d6f 99 * where <code>d1x</code> refers to the state variables for the first Biquad and
emh203 0:3d9c67d97d6f 100 * <code>d2x</code> refers to the state variables for the second Biquad.
emh203 0:3d9c67d97d6f 101 * The state array has a total length of <code>2*numStages</code> values.
emh203 0:3d9c67d97d6f 102 * The state variables are updated after each block of data is processed; the coefficients are untouched.
emh203 0:3d9c67d97d6f 103 *
emh203 0:3d9c67d97d6f 104 * \par
emh203 0:3d9c67d97d6f 105 * The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
emh203 0:3d9c67d97d6f 106 * The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
emh203 0:3d9c67d97d6f 107 * That is why the Direct Form I structure supports Q15 and Q31 data types.
emh203 0:3d9c67d97d6f 108 * The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
emh203 0:3d9c67d97d6f 109 * Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
emh203 0:3d9c67d97d6f 110 * The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
emh203 0:3d9c67d97d6f 111 *
emh203 0:3d9c67d97d6f 112 * \par Instance Structure
emh203 0:3d9c67d97d6f 113 * The coefficients and state variables for a filter are stored together in an instance data structure.
emh203 0:3d9c67d97d6f 114 * A separate instance structure must be defined for each filter.
emh203 0:3d9c67d97d6f 115 * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
emh203 0:3d9c67d97d6f 116 *
emh203 0:3d9c67d97d6f 117 * \par Init Functions
emh203 0:3d9c67d97d6f 118 * There is also an associated initialization function.
emh203 0:3d9c67d97d6f 119 * The initialization function performs following operations:
emh203 0:3d9c67d97d6f 120 * - Sets the values of the internal structure fields.
emh203 0:3d9c67d97d6f 121 * - Zeros out the values in the state buffer.
emh203 0:3d9c67d97d6f 122 * To do this manually without calling the init function, assign the follow subfields of the instance structure:
emh203 0:3d9c67d97d6f 123 * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
emh203 0:3d9c67d97d6f 124 *
emh203 0:3d9c67d97d6f 125 * \par
emh203 0:3d9c67d97d6f 126 * Use of the initialization function is optional.
emh203 0:3d9c67d97d6f 127 * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
emh203 0:3d9c67d97d6f 128 * To place an instance structure into a const data section, the instance structure must be manually initialized.
emh203 0:3d9c67d97d6f 129 * Set the values in the state buffer to zeros before static initialization.
emh203 0:3d9c67d97d6f 130 * For example, to statically initialize the instance structure use
emh203 0:3d9c67d97d6f 131 * <pre>
emh203 0:3d9c67d97d6f 132 * arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
emh203 0:3d9c67d97d6f 133 * </pre>
emh203 0:3d9c67d97d6f 134 * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
emh203 0:3d9c67d97d6f 135 * <code>pCoeffs</code> is the address of the coefficient buffer;
emh203 0:3d9c67d97d6f 136 *
emh203 0:3d9c67d97d6f 137 */
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /**
emh203 0:3d9c67d97d6f 140 * @addtogroup BiquadCascadeDF2T
emh203 0:3d9c67d97d6f 141 * @{
emh203 0:3d9c67d97d6f 142 */
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 /**
emh203 0:3d9c67d97d6f 145 * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
emh203 0:3d9c67d97d6f 146 * @param[in] *S points to an instance of the filter data structure.
emh203 0:3d9c67d97d6f 147 * @param[in] *pSrc points to the block of input data.
emh203 0:3d9c67d97d6f 148 * @param[out] *pDst points to the block of output data
emh203 0:3d9c67d97d6f 149 * @param[in] blockSize number of samples to process.
emh203 0:3d9c67d97d6f 150 * @return none.
emh203 0:3d9c67d97d6f 151 */
emh203 0:3d9c67d97d6f 152
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 LOW_OPTIMIZATION_ENTER
emh203 0:3d9c67d97d6f 155 void arm_biquad_cascade_df2T_f32(
emh203 0:3d9c67d97d6f 156 const arm_biquad_cascade_df2T_instance_f32 * S,
emh203 0:3d9c67d97d6f 157 float32_t * pSrc,
emh203 0:3d9c67d97d6f 158 float32_t * pDst,
emh203 0:3d9c67d97d6f 159 uint32_t blockSize)
emh203 0:3d9c67d97d6f 160 {
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 float32_t *pIn = pSrc; /* source pointer */
emh203 0:3d9c67d97d6f 163 float32_t *pOut = pDst; /* destination pointer */
emh203 0:3d9c67d97d6f 164 float32_t *pState = S->pState; /* State pointer */
emh203 0:3d9c67d97d6f 165 float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
emh203 0:3d9c67d97d6f 166 float32_t acc1; /* accumulator */
emh203 0:3d9c67d97d6f 167 float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
emh203 0:3d9c67d97d6f 168 float32_t Xn1; /* temporary input */
emh203 0:3d9c67d97d6f 169 float32_t d1, d2; /* state variables */
emh203 0:3d9c67d97d6f 170 uint32_t sample, stage = S->numStages; /* loop counters */
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 #ifndef ARM_MATH_CM0_FAMILY_FAMILY
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 float32_t Xn2, Xn3, Xn4; /* Input State variables */
emh203 0:3d9c67d97d6f 175 float32_t acc2, acc3, acc4; /* accumulator */
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 float32_t p0, p1, p2, p3, p4, A1;
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 181 do
emh203 0:3d9c67d97d6f 182 {
emh203 0:3d9c67d97d6f 183 /* Reading the coefficients */
emh203 0:3d9c67d97d6f 184 b0 = *pCoeffs++;
emh203 0:3d9c67d97d6f 185 b1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 186 b2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 187 a1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 188 a2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 189
emh203 0:3d9c67d97d6f 190
emh203 0:3d9c67d97d6f 191 /*Reading the state values */
emh203 0:3d9c67d97d6f 192 d1 = pState[0];
emh203 0:3d9c67d97d6f 193 d2 = pState[1];
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 /* Apply loop unrolling and compute 4 output values simultaneously. */
emh203 0:3d9c67d97d6f 196 sample = blockSize >> 2u;
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 199 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 200 while(sample > 0u) {
emh203 0:3d9c67d97d6f 201
emh203 0:3d9c67d97d6f 202 /* y[n] = b0 * x[n] + d1 */
emh203 0:3d9c67d97d6f 203 /* d1 = b1 * x[n] + a1 * y[n] + d2 */
emh203 0:3d9c67d97d6f 204 /* d2 = b2 * x[n] + a2 * y[n] */
emh203 0:3d9c67d97d6f 205
emh203 0:3d9c67d97d6f 206 /* Read the four inputs */
emh203 0:3d9c67d97d6f 207 Xn1 = pIn[0];
emh203 0:3d9c67d97d6f 208 Xn2 = pIn[1];
emh203 0:3d9c67d97d6f 209 Xn3 = pIn[2];
emh203 0:3d9c67d97d6f 210 Xn4 = pIn[3];
emh203 0:3d9c67d97d6f 211 pIn += 4;
emh203 0:3d9c67d97d6f 212
emh203 0:3d9c67d97d6f 213 p0 = b0 * Xn1;
emh203 0:3d9c67d97d6f 214 p1 = b1 * Xn1;
emh203 0:3d9c67d97d6f 215 acc1 = p0 + d1;
emh203 0:3d9c67d97d6f 216 p0 = b0 * Xn2;
emh203 0:3d9c67d97d6f 217 p3 = a1 * acc1;
emh203 0:3d9c67d97d6f 218 p2 = b2 * Xn1;
emh203 0:3d9c67d97d6f 219 A1 = p1 + p3;
emh203 0:3d9c67d97d6f 220 p4 = a2 * acc1;
emh203 0:3d9c67d97d6f 221 d1 = A1 + d2;
emh203 0:3d9c67d97d6f 222 d2 = p2 + p4;
emh203 0:3d9c67d97d6f 223
emh203 0:3d9c67d97d6f 224 p1 = b1 * Xn2;
emh203 0:3d9c67d97d6f 225 acc2 = p0 + d1;
emh203 0:3d9c67d97d6f 226 p0 = b0 * Xn3;
emh203 0:3d9c67d97d6f 227 p3 = a1 * acc2;
emh203 0:3d9c67d97d6f 228 p2 = b2 * Xn2;
emh203 0:3d9c67d97d6f 229 A1 = p1 + p3;
emh203 0:3d9c67d97d6f 230 p4 = a2 * acc2;
emh203 0:3d9c67d97d6f 231 d1 = A1 + d2;
emh203 0:3d9c67d97d6f 232 d2 = p2 + p4;
emh203 0:3d9c67d97d6f 233
emh203 0:3d9c67d97d6f 234 p1 = b1 * Xn3;
emh203 0:3d9c67d97d6f 235 acc3 = p0 + d1;
emh203 0:3d9c67d97d6f 236 p0 = b0 * Xn4;
emh203 0:3d9c67d97d6f 237 p3 = a1 * acc3;
emh203 0:3d9c67d97d6f 238 p2 = b2 * Xn3;
emh203 0:3d9c67d97d6f 239 A1 = p1 + p3;
emh203 0:3d9c67d97d6f 240 p4 = a2 * acc3;
emh203 0:3d9c67d97d6f 241 d1 = A1 + d2;
emh203 0:3d9c67d97d6f 242 d2 = p2 + p4;
emh203 0:3d9c67d97d6f 243
emh203 0:3d9c67d97d6f 244 acc4 = p0 + d1;
emh203 0:3d9c67d97d6f 245 p1 = b1 * Xn4;
emh203 0:3d9c67d97d6f 246 p3 = a1 * acc4;
emh203 0:3d9c67d97d6f 247 p2 = b2 * Xn4;
emh203 0:3d9c67d97d6f 248 A1 = p1 + p3;
emh203 0:3d9c67d97d6f 249 p4 = a2 * acc4;
emh203 0:3d9c67d97d6f 250 d1 = A1 + d2;
emh203 0:3d9c67d97d6f 251 d2 = p2 + p4;
emh203 0:3d9c67d97d6f 252
emh203 0:3d9c67d97d6f 253 pOut[0] = acc1;
emh203 0:3d9c67d97d6f 254 pOut[1] = acc2;
emh203 0:3d9c67d97d6f 255 pOut[2] = acc3;
emh203 0:3d9c67d97d6f 256 pOut[3] = acc4;
emh203 0:3d9c67d97d6f 257 pOut += 4;
emh203 0:3d9c67d97d6f 258
emh203 0:3d9c67d97d6f 259 sample--;
emh203 0:3d9c67d97d6f 260 }
emh203 0:3d9c67d97d6f 261
emh203 0:3d9c67d97d6f 262 sample = blockSize & 0x3u;
emh203 0:3d9c67d97d6f 263 while(sample > 0u) {
emh203 0:3d9c67d97d6f 264 Xn1 = *pIn++;
emh203 0:3d9c67d97d6f 265
emh203 0:3d9c67d97d6f 266 p0 = b0 * Xn1;
emh203 0:3d9c67d97d6f 267 p1 = b1 * Xn1;
emh203 0:3d9c67d97d6f 268 acc1 = p0 + d1;
emh203 0:3d9c67d97d6f 269 p3 = a1 * acc1;
emh203 0:3d9c67d97d6f 270 p2 = b2 * Xn1;
emh203 0:3d9c67d97d6f 271 A1 = p1 + p3;
emh203 0:3d9c67d97d6f 272 p4 = a2 * acc1;
emh203 0:3d9c67d97d6f 273 d1 = A1 + d2;
emh203 0:3d9c67d97d6f 274 d2 = p2 + p4;
emh203 0:3d9c67d97d6f 275
emh203 0:3d9c67d97d6f 276 *pOut++ = acc1;
emh203 0:3d9c67d97d6f 277
emh203 0:3d9c67d97d6f 278 sample--;
emh203 0:3d9c67d97d6f 279 }
emh203 0:3d9c67d97d6f 280
emh203 0:3d9c67d97d6f 281 /* Store the updated state variables back into the state array */
emh203 0:3d9c67d97d6f 282 *pState++ = d1;
emh203 0:3d9c67d97d6f 283 *pState++ = d2;
emh203 0:3d9c67d97d6f 284
emh203 0:3d9c67d97d6f 285 /* The current stage input is given as the output to the next stage */
emh203 0:3d9c67d97d6f 286 pIn = pDst;
emh203 0:3d9c67d97d6f 287
emh203 0:3d9c67d97d6f 288 /*Reset the output working pointer */
emh203 0:3d9c67d97d6f 289 pOut = pDst;
emh203 0:3d9c67d97d6f 290
emh203 0:3d9c67d97d6f 291 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 292 stage--;
emh203 0:3d9c67d97d6f 293
emh203 0:3d9c67d97d6f 294 } while(stage > 0u);
emh203 0:3d9c67d97d6f 295
emh203 0:3d9c67d97d6f 296 #else
emh203 0:3d9c67d97d6f 297
emh203 0:3d9c67d97d6f 298 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 299
emh203 0:3d9c67d97d6f 300 do
emh203 0:3d9c67d97d6f 301 {
emh203 0:3d9c67d97d6f 302 /* Reading the coefficients */
emh203 0:3d9c67d97d6f 303 b0 = *pCoeffs++;
emh203 0:3d9c67d97d6f 304 b1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 305 b2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 306 a1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 307 a2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 308
emh203 0:3d9c67d97d6f 309 /*Reading the state values */
emh203 0:3d9c67d97d6f 310 d1 = pState[0];
emh203 0:3d9c67d97d6f 311 d2 = pState[1];
emh203 0:3d9c67d97d6f 312
emh203 0:3d9c67d97d6f 313
emh203 0:3d9c67d97d6f 314 sample = blockSize;
emh203 0:3d9c67d97d6f 315
emh203 0:3d9c67d97d6f 316 while(sample > 0u)
emh203 0:3d9c67d97d6f 317 {
emh203 0:3d9c67d97d6f 318 /* Read the input */
emh203 0:3d9c67d97d6f 319 Xn1 = *pIn++;
emh203 0:3d9c67d97d6f 320
emh203 0:3d9c67d97d6f 321 /* y[n] = b0 * x[n] + d1 */
emh203 0:3d9c67d97d6f 322 acc1 = (b0 * Xn1) + d1;
emh203 0:3d9c67d97d6f 323
emh203 0:3d9c67d97d6f 324 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 325 *pOut++ = acc1;
emh203 0:3d9c67d97d6f 326
emh203 0:3d9c67d97d6f 327 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 328 /* d1 = b1 * x[n] + a1 * y[n] + d2 */
emh203 0:3d9c67d97d6f 329 d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
emh203 0:3d9c67d97d6f 330
emh203 0:3d9c67d97d6f 331 /* d2 = b2 * x[n] + a2 * y[n] */
emh203 0:3d9c67d97d6f 332 d2 = (b2 * Xn1) + (a2 * acc1);
emh203 0:3d9c67d97d6f 333
emh203 0:3d9c67d97d6f 334 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 335 sample--;
emh203 0:3d9c67d97d6f 336 }
emh203 0:3d9c67d97d6f 337
emh203 0:3d9c67d97d6f 338 /* Store the updated state variables back into the state array */
emh203 0:3d9c67d97d6f 339 *pState++ = d1;
emh203 0:3d9c67d97d6f 340 *pState++ = d2;
emh203 0:3d9c67d97d6f 341
emh203 0:3d9c67d97d6f 342 /* The current stage input is given as the output to the next stage */
emh203 0:3d9c67d97d6f 343 pIn = pDst;
emh203 0:3d9c67d97d6f 344
emh203 0:3d9c67d97d6f 345 /*Reset the output working pointer */
emh203 0:3d9c67d97d6f 346 pOut = pDst;
emh203 0:3d9c67d97d6f 347
emh203 0:3d9c67d97d6f 348 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 349 stage--;
emh203 0:3d9c67d97d6f 350
emh203 0:3d9c67d97d6f 351 } while(stage > 0u);
emh203 0:3d9c67d97d6f 352
emh203 0:3d9c67d97d6f 353 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 354
emh203 0:3d9c67d97d6f 355 }
emh203 0:3d9c67d97d6f 356 LOW_OPTIMIZATION_EXIT
emh203 0:3d9c67d97d6f 357
emh203 0:3d9c67d97d6f 358 /**
emh203 0:3d9c67d97d6f 359 * @} end of BiquadCascadeDF2T group
emh203 0:3d9c67d97d6f 360 */