Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

ComplexMathFunctions/arm_cmplx_mult_real_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_mult_real_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point complex by real multiplication
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupCmplxMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @defgroup CmplxByRealMult Complex-by-Real Multiplication
emh203 0:3d9c67d97d6f 49 *
emh203 0:3d9c67d97d6f 50 * Multiplies a complex vector by a real vector and generates a complex result.
emh203 0:3d9c67d97d6f 51 * The data in the complex arrays is stored in an interleaved fashion
emh203 0:3d9c67d97d6f 52 * (real, imag, real, imag, ...).
emh203 0:3d9c67d97d6f 53 * The parameter <code>numSamples</code> represents the number of complex
emh203 0:3d9c67d97d6f 54 * samples processed. The complex arrays have a total of <code>2*numSamples</code>
emh203 0:3d9c67d97d6f 55 * real values while the real array has a total of <code>numSamples</code>
emh203 0:3d9c67d97d6f 56 * real values.
emh203 0:3d9c67d97d6f 57 *
emh203 0:3d9c67d97d6f 58 * The underlying algorithm is used:
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <pre>
emh203 0:3d9c67d97d6f 61 * for(n=0; n<numSamples; n++) {
emh203 0:3d9c67d97d6f 62 * pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
emh203 0:3d9c67d97d6f 63 * pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
emh203 0:3d9c67d97d6f 64 * }
emh203 0:3d9c67d97d6f 65 * </pre>
emh203 0:3d9c67d97d6f 66 *
emh203 0:3d9c67d97d6f 67 * There are separate functions for floating-point, Q15, and Q31 data types.
emh203 0:3d9c67d97d6f 68 */
emh203 0:3d9c67d97d6f 69
emh203 0:3d9c67d97d6f 70 /**
emh203 0:3d9c67d97d6f 71 * @addtogroup CmplxByRealMult
emh203 0:3d9c67d97d6f 72 * @{
emh203 0:3d9c67d97d6f 73 */
emh203 0:3d9c67d97d6f 74
emh203 0:3d9c67d97d6f 75
emh203 0:3d9c67d97d6f 76 /**
emh203 0:3d9c67d97d6f 77 * @brief Floating-point complex-by-real multiplication
emh203 0:3d9c67d97d6f 78 * @param[in] *pSrcCmplx points to the complex input vector
emh203 0:3d9c67d97d6f 79 * @param[in] *pSrcReal points to the real input vector
emh203 0:3d9c67d97d6f 80 * @param[out] *pCmplxDst points to the complex output vector
emh203 0:3d9c67d97d6f 81 * @param[in] numSamples number of samples in each vector
emh203 0:3d9c67d97d6f 82 * @return none.
emh203 0:3d9c67d97d6f 83 */
emh203 0:3d9c67d97d6f 84
emh203 0:3d9c67d97d6f 85 void arm_cmplx_mult_real_f32(
emh203 0:3d9c67d97d6f 86 float32_t * pSrcCmplx,
emh203 0:3d9c67d97d6f 87 float32_t * pSrcReal,
emh203 0:3d9c67d97d6f 88 float32_t * pCmplxDst,
emh203 0:3d9c67d97d6f 89 uint32_t numSamples)
emh203 0:3d9c67d97d6f 90 {
emh203 0:3d9c67d97d6f 91 float32_t in; /* Temporary variable to store input value */
emh203 0:3d9c67d97d6f 92 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 93
emh203 0:3d9c67d97d6f 94 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 95
emh203 0:3d9c67d97d6f 96 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 97 float32_t inA1, inA2, inA3, inA4; /* Temporary variables to hold input data */
emh203 0:3d9c67d97d6f 98 float32_t inA5, inA6, inA7, inA8; /* Temporary variables to hold input data */
emh203 0:3d9c67d97d6f 99 float32_t inB1, inB2, inB3, inB4; /* Temporary variables to hold input data */
emh203 0:3d9c67d97d6f 100 float32_t out1, out2, out3, out4; /* Temporary variables to hold output data */
emh203 0:3d9c67d97d6f 101 float32_t out5, out6, out7, out8; /* Temporary variables to hold output data */
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /* loop Unrolling */
emh203 0:3d9c67d97d6f 104 blkCnt = numSamples >> 2u;
emh203 0:3d9c67d97d6f 105
emh203 0:3d9c67d97d6f 106 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 107 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 108 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 109 {
emh203 0:3d9c67d97d6f 110 /* C[2 * i] = A[2 * i] * B[i]. */
emh203 0:3d9c67d97d6f 111 /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
emh203 0:3d9c67d97d6f 112 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 113 inA1 = pSrcCmplx[0];
emh203 0:3d9c67d97d6f 114 inA2 = pSrcCmplx[1];
emh203 0:3d9c67d97d6f 115 /* read input from real input buffer */
emh203 0:3d9c67d97d6f 116 inB1 = pSrcReal[0];
emh203 0:3d9c67d97d6f 117
emh203 0:3d9c67d97d6f 118 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 119 inA3 = pSrcCmplx[2];
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121 /* multiply complex buffer real input with real buffer input */
emh203 0:3d9c67d97d6f 122 out1 = inA1 * inB1;
emh203 0:3d9c67d97d6f 123
emh203 0:3d9c67d97d6f 124 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 125 inA4 = pSrcCmplx[3];
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 /* multiply complex buffer imaginary input with real buffer input */
emh203 0:3d9c67d97d6f 128 out2 = inA2 * inB1;
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 /* read input from real input buffer */
emh203 0:3d9c67d97d6f 131 inB2 = pSrcReal[1];
emh203 0:3d9c67d97d6f 132 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 133 inA5 = pSrcCmplx[4];
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 /* multiply complex buffer real input with real buffer input */
emh203 0:3d9c67d97d6f 136 out3 = inA3 * inB2;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 139 inA6 = pSrcCmplx[5];
emh203 0:3d9c67d97d6f 140 /* read input from real input buffer */
emh203 0:3d9c67d97d6f 141 inB3 = pSrcReal[2];
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 /* multiply complex buffer imaginary input with real buffer input */
emh203 0:3d9c67d97d6f 144 out4 = inA4 * inB2;
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 147 inA7 = pSrcCmplx[6];
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 /* multiply complex buffer real input with real buffer input */
emh203 0:3d9c67d97d6f 150 out5 = inA5 * inB3;
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /* read input from complex input buffer */
emh203 0:3d9c67d97d6f 153 inA8 = pSrcCmplx[7];
emh203 0:3d9c67d97d6f 154
emh203 0:3d9c67d97d6f 155 /* multiply complex buffer imaginary input with real buffer input */
emh203 0:3d9c67d97d6f 156 out6 = inA6 * inB3;
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 /* read input from real input buffer */
emh203 0:3d9c67d97d6f 159 inB4 = pSrcReal[3];
emh203 0:3d9c67d97d6f 160
emh203 0:3d9c67d97d6f 161 /* store result to destination bufer */
emh203 0:3d9c67d97d6f 162 pCmplxDst[0] = out1;
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 /* multiply complex buffer real input with real buffer input */
emh203 0:3d9c67d97d6f 165 out7 = inA7 * inB4;
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 /* store result to destination bufer */
emh203 0:3d9c67d97d6f 168 pCmplxDst[1] = out2;
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 /* multiply complex buffer imaginary input with real buffer input */
emh203 0:3d9c67d97d6f 171 out8 = inA8 * inB4;
emh203 0:3d9c67d97d6f 172
emh203 0:3d9c67d97d6f 173 /* store result to destination bufer */
emh203 0:3d9c67d97d6f 174 pCmplxDst[2] = out3;
emh203 0:3d9c67d97d6f 175 pCmplxDst[3] = out4;
emh203 0:3d9c67d97d6f 176 pCmplxDst[4] = out5;
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 /* incremnet complex input buffer by 8 to process next samples */
emh203 0:3d9c67d97d6f 179 pSrcCmplx += 8u;
emh203 0:3d9c67d97d6f 180
emh203 0:3d9c67d97d6f 181 /* store result to destination bufer */
emh203 0:3d9c67d97d6f 182 pCmplxDst[5] = out6;
emh203 0:3d9c67d97d6f 183
emh203 0:3d9c67d97d6f 184 /* increment real input buffer by 4 to process next samples */
emh203 0:3d9c67d97d6f 185 pSrcReal += 4u;
emh203 0:3d9c67d97d6f 186
emh203 0:3d9c67d97d6f 187 /* store result to destination bufer */
emh203 0:3d9c67d97d6f 188 pCmplxDst[6] = out7;
emh203 0:3d9c67d97d6f 189 pCmplxDst[7] = out8;
emh203 0:3d9c67d97d6f 190
emh203 0:3d9c67d97d6f 191 /* increment destination buffer by 8 to process next sampels */
emh203 0:3d9c67d97d6f 192 pCmplxDst += 8u;
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 195 blkCnt--;
emh203 0:3d9c67d97d6f 196 }
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 199 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 200 blkCnt = numSamples % 0x4u;
emh203 0:3d9c67d97d6f 201
emh203 0:3d9c67d97d6f 202 #else
emh203 0:3d9c67d97d6f 203
emh203 0:3d9c67d97d6f 204 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 205 blkCnt = numSamples;
emh203 0:3d9c67d97d6f 206
emh203 0:3d9c67d97d6f 207 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 208
emh203 0:3d9c67d97d6f 209 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 210 {
emh203 0:3d9c67d97d6f 211 /* C[2 * i] = A[2 * i] * B[i]. */
emh203 0:3d9c67d97d6f 212 /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
emh203 0:3d9c67d97d6f 213 in = *pSrcReal++;
emh203 0:3d9c67d97d6f 214 /* store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 215 *pCmplxDst++ = (*pSrcCmplx++) * (in);
emh203 0:3d9c67d97d6f 216 *pCmplxDst++ = (*pSrcCmplx++) * (in);
emh203 0:3d9c67d97d6f 217
emh203 0:3d9c67d97d6f 218 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 219 blkCnt--;
emh203 0:3d9c67d97d6f 220 }
emh203 0:3d9c67d97d6f 221 }
emh203 0:3d9c67d97d6f 222
emh203 0:3d9c67d97d6f 223 /**
emh203 0:3d9c67d97d6f 224 * @} end of CmplxByRealMult group
emh203 0:3d9c67d97d6f 225 */