V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_mult_cmplx_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point complex-by-complex multiplication
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40 #include "arm_math.h"
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 /**
emh203 0:3d9c67d97d6f 43 * @ingroup groupCmplxMath
emh203 0:3d9c67d97d6f 44 */
emh203 0:3d9c67d97d6f 45
emh203 0:3d9c67d97d6f 46 /**
emh203 0:3d9c67d97d6f 47 * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
emh203 0:3d9c67d97d6f 48 *
emh203 0:3d9c67d97d6f 49 * Multiplies a complex vector by another complex vector and generates a complex result.
emh203 0:3d9c67d97d6f 50 * The data in the complex arrays is stored in an interleaved fashion
emh203 0:3d9c67d97d6f 51 * (real, imag, real, imag, ...).
emh203 0:3d9c67d97d6f 52 * The parameter <code>numSamples</code> represents the number of complex
emh203 0:3d9c67d97d6f 53 * samples processed. The complex arrays have a total of <code>2*numSamples</code>
emh203 0:3d9c67d97d6f 54 * real values.
emh203 0:3d9c67d97d6f 55 *
emh203 0:3d9c67d97d6f 56 * The underlying algorithm is used:
emh203 0:3d9c67d97d6f 57 *
emh203 0:3d9c67d97d6f 58 * <pre>
emh203 0:3d9c67d97d6f 59 * for(n=0; n<numSamples; n++) {
emh203 0:3d9c67d97d6f 60 * pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
emh203 0:3d9c67d97d6f 61 * pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
emh203 0:3d9c67d97d6f 62 * }
emh203 0:3d9c67d97d6f 63 * </pre>
emh203 0:3d9c67d97d6f 64 *
emh203 0:3d9c67d97d6f 65 * There are separate functions for floating-point, Q15, and Q31 data types.
emh203 0:3d9c67d97d6f 66 */
emh203 0:3d9c67d97d6f 67
emh203 0:3d9c67d97d6f 68 /**
emh203 0:3d9c67d97d6f 69 * @addtogroup CmplxByCmplxMult
emh203 0:3d9c67d97d6f 70 * @{
emh203 0:3d9c67d97d6f 71 */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73
emh203 0:3d9c67d97d6f 74 /**
emh203 0:3d9c67d97d6f 75 * @brief Floating-point complex-by-complex multiplication
emh203 0:3d9c67d97d6f 76 * @param[in] *pSrcA points to the first input vector
emh203 0:3d9c67d97d6f 77 * @param[in] *pSrcB points to the second input vector
emh203 0:3d9c67d97d6f 78 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 79 * @param[in] numSamples number of complex samples in each vector
emh203 0:3d9c67d97d6f 80 * @return none.
emh203 0:3d9c67d97d6f 81 */
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 void arm_cmplx_mult_cmplx_f32(
emh203 0:3d9c67d97d6f 84 float32_t * pSrcA,
emh203 0:3d9c67d97d6f 85 float32_t * pSrcB,
emh203 0:3d9c67d97d6f 86 float32_t * pDst,
emh203 0:3d9c67d97d6f 87 uint32_t numSamples)
emh203 0:3d9c67d97d6f 88 {
emh203 0:3d9c67d97d6f 89 float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */
emh203 0:3d9c67d97d6f 90 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 93
emh203 0:3d9c67d97d6f 94 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 95 float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */
emh203 0:3d9c67d97d6f 96 float32_t acc1, acc2, acc3, acc4;
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 /* loop Unrolling */
emh203 0:3d9c67d97d6f 100 blkCnt = numSamples >> 2u;
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 103 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 104 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 105 {
emh203 0:3d9c67d97d6f 106 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emh203 0:3d9c67d97d6f 107 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emh203 0:3d9c67d97d6f 108 a1 = *pSrcA; /* A[2 * i] */
emh203 0:3d9c67d97d6f 109 c1 = *pSrcB; /* B[2 * i] */
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 b1 = *(pSrcA + 1); /* A[2 * i + 1] */
emh203 0:3d9c67d97d6f 112 acc1 = a1 * c1; /* acc1 = A[2 * i] * B[2 * i] */
emh203 0:3d9c67d97d6f 113
emh203 0:3d9c67d97d6f 114 a2 = *(pSrcA + 2); /* A[2 * i + 2] */
emh203 0:3d9c67d97d6f 115 acc2 = (b1 * c1); /* acc2 = A[2 * i + 1] * B[2 * i] */
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 d1 = *(pSrcB + 1); /* B[2 * i + 1] */
emh203 0:3d9c67d97d6f 118 c2 = *(pSrcB + 2); /* B[2 * i + 2] */
emh203 0:3d9c67d97d6f 119 acc1 -= b1 * d1; /* acc1 = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121 d2 = *(pSrcB + 3); /* B[2 * i + 3] */
emh203 0:3d9c67d97d6f 122 acc3 = a2 * c2; /* acc3 = A[2 * i + 2] * B[2 * i + 2] */
emh203 0:3d9c67d97d6f 123
emh203 0:3d9c67d97d6f 124 b2 = *(pSrcA + 3); /* A[2 * i + 3] */
emh203 0:3d9c67d97d6f 125 acc2 += (a1 * d1); /* acc2 = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 a1 = *(pSrcA + 4); /* A[2 * i + 4] */
emh203 0:3d9c67d97d6f 128 acc4 = (a2 * d2); /* acc4 = A[2 * i + 2] * B[2 * i + 3] */
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 c1 = *(pSrcB + 4); /* B[2 * i + 4] */
emh203 0:3d9c67d97d6f 131 acc3 -= (b2 * d2); /* acc3 = A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
emh203 0:3d9c67d97d6f 132 *pDst = acc1; /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
emh203 0:3d9c67d97d6f 133
emh203 0:3d9c67d97d6f 134 b1 = *(pSrcA + 5); /* A[2 * i + 5] */
emh203 0:3d9c67d97d6f 135 acc4 += b2 * c2; /* acc4 = A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
emh203 0:3d9c67d97d6f 136
emh203 0:3d9c67d97d6f 137 *(pDst + 1) = acc2; /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
emh203 0:3d9c67d97d6f 138 acc1 = (a1 * c1);
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 d1 = *(pSrcB + 5);
emh203 0:3d9c67d97d6f 141 acc2 = (b1 * c1);
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 *(pDst + 2) = acc3;
emh203 0:3d9c67d97d6f 144 *(pDst + 3) = acc4;
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 a2 = *(pSrcA + 6);
emh203 0:3d9c67d97d6f 147 acc1 -= (b1 * d1);
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 c2 = *(pSrcB + 6);
emh203 0:3d9c67d97d6f 150 acc2 += (a1 * d1);
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 b2 = *(pSrcA + 7);
emh203 0:3d9c67d97d6f 153 acc3 = (a2 * c2);
emh203 0:3d9c67d97d6f 154
emh203 0:3d9c67d97d6f 155 d2 = *(pSrcB + 7);
emh203 0:3d9c67d97d6f 156 acc4 = (b2 * c2);
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 *(pDst + 4) = acc1;
emh203 0:3d9c67d97d6f 159 pSrcA += 8u;
emh203 0:3d9c67d97d6f 160
emh203 0:3d9c67d97d6f 161 acc3 -= (b2 * d2);
emh203 0:3d9c67d97d6f 162 acc4 += (a2 * d2);
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 *(pDst + 5) = acc2;
emh203 0:3d9c67d97d6f 165 pSrcB += 8u;
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 *(pDst + 6) = acc3;
emh203 0:3d9c67d97d6f 168 *(pDst + 7) = acc4;
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 pDst += 8u;
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 173 blkCnt--;
emh203 0:3d9c67d97d6f 174 }
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 177 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 178 blkCnt = numSamples % 0x4u;
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 #else
emh203 0:3d9c67d97d6f 181
emh203 0:3d9c67d97d6f 182 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 183 blkCnt = numSamples;
emh203 0:3d9c67d97d6f 184
emh203 0:3d9c67d97d6f 185 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 186
emh203 0:3d9c67d97d6f 187 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 188 {
emh203 0:3d9c67d97d6f 189 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emh203 0:3d9c67d97d6f 190 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emh203 0:3d9c67d97d6f 191 a1 = *pSrcA++;
emh203 0:3d9c67d97d6f 192 b1 = *pSrcA++;
emh203 0:3d9c67d97d6f 193 c1 = *pSrcB++;
emh203 0:3d9c67d97d6f 194 d1 = *pSrcB++;
emh203 0:3d9c67d97d6f 195
emh203 0:3d9c67d97d6f 196 /* store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 197 *pDst++ = (a1 * c1) - (b1 * d1);
emh203 0:3d9c67d97d6f 198 *pDst++ = (a1 * d1) + (b1 * c1);
emh203 0:3d9c67d97d6f 199
emh203 0:3d9c67d97d6f 200 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 201 blkCnt--;
emh203 0:3d9c67d97d6f 202 }
emh203 0:3d9c67d97d6f 203 }
emh203 0:3d9c67d97d6f 204
emh203 0:3d9c67d97d6f 205 /**
emh203 0:3d9c67d97d6f 206 * @} end of CmplxByCmplxMult group
emh203 0:3d9c67d97d6f 207 */