Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_shift_q31.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_shift_q31.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Shifts the elements of a Q31 vector by a specified number of bits.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46 /**
emh203 0:3d9c67d97d6f 47 * @defgroup shift Vector Shift
emh203 0:3d9c67d97d6f 48 *
emh203 0:3d9c67d97d6f 49 * Shifts the elements of a fixed-point vector by a specified number of bits.
emh203 0:3d9c67d97d6f 50 * There are separate functions for Q7, Q15, and Q31 data types.
emh203 0:3d9c67d97d6f 51 * The underlying algorithm used is:
emh203 0:3d9c67d97d6f 52 *
emh203 0:3d9c67d97d6f 53 * <pre>
emh203 0:3d9c67d97d6f 54 * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
emh203 0:3d9c67d97d6f 55 * </pre>
emh203 0:3d9c67d97d6f 56 *
emh203 0:3d9c67d97d6f 57 * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
emh203 0:3d9c67d97d6f 58 * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * The functions support in-place computation allowing the source and destination
emh203 0:3d9c67d97d6f 61 * pointers to reference the same memory buffer.
emh203 0:3d9c67d97d6f 62 */
emh203 0:3d9c67d97d6f 63
emh203 0:3d9c67d97d6f 64 /**
emh203 0:3d9c67d97d6f 65 * @addtogroup shift
emh203 0:3d9c67d97d6f 66 * @{
emh203 0:3d9c67d97d6f 67 */
emh203 0:3d9c67d97d6f 68
emh203 0:3d9c67d97d6f 69 /**
emh203 0:3d9c67d97d6f 70 * @brief Shifts the elements of a Q31 vector a specified number of bits.
emh203 0:3d9c67d97d6f 71 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 72 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
emh203 0:3d9c67d97d6f 73 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 74 * @param[in] blockSize number of samples in the vector
emh203 0:3d9c67d97d6f 75 * @return none.
emh203 0:3d9c67d97d6f 76 *
emh203 0:3d9c67d97d6f 77 *
emh203 0:3d9c67d97d6f 78 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 79 * \par
emh203 0:3d9c67d97d6f 80 * The function uses saturating arithmetic.
emh203 0:3d9c67d97d6f 81 * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
emh203 0:3d9c67d97d6f 82 */
emh203 0:3d9c67d97d6f 83
emh203 0:3d9c67d97d6f 84 void arm_shift_q31(
emh203 0:3d9c67d97d6f 85 q31_t * pSrc,
emh203 0:3d9c67d97d6f 86 int8_t shiftBits,
emh203 0:3d9c67d97d6f 87 q31_t * pDst,
emh203 0:3d9c67d97d6f 88 uint32_t blockSize)
emh203 0:3d9c67d97d6f 89 {
emh203 0:3d9c67d97d6f 90 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 91 uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
emh203 0:3d9c67d97d6f 92
emh203 0:3d9c67d97d6f 93 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 94
emh203 0:3d9c67d97d6f 95 q31_t in1, in2, in3, in4; /* Temporary input variables */
emh203 0:3d9c67d97d6f 96 q31_t out1, out2, out3, out4; /* Temporary output variables */
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98 /*loop Unrolling */
emh203 0:3d9c67d97d6f 99 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 if(sign == 0u)
emh203 0:3d9c67d97d6f 103 {
emh203 0:3d9c67d97d6f 104 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 105 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 106 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 107 {
emh203 0:3d9c67d97d6f 108 /* C = A << shiftBits */
emh203 0:3d9c67d97d6f 109 /* Shift the input and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 110 in1 = *pSrc;
emh203 0:3d9c67d97d6f 111 in2 = *(pSrc + 1);
emh203 0:3d9c67d97d6f 112 out1 = in1 << shiftBits;
emh203 0:3d9c67d97d6f 113 in3 = *(pSrc + 2);
emh203 0:3d9c67d97d6f 114 out2 = in2 << shiftBits;
emh203 0:3d9c67d97d6f 115 in4 = *(pSrc + 3);
emh203 0:3d9c67d97d6f 116 if(in1 != (out1 >> shiftBits))
emh203 0:3d9c67d97d6f 117 out1 = 0x7FFFFFFF ^ (in1 >> 31);
emh203 0:3d9c67d97d6f 118
emh203 0:3d9c67d97d6f 119 if(in2 != (out2 >> shiftBits))
emh203 0:3d9c67d97d6f 120 out2 = 0x7FFFFFFF ^ (in2 >> 31);
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 *pDst = out1;
emh203 0:3d9c67d97d6f 123 out3 = in3 << shiftBits;
emh203 0:3d9c67d97d6f 124 *(pDst + 1) = out2;
emh203 0:3d9c67d97d6f 125 out4 = in4 << shiftBits;
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 if(in3 != (out3 >> shiftBits))
emh203 0:3d9c67d97d6f 128 out3 = 0x7FFFFFFF ^ (in3 >> 31);
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 if(in4 != (out4 >> shiftBits))
emh203 0:3d9c67d97d6f 131 out4 = 0x7FFFFFFF ^ (in4 >> 31);
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 *(pDst + 2) = out3;
emh203 0:3d9c67d97d6f 134 *(pDst + 3) = out4;
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /* Update destination pointer to process next sampels */
emh203 0:3d9c67d97d6f 137 pSrc += 4u;
emh203 0:3d9c67d97d6f 138 pDst += 4u;
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 141 blkCnt--;
emh203 0:3d9c67d97d6f 142 }
emh203 0:3d9c67d97d6f 143 }
emh203 0:3d9c67d97d6f 144 else
emh203 0:3d9c67d97d6f 145 {
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 148 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 149 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 150 {
emh203 0:3d9c67d97d6f 151 /* C = A >> shiftBits */
emh203 0:3d9c67d97d6f 152 /* Shift the input and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 153 in1 = *pSrc;
emh203 0:3d9c67d97d6f 154 in2 = *(pSrc + 1);
emh203 0:3d9c67d97d6f 155 in3 = *(pSrc + 2);
emh203 0:3d9c67d97d6f 156 in4 = *(pSrc + 3);
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 *pDst = (in1 >> -shiftBits);
emh203 0:3d9c67d97d6f 159 *(pDst + 1) = (in2 >> -shiftBits);
emh203 0:3d9c67d97d6f 160 *(pDst + 2) = (in3 >> -shiftBits);
emh203 0:3d9c67d97d6f 161 *(pDst + 3) = (in4 >> -shiftBits);
emh203 0:3d9c67d97d6f 162
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 pSrc += 4u;
emh203 0:3d9c67d97d6f 165 pDst += 4u;
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 blkCnt--;
emh203 0:3d9c67d97d6f 168 }
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 }
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 173 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 174 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 #else
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180
emh203 0:3d9c67d97d6f 181 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 182 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 183
emh203 0:3d9c67d97d6f 184 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186
emh203 0:3d9c67d97d6f 187 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 188 {
emh203 0:3d9c67d97d6f 189 /* C = A (>> or <<) shiftBits */
emh203 0:3d9c67d97d6f 190 /* Shift the input and then store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 191 *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
emh203 0:3d9c67d97d6f 192 (*pSrc++ >> -shiftBits);
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 195 blkCnt--;
emh203 0:3d9c67d97d6f 196 }
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 }
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 /**
emh203 0:3d9c67d97d6f 202 * @} end of shift group
emh203 0:3d9c67d97d6f 203 */