Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

TransformFunctions/arm_rfft_fast_init_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cfft_init_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Split Radix Decimation in Frequency CFFT Floating point processing function
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42 #include "arm_common_tables.h"
emh203 0:3d9c67d97d6f 43
emh203 0:3d9c67d97d6f 44 /**
emh203 0:3d9c67d97d6f 45 * @ingroup groupTransforms
emh203 0:3d9c67d97d6f 46 */
emh203 0:3d9c67d97d6f 47
emh203 0:3d9c67d97d6f 48 /**
emh203 0:3d9c67d97d6f 49 * @addtogroup RealFFT
emh203 0:3d9c67d97d6f 50 * @{
emh203 0:3d9c67d97d6f 51 */
emh203 0:3d9c67d97d6f 52
emh203 0:3d9c67d97d6f 53 /**
emh203 0:3d9c67d97d6f 54 * @brief Initialization function for the floating-point real FFT.
emh203 0:3d9c67d97d6f 55 * @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
emh203 0:3d9c67d97d6f 56 * @param[in] fftLen length of the Real Sequence.
emh203 0:3d9c67d97d6f 57 * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
emh203 0:3d9c67d97d6f 58 *
emh203 0:3d9c67d97d6f 59 * \par Description:
emh203 0:3d9c67d97d6f 60 * \par
emh203 0:3d9c67d97d6f 61 * The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
emh203 0:3d9c67d97d6f 62 * Set(=1) ifftFlag for calculation of CIFFT otherwise RFFT is calculated
emh203 0:3d9c67d97d6f 63 * \par
emh203 0:3d9c67d97d6f 64 * The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
emh203 0:3d9c67d97d6f 65 * Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
emh203 0:3d9c67d97d6f 66 * \par
emh203 0:3d9c67d97d6f 67 * The parameter <code>fftLen</code> Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 16, 32, 64, 128, 256, 512, 1024, 2048, 4096.
emh203 0:3d9c67d97d6f 68 * \par
emh203 0:3d9c67d97d6f 69 * This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
emh203 0:3d9c67d97d6f 70 */
emh203 0:3d9c67d97d6f 71 arm_status arm_rfft_fast_init_f32(
emh203 0:3d9c67d97d6f 72 arm_rfft_fast_instance_f32 * S,
emh203 0:3d9c67d97d6f 73 uint16_t fftLen)
emh203 0:3d9c67d97d6f 74 {
emh203 0:3d9c67d97d6f 75 arm_cfft_instance_f32 * Sint;
emh203 0:3d9c67d97d6f 76 /* Initialise the default arm status */
emh203 0:3d9c67d97d6f 77 arm_status status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 78 /* Initialise the FFT length */
emh203 0:3d9c67d97d6f 79 Sint = &(S->Sint);
emh203 0:3d9c67d97d6f 80 Sint->fftLen = fftLen/2;
emh203 0:3d9c67d97d6f 81 S->fftLenRFFT = fftLen;
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 /* Initializations of structure parameters depending on the FFT length */
emh203 0:3d9c67d97d6f 84 switch (Sint->fftLen)
emh203 0:3d9c67d97d6f 85 {
emh203 0:3d9c67d97d6f 86 case 2048u:
emh203 0:3d9c67d97d6f 87 /* Initializations of structure parameters for 2048 point FFT */
emh203 0:3d9c67d97d6f 88 /* Initialise the bit reversal table length */
emh203 0:3d9c67d97d6f 89 Sint->bitRevLength = ARMBITREVINDEXTABLE2048_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 90 /* Initialise the bit reversal table pointer */
emh203 0:3d9c67d97d6f 91 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
emh203 0:3d9c67d97d6f 92 /* Initialise the Twiddle coefficient pointers */
emh203 0:3d9c67d97d6f 93 Sint->pTwiddle = (float32_t *) twiddleCoef_2048;
emh203 0:3d9c67d97d6f 94 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_4096;
emh203 0:3d9c67d97d6f 95 break;
emh203 0:3d9c67d97d6f 96 case 1024u:
emh203 0:3d9c67d97d6f 97 Sint->bitRevLength = ARMBITREVINDEXTABLE1024_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 98 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
emh203 0:3d9c67d97d6f 99 Sint->pTwiddle = (float32_t *) twiddleCoef_1024;
emh203 0:3d9c67d97d6f 100 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_2048;
emh203 0:3d9c67d97d6f 101 break;
emh203 0:3d9c67d97d6f 102 case 512u:
emh203 0:3d9c67d97d6f 103 Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 104 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
emh203 0:3d9c67d97d6f 105 Sint->pTwiddle = (float32_t *) twiddleCoef_512;
emh203 0:3d9c67d97d6f 106 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_1024;
emh203 0:3d9c67d97d6f 107 break;
emh203 0:3d9c67d97d6f 108 case 256u:
emh203 0:3d9c67d97d6f 109 Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 110 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
emh203 0:3d9c67d97d6f 111 Sint->pTwiddle = (float32_t *) twiddleCoef_256;
emh203 0:3d9c67d97d6f 112 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_512;
emh203 0:3d9c67d97d6f 113 break;
emh203 0:3d9c67d97d6f 114 case 128u:
emh203 0:3d9c67d97d6f 115 Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 116 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
emh203 0:3d9c67d97d6f 117 Sint->pTwiddle = (float32_t *) twiddleCoef_128;
emh203 0:3d9c67d97d6f 118 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_256;
emh203 0:3d9c67d97d6f 119 break;
emh203 0:3d9c67d97d6f 120 case 64u:
emh203 0:3d9c67d97d6f 121 Sint->bitRevLength = ARMBITREVINDEXTABLE__64_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 122 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
emh203 0:3d9c67d97d6f 123 Sint->pTwiddle = (float32_t *) twiddleCoef_64;
emh203 0:3d9c67d97d6f 124 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_128;
emh203 0:3d9c67d97d6f 125 break;
emh203 0:3d9c67d97d6f 126 case 32u:
emh203 0:3d9c67d97d6f 127 Sint->bitRevLength = ARMBITREVINDEXTABLE__32_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 128 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
emh203 0:3d9c67d97d6f 129 Sint->pTwiddle = (float32_t *) twiddleCoef_32;
emh203 0:3d9c67d97d6f 130 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_64;
emh203 0:3d9c67d97d6f 131 break;
emh203 0:3d9c67d97d6f 132 case 16u:
emh203 0:3d9c67d97d6f 133 Sint->bitRevLength = ARMBITREVINDEXTABLE__16_TABLE_LENGTH;
emh203 0:3d9c67d97d6f 134 Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
emh203 0:3d9c67d97d6f 135 Sint->pTwiddle = (float32_t *) twiddleCoef_16;
emh203 0:3d9c67d97d6f 136 S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32;
emh203 0:3d9c67d97d6f 137 break;
emh203 0:3d9c67d97d6f 138 default:
emh203 0:3d9c67d97d6f 139 /* Reporting argument error if fftSize is not valid value */
emh203 0:3d9c67d97d6f 140 status = ARM_MATH_ARGUMENT_ERROR;
emh203 0:3d9c67d97d6f 141 break;
emh203 0:3d9c67d97d6f 142 }
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 return (status);
emh203 0:3d9c67d97d6f 145 }
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 /**
emh203 0:3d9c67d97d6f 148 * @} end of RealFFT group
emh203 0:3d9c67d97d6f 149 */