Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

SupportFunctions/arm_q15_to_q7.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_q15_to_q7.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Converts the elements of the Q15 vector to Q7 vector.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupSupport
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup q15_to_x
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52
emh203 0:3d9c67d97d6f 53 /**
emh203 0:3d9c67d97d6f 54 * @brief Converts the elements of the Q15 vector to Q7 vector.
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrc points to the Q15 input vector
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to the Q7 output vector
emh203 0:3d9c67d97d6f 57 * @param[in] blockSize length of the input vector
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * \par Description:
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 * The equation used for the conversion process is:
emh203 0:3d9c67d97d6f 63 *
emh203 0:3d9c67d97d6f 64 * <pre>
emh203 0:3d9c67d97d6f 65 * pDst[n] = (q7_t) pSrc[n] >> 8; 0 <= n < blockSize.
emh203 0:3d9c67d97d6f 66 * </pre>
emh203 0:3d9c67d97d6f 67 *
emh203 0:3d9c67d97d6f 68 */
emh203 0:3d9c67d97d6f 69
emh203 0:3d9c67d97d6f 70
emh203 0:3d9c67d97d6f 71 void arm_q15_to_q7(
emh203 0:3d9c67d97d6f 72 q15_t * pSrc,
emh203 0:3d9c67d97d6f 73 q7_t * pDst,
emh203 0:3d9c67d97d6f 74 uint32_t blockSize)
emh203 0:3d9c67d97d6f 75 {
emh203 0:3d9c67d97d6f 76 q15_t *pIn = pSrc; /* Src pointer */
emh203 0:3d9c67d97d6f 77 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 82 q31_t in1, in2;
emh203 0:3d9c67d97d6f 83 q31_t out1, out2;
emh203 0:3d9c67d97d6f 84
emh203 0:3d9c67d97d6f 85 /*loop Unrolling */
emh203 0:3d9c67d97d6f 86 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 89 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 90 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 91 {
emh203 0:3d9c67d97d6f 92 /* C = (q7_t) A >> 8 */
emh203 0:3d9c67d97d6f 93 /* convert from q15 to q7 and then store the results in the destination buffer */
emh203 0:3d9c67d97d6f 94 in1 = *__SIMD32(pIn)++;
emh203 0:3d9c67d97d6f 95 in2 = *__SIMD32(pIn)++;
emh203 0:3d9c67d97d6f 96
emh203 0:3d9c67d97d6f 97 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 out1 = __PKHTB(in2, in1, 16);
emh203 0:3d9c67d97d6f 100 out2 = __PKHBT(in2, in1, 16);
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 #else
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 out1 = __PKHTB(in1, in2, 16);
emh203 0:3d9c67d97d6f 105 out2 = __PKHBT(in1, in2, 16);
emh203 0:3d9c67d97d6f 106
emh203 0:3d9c67d97d6f 107 #endif // #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 108
emh203 0:3d9c67d97d6f 109 /* rotate packed value by 24 */
emh203 0:3d9c67d97d6f 110 out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
emh203 0:3d9c67d97d6f 111
emh203 0:3d9c67d97d6f 112 /* anding with 0xff00ff00 to get two 8 bit values */
emh203 0:3d9c67d97d6f 113 out1 = out1 & 0xFF00FF00;
emh203 0:3d9c67d97d6f 114 /* anding with 0x00ff00ff to get two 8 bit values */
emh203 0:3d9c67d97d6f 115 out2 = out2 & 0x00FF00FF;
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
emh203 0:3d9c67d97d6f 118 out1 = out1 | out2;
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 /* store 4 samples at a time to destiantion buffer */
emh203 0:3d9c67d97d6f 121 *__SIMD32(pDst)++ = out1;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 124 blkCnt--;
emh203 0:3d9c67d97d6f 125 }
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 128 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 129 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 #else
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 /* Loop over blockSize number of values */
emh203 0:3d9c67d97d6f 136 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 141 {
emh203 0:3d9c67d97d6f 142 /* C = (q7_t) A >> 8 */
emh203 0:3d9c67d97d6f 143 /* convert from q15 to q7 and then store the results in the destination buffer */
emh203 0:3d9c67d97d6f 144 *pDst++ = (q7_t) (*pIn++ >> 8);
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 147 blkCnt--;
emh203 0:3d9c67d97d6f 148 }
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 }
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /**
emh203 0:3d9c67d97d6f 153 * @} end of q15_to_x group
emh203 0:3d9c67d97d6f 154 */