Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

StatisticsFunctions/arm_power_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_power_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Sum of the squares of the elements of a Q15 vector.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupStats
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup power
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Sum of the squares of the elements of a Q15 vector.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 55 * @param[in] blockSize length of the input vector
emh203 0:3d9c67d97d6f 56 * @param[out] *pResult sum of the squares value returned here
emh203 0:3d9c67d97d6f 57 * @return none.
emh203 0:3d9c67d97d6f 58 *
emh203 0:3d9c67d97d6f 59 * @details
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 * \par
emh203 0:3d9c67d97d6f 63 * The function is implemented using a 64-bit internal accumulator.
emh203 0:3d9c67d97d6f 64 * The input is represented in 1.15 format.
emh203 0:3d9c67d97d6f 65 * Intermediate multiplication yields a 2.30 format, and this
emh203 0:3d9c67d97d6f 66 * result is added without saturation to a 64-bit accumulator in 34.30 format.
emh203 0:3d9c67d97d6f 67 * With 33 guard bits in the accumulator, there is no risk of overflow, and the
emh203 0:3d9c67d97d6f 68 * full precision of the intermediate multiplication is preserved.
emh203 0:3d9c67d97d6f 69 * Finally, the return result is in 34.30 format.
emh203 0:3d9c67d97d6f 70 *
emh203 0:3d9c67d97d6f 71 */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 void arm_power_q15(
emh203 0:3d9c67d97d6f 74 q15_t * pSrc,
emh203 0:3d9c67d97d6f 75 uint32_t blockSize,
emh203 0:3d9c67d97d6f 76 q63_t * pResult)
emh203 0:3d9c67d97d6f 77 {
emh203 0:3d9c67d97d6f 78 q63_t sum = 0; /* Temporary result storage */
emh203 0:3d9c67d97d6f 79
emh203 0:3d9c67d97d6f 80 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 83
emh203 0:3d9c67d97d6f 84 q31_t in32; /* Temporary variable to store input value */
emh203 0:3d9c67d97d6f 85 q15_t in16; /* Temporary variable to store input value */
emh203 0:3d9c67d97d6f 86 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88
emh203 0:3d9c67d97d6f 89 /* loop Unrolling */
emh203 0:3d9c67d97d6f 90 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 93 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 94 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 95 {
emh203 0:3d9c67d97d6f 96 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emh203 0:3d9c67d97d6f 97 /* Compute Power and then store the result in a temporary variable, sum. */
emh203 0:3d9c67d97d6f 98 in32 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 99 sum = __SMLALD(in32, in32, sum);
emh203 0:3d9c67d97d6f 100 in32 = *__SIMD32(pSrc)++;
emh203 0:3d9c67d97d6f 101 sum = __SMLALD(in32, in32, sum);
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 104 blkCnt--;
emh203 0:3d9c67d97d6f 105 }
emh203 0:3d9c67d97d6f 106
emh203 0:3d9c67d97d6f 107 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 108 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 109 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 112 {
emh203 0:3d9c67d97d6f 113 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emh203 0:3d9c67d97d6f 114 /* Compute Power and then store the result in a temporary variable, sum. */
emh203 0:3d9c67d97d6f 115 in16 = *pSrc++;
emh203 0:3d9c67d97d6f 116 sum = __SMLALD(in16, in16, sum);
emh203 0:3d9c67d97d6f 117
emh203 0:3d9c67d97d6f 118 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 119 blkCnt--;
emh203 0:3d9c67d97d6f 120 }
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 #else
emh203 0:3d9c67d97d6f 123
emh203 0:3d9c67d97d6f 124 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 q15_t in; /* Temporary variable to store input value */
emh203 0:3d9c67d97d6f 127 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 128
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 /* Loop over blockSize number of values */
emh203 0:3d9c67d97d6f 131 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 134 {
emh203 0:3d9c67d97d6f 135 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emh203 0:3d9c67d97d6f 136 /* Compute Power and then store the result in a temporary variable, sum. */
emh203 0:3d9c67d97d6f 137 in = *pSrc++;
emh203 0:3d9c67d97d6f 138 sum += ((q31_t) in * in);
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 141 blkCnt--;
emh203 0:3d9c67d97d6f 142 }
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* Store the results in 34.30 format */
emh203 0:3d9c67d97d6f 147 *pResult = sum;
emh203 0:3d9c67d97d6f 148 }
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 /**
emh203 0:3d9c67d97d6f 151 * @} end of power group
emh203 0:3d9c67d97d6f 152 */