Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_mult_fast_q31.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_mult_fast_q31.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q31 matrix multiplication (fast variant).
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup MatrixMult
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcA points to the first input matrix structure
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrcB points to the second input matrix structure
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to output matrix structure
emh203 0:3d9c67d97d6f 57 * @return The function returns either
emh203 0:3d9c67d97d6f 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * @details
emh203 0:3d9c67d97d6f 61 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 62 *
emh203 0:3d9c67d97d6f 63 * \par
emh203 0:3d9c67d97d6f 64 * The difference between the function arm_mat_mult_q31() and this fast variant is that
emh203 0:3d9c67d97d6f 65 * the fast variant use a 32-bit rather than a 64-bit accumulator.
emh203 0:3d9c67d97d6f 66 * The result of each 1.31 x 1.31 multiplication is truncated to
emh203 0:3d9c67d97d6f 67 * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
emh203 0:3d9c67d97d6f 68 * format. Finally, the accumulator is saturated and converted to a 1.31 result.
emh203 0:3d9c67d97d6f 69 *
emh203 0:3d9c67d97d6f 70 * \par
emh203 0:3d9c67d97d6f 71 * The fast version has the same overflow behavior as the standard version but provides
emh203 0:3d9c67d97d6f 72 * less precision since it discards the low 32 bits of each multiplication result.
emh203 0:3d9c67d97d6f 73 * In order to avoid overflows completely the input signals must be scaled down.
emh203 0:3d9c67d97d6f 74 * Scale down one of the input matrices by log2(numColsA) bits to
emh203 0:3d9c67d97d6f 75 * avoid overflows, as a total of numColsA additions are computed internally for each
emh203 0:3d9c67d97d6f 76 * output element.
emh203 0:3d9c67d97d6f 77 *
emh203 0:3d9c67d97d6f 78 * \par
emh203 0:3d9c67d97d6f 79 * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
emh203 0:3d9c67d97d6f 80 * which uses 64-bit accumulation to provide higher precision.
emh203 0:3d9c67d97d6f 81 */
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 arm_status arm_mat_mult_fast_q31(
emh203 0:3d9c67d97d6f 84 const arm_matrix_instance_q31 * pSrcA,
emh203 0:3d9c67d97d6f 85 const arm_matrix_instance_q31 * pSrcB,
emh203 0:3d9c67d97d6f 86 arm_matrix_instance_q31 * pDst)
emh203 0:3d9c67d97d6f 87 {
emh203 0:3d9c67d97d6f 88 q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 89 q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 90 q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 91 // q31_t *pSrcB = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 92 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 93 q31_t *px; /* Temporary output data matrix pointer */
emh203 0:3d9c67d97d6f 94 q31_t sum; /* Accumulator */
emh203 0:3d9c67d97d6f 95 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 96 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emh203 0:3d9c67d97d6f 97 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emh203 0:3d9c67d97d6f 98 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 99 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 100 q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 106 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 107 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 108 {
emh203 0:3d9c67d97d6f 109 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 110 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 111 }
emh203 0:3d9c67d97d6f 112 else
emh203 0:3d9c67d97d6f 113 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 114
emh203 0:3d9c67d97d6f 115 {
emh203 0:3d9c67d97d6f 116 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emh203 0:3d9c67d97d6f 117 /* row loop */
emh203 0:3d9c67d97d6f 118 do
emh203 0:3d9c67d97d6f 119 {
emh203 0:3d9c67d97d6f 120 /* Output pointer is set to starting address of the row being processed */
emh203 0:3d9c67d97d6f 121 px = pOut + i;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 124 col = numColsB;
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 127 ** to the starting address of the pSrcB data */
emh203 0:3d9c67d97d6f 128 pIn2 = pSrcB->pData;
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 j = 0u;
emh203 0:3d9c67d97d6f 131
emh203 0:3d9c67d97d6f 132 /* column loop */
emh203 0:3d9c67d97d6f 133 do
emh203 0:3d9c67d97d6f 134 {
emh203 0:3d9c67d97d6f 135 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 136 sum = 0;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 /* Initiate the pointer pIn1 to point to the starting address of pInA */
emh203 0:3d9c67d97d6f 139 pIn1 = pInA;
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emh203 0:3d9c67d97d6f 142 colCnt = numColsA >> 2;
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145 /* matrix multiplication */
emh203 0:3d9c67d97d6f 146 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 147 {
emh203 0:3d9c67d97d6f 148 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 149 /* Perform the multiply-accumulates */
emh203 0:3d9c67d97d6f 150 inB1 = *pIn2;
emh203 0:3d9c67d97d6f 151 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 152
emh203 0:3d9c67d97d6f 153 inA1 = pIn1[0];
emh203 0:3d9c67d97d6f 154 inA2 = pIn1[1];
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 inB2 = *pIn2;
emh203 0:3d9c67d97d6f 157 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 inB3 = *pIn2;
emh203 0:3d9c67d97d6f 160 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
emh203 0:3d9c67d97d6f 163 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 inA3 = pIn1[2];
emh203 0:3d9c67d97d6f 166 inA4 = pIn1[3];
emh203 0:3d9c67d97d6f 167
emh203 0:3d9c67d97d6f 168 inB4 = *pIn2;
emh203 0:3d9c67d97d6f 169 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 170
emh203 0:3d9c67d97d6f 171 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
emh203 0:3d9c67d97d6f 172 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 pIn1 += 4u;
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 177 colCnt--;
emh203 0:3d9c67d97d6f 178 }
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 181 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 182 colCnt = numColsA % 0x4u;
emh203 0:3d9c67d97d6f 183
emh203 0:3d9c67d97d6f 184 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 185 {
emh203 0:3d9c67d97d6f 186 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 187 /* Perform the multiply-accumulates */
emh203 0:3d9c67d97d6f 188 sum = (q31_t) ((((q63_t) sum << 32) +
emh203 0:3d9c67d97d6f 189 ((q63_t) * pIn1++ * (*pIn2))) >> 32);
emh203 0:3d9c67d97d6f 190 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 193 colCnt--;
emh203 0:3d9c67d97d6f 194 }
emh203 0:3d9c67d97d6f 195
emh203 0:3d9c67d97d6f 196 /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
emh203 0:3d9c67d97d6f 197 *px++ = sum << 1;
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 /* Update the pointer pIn2 to point to the starting address of the next column */
emh203 0:3d9c67d97d6f 200 j++;
emh203 0:3d9c67d97d6f 201 pIn2 = pSrcB->pData + j;
emh203 0:3d9c67d97d6f 202
emh203 0:3d9c67d97d6f 203 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 204 col--;
emh203 0:3d9c67d97d6f 205
emh203 0:3d9c67d97d6f 206 } while(col > 0u);
emh203 0:3d9c67d97d6f 207
emh203 0:3d9c67d97d6f 208 /* Update the pointer pInA to point to the starting address of the next row */
emh203 0:3d9c67d97d6f 209 i = i + numColsB;
emh203 0:3d9c67d97d6f 210 pInA = pInA + numColsA;
emh203 0:3d9c67d97d6f 211
emh203 0:3d9c67d97d6f 212 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 213 row--;
emh203 0:3d9c67d97d6f 214
emh203 0:3d9c67d97d6f 215 } while(row > 0u);
emh203 0:3d9c67d97d6f 216
emh203 0:3d9c67d97d6f 217 /* set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 218 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 219 }
emh203 0:3d9c67d97d6f 220 /* Return to application */
emh203 0:3d9c67d97d6f 221 return (status);
emh203 0:3d9c67d97d6f 222 }
emh203 0:3d9c67d97d6f 223
emh203 0:3d9c67d97d6f 224 /**
emh203 0:3d9c67d97d6f 225 * @} end of MatrixMult group
emh203 0:3d9c67d97d6f 226 */