Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_mult_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_mult_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point matrix multiplication.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @defgroup MatrixMult Matrix Multiplication
emh203 0:3d9c67d97d6f 49 *
emh203 0:3d9c67d97d6f 50 * Multiplies two matrices.
emh203 0:3d9c67d97d6f 51 *
emh203 0:3d9c67d97d6f 52 * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
emh203 0:3d9c67d97d6f 53
emh203 0:3d9c67d97d6f 54 * Matrix multiplication is only defined if the number of columns of the
emh203 0:3d9c67d97d6f 55 * first matrix equals the number of rows of the second matrix.
emh203 0:3d9c67d97d6f 56 * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
emh203 0:3d9c67d97d6f 57 * in an <code>M x P</code> matrix.
emh203 0:3d9c67d97d6f 58 * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
emh203 0:3d9c67d97d6f 59 * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
emh203 0:3d9c67d97d6f 60 * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
emh203 0:3d9c67d97d6f 61 */
emh203 0:3d9c67d97d6f 62
emh203 0:3d9c67d97d6f 63
emh203 0:3d9c67d97d6f 64 /**
emh203 0:3d9c67d97d6f 65 * @addtogroup MatrixMult
emh203 0:3d9c67d97d6f 66 * @{
emh203 0:3d9c67d97d6f 67 */
emh203 0:3d9c67d97d6f 68
emh203 0:3d9c67d97d6f 69 /**
emh203 0:3d9c67d97d6f 70 * @brief Floating-point matrix multiplication.
emh203 0:3d9c67d97d6f 71 * @param[in] *pSrcA points to the first input matrix structure
emh203 0:3d9c67d97d6f 72 * @param[in] *pSrcB points to the second input matrix structure
emh203 0:3d9c67d97d6f 73 * @param[out] *pDst points to output matrix structure
emh203 0:3d9c67d97d6f 74 * @return The function returns either
emh203 0:3d9c67d97d6f 75 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 76 */
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78 arm_status arm_mat_mult_f32(
emh203 0:3d9c67d97d6f 79 const arm_matrix_instance_f32 * pSrcA,
emh203 0:3d9c67d97d6f 80 const arm_matrix_instance_f32 * pSrcB,
emh203 0:3d9c67d97d6f 81 arm_matrix_instance_f32 * pDst)
emh203 0:3d9c67d97d6f 82 {
emh203 0:3d9c67d97d6f 83 float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 84 float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 85 float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 86 float32_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 87 float32_t *px; /* Temporary output data matrix pointer */
emh203 0:3d9c67d97d6f 88 float32_t sum; /* Accumulator */
emh203 0:3d9c67d97d6f 89 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 90 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emh203 0:3d9c67d97d6f 91 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emh203 0:3d9c67d97d6f 92
emh203 0:3d9c67d97d6f 93 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 94
emh203 0:3d9c67d97d6f 95 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 96
emh203 0:3d9c67d97d6f 97 float32_t in1, in2, in3, in4;
emh203 0:3d9c67d97d6f 98 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 99 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 105 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 106 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 107 {
emh203 0:3d9c67d97d6f 108
emh203 0:3d9c67d97d6f 109 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 110 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 111 }
emh203 0:3d9c67d97d6f 112 else
emh203 0:3d9c67d97d6f 113 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 114
emh203 0:3d9c67d97d6f 115 {
emh203 0:3d9c67d97d6f 116 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emh203 0:3d9c67d97d6f 117 /* row loop */
emh203 0:3d9c67d97d6f 118 do
emh203 0:3d9c67d97d6f 119 {
emh203 0:3d9c67d97d6f 120 /* Output pointer is set to starting address of the row being processed */
emh203 0:3d9c67d97d6f 121 px = pOut + i;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 124 col = numColsB;
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 127 ** to the starting address of the pSrcB data */
emh203 0:3d9c67d97d6f 128 pIn2 = pSrcB->pData;
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 j = 0u;
emh203 0:3d9c67d97d6f 131
emh203 0:3d9c67d97d6f 132 /* column loop */
emh203 0:3d9c67d97d6f 133 do
emh203 0:3d9c67d97d6f 134 {
emh203 0:3d9c67d97d6f 135 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 136 sum = 0.0f;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
emh203 0:3d9c67d97d6f 139 pIn1 = pInA;
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emh203 0:3d9c67d97d6f 142 colCnt = numColsA >> 2u;
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 /* matrix multiplication */
emh203 0:3d9c67d97d6f 145 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 146 {
emh203 0:3d9c67d97d6f 147 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 148 in3 = *pIn2;
emh203 0:3d9c67d97d6f 149 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 150 in1 = pIn1[0];
emh203 0:3d9c67d97d6f 151 in2 = pIn1[1];
emh203 0:3d9c67d97d6f 152 sum += in1 * in3;
emh203 0:3d9c67d97d6f 153 in4 = *pIn2;
emh203 0:3d9c67d97d6f 154 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 155 sum += in2 * in4;
emh203 0:3d9c67d97d6f 156
emh203 0:3d9c67d97d6f 157 in3 = *pIn2;
emh203 0:3d9c67d97d6f 158 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 159 in1 = pIn1[2];
emh203 0:3d9c67d97d6f 160 in2 = pIn1[3];
emh203 0:3d9c67d97d6f 161 sum += in1 * in3;
emh203 0:3d9c67d97d6f 162 in4 = *pIn2;
emh203 0:3d9c67d97d6f 163 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 164 sum += in2 * in4;
emh203 0:3d9c67d97d6f 165 pIn1 += 4u;
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 /* Decrement the loop count */
emh203 0:3d9c67d97d6f 168 colCnt--;
emh203 0:3d9c67d97d6f 169 }
emh203 0:3d9c67d97d6f 170
emh203 0:3d9c67d97d6f 171 /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
emh203 0:3d9c67d97d6f 172 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 173 colCnt = numColsA % 0x4u;
emh203 0:3d9c67d97d6f 174
emh203 0:3d9c67d97d6f 175 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 176 {
emh203 0:3d9c67d97d6f 177 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 178 sum += *pIn1++ * (*pIn2);
emh203 0:3d9c67d97d6f 179 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 180
emh203 0:3d9c67d97d6f 181 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 182 colCnt--;
emh203 0:3d9c67d97d6f 183 }
emh203 0:3d9c67d97d6f 184
emh203 0:3d9c67d97d6f 185 /* Store the result in the destination buffer */
emh203 0:3d9c67d97d6f 186 *px++ = sum;
emh203 0:3d9c67d97d6f 187
emh203 0:3d9c67d97d6f 188 /* Update the pointer pIn2 to point to the starting address of the next column */
emh203 0:3d9c67d97d6f 189 j++;
emh203 0:3d9c67d97d6f 190 pIn2 = pSrcB->pData + j;
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 193 col--;
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 } while(col > 0u);
emh203 0:3d9c67d97d6f 196
emh203 0:3d9c67d97d6f 197 #else
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 202 uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 203 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 204
emh203 0:3d9c67d97d6f 205 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 206
emh203 0:3d9c67d97d6f 207 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 208 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 209 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 210 {
emh203 0:3d9c67d97d6f 211
emh203 0:3d9c67d97d6f 212 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 213 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 214 }
emh203 0:3d9c67d97d6f 215 else
emh203 0:3d9c67d97d6f 216 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 217
emh203 0:3d9c67d97d6f 218 {
emh203 0:3d9c67d97d6f 219 /* The following loop performs the dot-product of each row in pInA with each column in pInB */
emh203 0:3d9c67d97d6f 220 /* row loop */
emh203 0:3d9c67d97d6f 221 do
emh203 0:3d9c67d97d6f 222 {
emh203 0:3d9c67d97d6f 223 /* Output pointer is set to starting address of the row being processed */
emh203 0:3d9c67d97d6f 224 px = pOut + i;
emh203 0:3d9c67d97d6f 225
emh203 0:3d9c67d97d6f 226 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 227 col = numColsB;
emh203 0:3d9c67d97d6f 228
emh203 0:3d9c67d97d6f 229 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 230 ** to the starting address of the pSrcB data */
emh203 0:3d9c67d97d6f 231 pIn2 = pSrcB->pData;
emh203 0:3d9c67d97d6f 232
emh203 0:3d9c67d97d6f 233 /* column loop */
emh203 0:3d9c67d97d6f 234 do
emh203 0:3d9c67d97d6f 235 {
emh203 0:3d9c67d97d6f 236 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 237 sum = 0.0f;
emh203 0:3d9c67d97d6f 238
emh203 0:3d9c67d97d6f 239 /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
emh203 0:3d9c67d97d6f 240 pIn1 = pInA;
emh203 0:3d9c67d97d6f 241
emh203 0:3d9c67d97d6f 242 /* Matrix A columns number of MAC operations are to be performed */
emh203 0:3d9c67d97d6f 243 colCnt = numColsA;
emh203 0:3d9c67d97d6f 244
emh203 0:3d9c67d97d6f 245 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 246 {
emh203 0:3d9c67d97d6f 247 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 248 sum += *pIn1++ * (*pIn2);
emh203 0:3d9c67d97d6f 249 pIn2 += numColsB;
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 252 colCnt--;
emh203 0:3d9c67d97d6f 253 }
emh203 0:3d9c67d97d6f 254
emh203 0:3d9c67d97d6f 255 /* Store the result in the destination buffer */
emh203 0:3d9c67d97d6f 256 *px++ = sum;
emh203 0:3d9c67d97d6f 257
emh203 0:3d9c67d97d6f 258 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 259 col--;
emh203 0:3d9c67d97d6f 260
emh203 0:3d9c67d97d6f 261 /* Update the pointer pIn2 to point to the starting address of the next column */
emh203 0:3d9c67d97d6f 262 pIn2 = pInB + (numColsB - col);
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 } while(col > 0u);
emh203 0:3d9c67d97d6f 265
emh203 0:3d9c67d97d6f 266 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 267
emh203 0:3d9c67d97d6f 268 /* Update the pointer pInA to point to the starting address of the next row */
emh203 0:3d9c67d97d6f 269 i = i + numColsB;
emh203 0:3d9c67d97d6f 270 pInA = pInA + numColsA;
emh203 0:3d9c67d97d6f 271
emh203 0:3d9c67d97d6f 272 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 273 row--;
emh203 0:3d9c67d97d6f 274
emh203 0:3d9c67d97d6f 275 } while(row > 0u);
emh203 0:3d9c67d97d6f 276 /* Set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 277 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 278 }
emh203 0:3d9c67d97d6f 279
emh203 0:3d9c67d97d6f 280 /* Return to application */
emh203 0:3d9c67d97d6f 281 return (status);
emh203 0:3d9c67d97d6f 282 }
emh203 0:3d9c67d97d6f 283
emh203 0:3d9c67d97d6f 284 /**
emh203 0:3d9c67d97d6f 285 * @} end of MatrixMult group
emh203 0:3d9c67d97d6f 286 */