Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_cmplx_mult_q31.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_cmplx_mult_q31.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point matrix multiplication.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40 #include "arm_math.h"
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 /**
emh203 0:3d9c67d97d6f 43 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 44 */
emh203 0:3d9c67d97d6f 45
emh203 0:3d9c67d97d6f 46 /**
emh203 0:3d9c67d97d6f 47 * @addtogroup CmplxMatrixMult
emh203 0:3d9c67d97d6f 48 * @{
emh203 0:3d9c67d97d6f 49 */
emh203 0:3d9c67d97d6f 50
emh203 0:3d9c67d97d6f 51 /**
emh203 0:3d9c67d97d6f 52 * @brief Q31 Complex matrix multiplication
emh203 0:3d9c67d97d6f 53 * @param[in] *pSrcA points to the first input complex matrix structure
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcB points to the second input complex matrix structure
emh203 0:3d9c67d97d6f 55 * @param[out] *pDst points to output complex matrix structure
emh203 0:3d9c67d97d6f 56 * @return The function returns either
emh203 0:3d9c67d97d6f 57 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 58 *
emh203 0:3d9c67d97d6f 59 * @details
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 * \par
emh203 0:3d9c67d97d6f 63 * The function is implemented using an internal 64-bit accumulator.
emh203 0:3d9c67d97d6f 64 * The accumulator has a 2.62 format and maintains full precision of the intermediate
emh203 0:3d9c67d97d6f 65 * multiplication results but provides only a single guard bit. There is no saturation
emh203 0:3d9c67d97d6f 66 * on intermediate additions. Thus, if the accumulator overflows it wraps around and
emh203 0:3d9c67d97d6f 67 * distorts the result. The input signals should be scaled down to avoid intermediate
emh203 0:3d9c67d97d6f 68 * overflows. The input is thus scaled down by log2(numColsA) bits
emh203 0:3d9c67d97d6f 69 * to avoid overflows, as a total of numColsA additions are performed internally.
emh203 0:3d9c67d97d6f 70 * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
emh203 0:3d9c67d97d6f 71 *
emh203 0:3d9c67d97d6f 72 *
emh203 0:3d9c67d97d6f 73 */
emh203 0:3d9c67d97d6f 74
emh203 0:3d9c67d97d6f 75 arm_status arm_mat_cmplx_mult_q31(
emh203 0:3d9c67d97d6f 76 const arm_matrix_instance_q31 * pSrcA,
emh203 0:3d9c67d97d6f 77 const arm_matrix_instance_q31 * pSrcB,
emh203 0:3d9c67d97d6f 78 arm_matrix_instance_q31 * pDst)
emh203 0:3d9c67d97d6f 79 {
emh203 0:3d9c67d97d6f 80 q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 81 q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 82 q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 83 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 84 q31_t *px; /* Temporary output data matrix pointer */
emh203 0:3d9c67d97d6f 85 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 86 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emh203 0:3d9c67d97d6f 87 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emh203 0:3d9c67d97d6f 88 q63_t sumReal1, sumImag1; /* accumulator */
emh203 0:3d9c67d97d6f 89 q31_t a0, b0, c0, d0;
emh203 0:3d9c67d97d6f 90 q31_t a1, b1, c1, d1;
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92
emh203 0:3d9c67d97d6f 93 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 94
emh203 0:3d9c67d97d6f 95 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 96 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 99
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 102 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 103 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 104 {
emh203 0:3d9c67d97d6f 105
emh203 0:3d9c67d97d6f 106 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 107 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 108 }
emh203 0:3d9c67d97d6f 109 else
emh203 0:3d9c67d97d6f 110 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 111
emh203 0:3d9c67d97d6f 112 {
emh203 0:3d9c67d97d6f 113 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emh203 0:3d9c67d97d6f 114 /* row loop */
emh203 0:3d9c67d97d6f 115 do
emh203 0:3d9c67d97d6f 116 {
emh203 0:3d9c67d97d6f 117 /* Output pointer is set to starting address of the row being processed */
emh203 0:3d9c67d97d6f 118 px = pOut + 2 * i;
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 121 col = numColsB;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 124 ** to the starting address of the pSrcB data */
emh203 0:3d9c67d97d6f 125 pIn2 = pSrcB->pData;
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 j = 0u;
emh203 0:3d9c67d97d6f 128
emh203 0:3d9c67d97d6f 129 /* column loop */
emh203 0:3d9c67d97d6f 130 do
emh203 0:3d9c67d97d6f 131 {
emh203 0:3d9c67d97d6f 132 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 133 sumReal1 = 0.0;
emh203 0:3d9c67d97d6f 134 sumImag1 = 0.0;
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
emh203 0:3d9c67d97d6f 137 pIn1 = pInA;
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emh203 0:3d9c67d97d6f 140 colCnt = numColsA >> 2;
emh203 0:3d9c67d97d6f 141
emh203 0:3d9c67d97d6f 142 /* matrix multiplication */
emh203 0:3d9c67d97d6f 143 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 144 {
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* Reading real part of complex matrix A */
emh203 0:3d9c67d97d6f 147 a0 = *pIn1;
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 /* Reading real part of complex matrix B */
emh203 0:3d9c67d97d6f 150 c0 = *pIn2;
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /* Reading imaginary part of complex matrix A */
emh203 0:3d9c67d97d6f 153 b0 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 154
emh203 0:3d9c67d97d6f 155 /* Reading imaginary part of complex matrix B */
emh203 0:3d9c67d97d6f 156 d0 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 159 sumReal1 += (q63_t) a0 *c0;
emh203 0:3d9c67d97d6f 160 sumImag1 += (q63_t) b0 *c0;
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 /* update pointers */
emh203 0:3d9c67d97d6f 163 pIn1 += 2u;
emh203 0:3d9c67d97d6f 164 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 165
emh203 0:3d9c67d97d6f 166 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 167 sumReal1 -= (q63_t) b0 *d0;
emh203 0:3d9c67d97d6f 168 sumImag1 += (q63_t) a0 *d0;
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 /* read real and imag values from pSrcA and pSrcB buffer */
emh203 0:3d9c67d97d6f 173 a1 = *pIn1;
emh203 0:3d9c67d97d6f 174 c1 = *pIn2;
emh203 0:3d9c67d97d6f 175 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 176 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 179 sumReal1 += (q63_t) a1 *c1;
emh203 0:3d9c67d97d6f 180 sumImag1 += (q63_t) b1 *c1;
emh203 0:3d9c67d97d6f 181
emh203 0:3d9c67d97d6f 182 /* update pointers */
emh203 0:3d9c67d97d6f 183 pIn1 += 2u;
emh203 0:3d9c67d97d6f 184 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 187 sumReal1 -= (q63_t) b1 *d1;
emh203 0:3d9c67d97d6f 188 sumImag1 += (q63_t) a1 *d1;
emh203 0:3d9c67d97d6f 189
emh203 0:3d9c67d97d6f 190 a0 = *pIn1;
emh203 0:3d9c67d97d6f 191 c0 = *pIn2;
emh203 0:3d9c67d97d6f 192
emh203 0:3d9c67d97d6f 193 b0 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 194 d0 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 195
emh203 0:3d9c67d97d6f 196 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 197 sumReal1 += (q63_t) a0 *c0;
emh203 0:3d9c67d97d6f 198 sumImag1 += (q63_t) b0 *c0;
emh203 0:3d9c67d97d6f 199
emh203 0:3d9c67d97d6f 200 /* update pointers */
emh203 0:3d9c67d97d6f 201 pIn1 += 2u;
emh203 0:3d9c67d97d6f 202 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 203
emh203 0:3d9c67d97d6f 204 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 205 sumReal1 -= (q63_t) b0 *d0;
emh203 0:3d9c67d97d6f 206 sumImag1 += (q63_t) a0 *d0;
emh203 0:3d9c67d97d6f 207
emh203 0:3d9c67d97d6f 208 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 209
emh203 0:3d9c67d97d6f 210 a1 = *pIn1;
emh203 0:3d9c67d97d6f 211 c1 = *pIn2;
emh203 0:3d9c67d97d6f 212
emh203 0:3d9c67d97d6f 213 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 214 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 215
emh203 0:3d9c67d97d6f 216 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 217 sumReal1 += (q63_t) a1 *c1;
emh203 0:3d9c67d97d6f 218 sumImag1 += (q63_t) b1 *c1;
emh203 0:3d9c67d97d6f 219
emh203 0:3d9c67d97d6f 220 /* update pointers */
emh203 0:3d9c67d97d6f 221 pIn1 += 2u;
emh203 0:3d9c67d97d6f 222 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 223
emh203 0:3d9c67d97d6f 224 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 225 sumReal1 -= (q63_t) b1 *d1;
emh203 0:3d9c67d97d6f 226 sumImag1 += (q63_t) a1 *d1;
emh203 0:3d9c67d97d6f 227
emh203 0:3d9c67d97d6f 228 /* Decrement the loop count */
emh203 0:3d9c67d97d6f 229 colCnt--;
emh203 0:3d9c67d97d6f 230 }
emh203 0:3d9c67d97d6f 231
emh203 0:3d9c67d97d6f 232 /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
emh203 0:3d9c67d97d6f 233 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 234 colCnt = numColsA % 0x4u;
emh203 0:3d9c67d97d6f 235
emh203 0:3d9c67d97d6f 236 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 237 {
emh203 0:3d9c67d97d6f 238 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 239 a1 = *pIn1;
emh203 0:3d9c67d97d6f 240 c1 = *pIn2;
emh203 0:3d9c67d97d6f 241
emh203 0:3d9c67d97d6f 242 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 243 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 244
emh203 0:3d9c67d97d6f 245 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 246 sumReal1 += (q63_t) a1 *c1;
emh203 0:3d9c67d97d6f 247 sumImag1 += (q63_t) b1 *c1;
emh203 0:3d9c67d97d6f 248
emh203 0:3d9c67d97d6f 249 /* update pointers */
emh203 0:3d9c67d97d6f 250 pIn1 += 2u;
emh203 0:3d9c67d97d6f 251 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 252
emh203 0:3d9c67d97d6f 253 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 254 sumReal1 -= (q63_t) b1 *d1;
emh203 0:3d9c67d97d6f 255 sumImag1 += (q63_t) a1 *d1;
emh203 0:3d9c67d97d6f 256
emh203 0:3d9c67d97d6f 257 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 258 colCnt--;
emh203 0:3d9c67d97d6f 259 }
emh203 0:3d9c67d97d6f 260
emh203 0:3d9c67d97d6f 261 /* Store the result in the destination buffer */
emh203 0:3d9c67d97d6f 262 *px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
emh203 0:3d9c67d97d6f 263 *px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
emh203 0:3d9c67d97d6f 264
emh203 0:3d9c67d97d6f 265 /* Update the pointer pIn2 to point to the starting address of the next column */
emh203 0:3d9c67d97d6f 266 j++;
emh203 0:3d9c67d97d6f 267 pIn2 = pSrcB->pData + 2u * j;
emh203 0:3d9c67d97d6f 268
emh203 0:3d9c67d97d6f 269 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 270 col--;
emh203 0:3d9c67d97d6f 271
emh203 0:3d9c67d97d6f 272 } while(col > 0u);
emh203 0:3d9c67d97d6f 273
emh203 0:3d9c67d97d6f 274 /* Update the pointer pInA to point to the starting address of the next row */
emh203 0:3d9c67d97d6f 275 i = i + numColsB;
emh203 0:3d9c67d97d6f 276 pInA = pInA + 2 * numColsA;
emh203 0:3d9c67d97d6f 277
emh203 0:3d9c67d97d6f 278 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 279 row--;
emh203 0:3d9c67d97d6f 280
emh203 0:3d9c67d97d6f 281 } while(row > 0u);
emh203 0:3d9c67d97d6f 282
emh203 0:3d9c67d97d6f 283 /* Set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 284 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 285 }
emh203 0:3d9c67d97d6f 286
emh203 0:3d9c67d97d6f 287 /* Return to application */
emh203 0:3d9c67d97d6f 288 return (status);
emh203 0:3d9c67d97d6f 289 }
emh203 0:3d9c67d97d6f 290
emh203 0:3d9c67d97d6f 291 /**
emh203 0:3d9c67d97d6f 292 * @} end of MatrixMult group
emh203 0:3d9c67d97d6f 293 */