Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_add_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_add_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 matrix addition
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup MatrixAdd
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Q15 matrix addition.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcA points to the first input matrix structure
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrcB points to the second input matrix structure
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to output matrix structure
emh203 0:3d9c67d97d6f 57 * @return The function returns either
emh203 0:3d9c67d97d6f 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * The function uses saturating arithmetic.
emh203 0:3d9c67d97d6f 63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
emh203 0:3d9c67d97d6f 64 */
emh203 0:3d9c67d97d6f 65
emh203 0:3d9c67d97d6f 66 arm_status arm_mat_add_q15(
emh203 0:3d9c67d97d6f 67 const arm_matrix_instance_q15 * pSrcA,
emh203 0:3d9c67d97d6f 68 const arm_matrix_instance_q15 * pSrcB,
emh203 0:3d9c67d97d6f 69 arm_matrix_instance_q15 * pDst)
emh203 0:3d9c67d97d6f 70 {
emh203 0:3d9c67d97d6f 71 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 72 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 73 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 74 uint16_t numSamples; /* total number of elements in the matrix */
emh203 0:3d9c67d97d6f 75 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 76 arm_status status; /* status of matrix addition */
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 79
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 82 if((pSrcA->numRows != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 83 (pSrcA->numCols != pSrcB->numCols) ||
emh203 0:3d9c67d97d6f 84 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 85 {
emh203 0:3d9c67d97d6f 86 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 87 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 88 }
emh203 0:3d9c67d97d6f 89 else
emh203 0:3d9c67d97d6f 90 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92 {
emh203 0:3d9c67d97d6f 93 /* Total number of samples in the input matrix */
emh203 0:3d9c67d97d6f 94 numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
emh203 0:3d9c67d97d6f 95
emh203 0:3d9c67d97d6f 96 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 99
emh203 0:3d9c67d97d6f 100 /* Loop unrolling */
emh203 0:3d9c67d97d6f 101 blkCnt = (uint32_t) numSamples >> 2u;
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 104 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 105 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 106 {
emh203 0:3d9c67d97d6f 107 /* C(m,n) = A(m,n) + B(m,n) */
emh203 0:3d9c67d97d6f 108 /* Add, Saturate and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 109 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emh203 0:3d9c67d97d6f 110 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emh203 0:3d9c67d97d6f 111
emh203 0:3d9c67d97d6f 112 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 113 blkCnt--;
emh203 0:3d9c67d97d6f 114 }
emh203 0:3d9c67d97d6f 115
emh203 0:3d9c67d97d6f 116 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 117 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 118 blkCnt = (uint32_t) numSamples % 0x4u;
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 /* q15 pointers of input and output are initialized */
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 123 {
emh203 0:3d9c67d97d6f 124 /* C(m,n) = A(m,n) + B(m,n) */
emh203 0:3d9c67d97d6f 125 /* Add, Saturate and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 126 *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 129 blkCnt--;
emh203 0:3d9c67d97d6f 130 }
emh203 0:3d9c67d97d6f 131
emh203 0:3d9c67d97d6f 132 #else
emh203 0:3d9c67d97d6f 133
emh203 0:3d9c67d97d6f 134 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 137 blkCnt = (uint32_t) numSamples;
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139
emh203 0:3d9c67d97d6f 140 /* q15 pointers of input and output are initialized */
emh203 0:3d9c67d97d6f 141 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 142 {
emh203 0:3d9c67d97d6f 143 /* C(m,n) = A(m,n) + B(m,n) */
emh203 0:3d9c67d97d6f 144 /* Add, Saturate and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 145 *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 148 blkCnt--;
emh203 0:3d9c67d97d6f 149 }
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 152
emh203 0:3d9c67d97d6f 153 /* set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 154 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 155 }
emh203 0:3d9c67d97d6f 156
emh203 0:3d9c67d97d6f 157 /* Return to application */
emh203 0:3d9c67d97d6f 158 return (status);
emh203 0:3d9c67d97d6f 159 }
emh203 0:3d9c67d97d6f 160
emh203 0:3d9c67d97d6f 161 /**
emh203 0:3d9c67d97d6f 162 * @} end of MatrixAdd group
emh203 0:3d9c67d97d6f 163 */