Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

FilteringFunctions/arm_lms_norm_init_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /*-----------------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_lms_norm_init_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 NLMS initialization function.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------*/
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42 #include "arm_common_tables.h"
emh203 0:3d9c67d97d6f 43
emh203 0:3d9c67d97d6f 44 /**
emh203 0:3d9c67d97d6f 45 * @addtogroup LMS_NORM
emh203 0:3d9c67d97d6f 46 * @{
emh203 0:3d9c67d97d6f 47 */
emh203 0:3d9c67d97d6f 48
emh203 0:3d9c67d97d6f 49 /**
emh203 0:3d9c67d97d6f 50 * @brief Initialization function for Q15 normalized LMS filter.
emh203 0:3d9c67d97d6f 51 * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
emh203 0:3d9c67d97d6f 52 * @param[in] numTaps number of filter coefficients.
emh203 0:3d9c67d97d6f 53 * @param[in] *pCoeffs points to coefficient buffer.
emh203 0:3d9c67d97d6f 54 * @param[in] *pState points to state buffer.
emh203 0:3d9c67d97d6f 55 * @param[in] mu step size that controls filter coefficient updates.
emh203 0:3d9c67d97d6f 56 * @param[in] blockSize number of samples to process.
emh203 0:3d9c67d97d6f 57 * @param[in] postShift bit shift applied to coefficients.
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Description:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
emh203 0:3d9c67d97d6f 63 * <pre>
emh203 0:3d9c67d97d6f 64 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
emh203 0:3d9c67d97d6f 65 * </pre>
emh203 0:3d9c67d97d6f 66 * The initial filter coefficients serve as a starting point for the adaptive filter.
emh203 0:3d9c67d97d6f 67 * <code>pState</code> points to the array of state variables and size of array is
emh203 0:3d9c67d97d6f 68 * <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
emh203 0:3d9c67d97d6f 69 * by each call to <code>arm_lms_norm_q15()</code>.
emh203 0:3d9c67d97d6f 70 */
emh203 0:3d9c67d97d6f 71
emh203 0:3d9c67d97d6f 72 void arm_lms_norm_init_q15(
emh203 0:3d9c67d97d6f 73 arm_lms_norm_instance_q15 * S,
emh203 0:3d9c67d97d6f 74 uint16_t numTaps,
emh203 0:3d9c67d97d6f 75 q15_t * pCoeffs,
emh203 0:3d9c67d97d6f 76 q15_t * pState,
emh203 0:3d9c67d97d6f 77 q15_t mu,
emh203 0:3d9c67d97d6f 78 uint32_t blockSize,
emh203 0:3d9c67d97d6f 79 uint8_t postShift)
emh203 0:3d9c67d97d6f 80 {
emh203 0:3d9c67d97d6f 81 /* Assign filter taps */
emh203 0:3d9c67d97d6f 82 S->numTaps = numTaps;
emh203 0:3d9c67d97d6f 83
emh203 0:3d9c67d97d6f 84 /* Assign coefficient pointer */
emh203 0:3d9c67d97d6f 85 S->pCoeffs = pCoeffs;
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 /* Clear state buffer and size is always blockSize + numTaps - 1 */
emh203 0:3d9c67d97d6f 88 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
emh203 0:3d9c67d97d6f 89
emh203 0:3d9c67d97d6f 90 /* Assign post Shift value applied to coefficients */
emh203 0:3d9c67d97d6f 91 S->postShift = postShift;
emh203 0:3d9c67d97d6f 92
emh203 0:3d9c67d97d6f 93 /* Assign state pointer */
emh203 0:3d9c67d97d6f 94 S->pState = pState;
emh203 0:3d9c67d97d6f 95
emh203 0:3d9c67d97d6f 96 /* Assign Step size value */
emh203 0:3d9c67d97d6f 97 S->mu = mu;
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 /* Initialize reciprocal pointer table */
emh203 0:3d9c67d97d6f 100 S->recipTable = (q15_t *) armRecipTableQ15;
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 /* Initialise Energy to zero */
emh203 0:3d9c67d97d6f 103 S->energy = 0;
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* Initialise x0 to zero */
emh203 0:3d9c67d97d6f 106 S->x0 = 0;
emh203 0:3d9c67d97d6f 107
emh203 0:3d9c67d97d6f 108 }
emh203 0:3d9c67d97d6f 109
emh203 0:3d9c67d97d6f 110 /**
emh203 0:3d9c67d97d6f 111 * @} end of LMS_NORM group
emh203 0:3d9c67d97d6f 112 */