V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_iir_lattice_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 IIR lattice filter processing function.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupFilters
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup IIR_Lattice
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Processing function for the Q15 IIR lattice filter.
emh203 0:3d9c67d97d6f 54 * @param[in] *S points to an instance of the Q15 IIR lattice structure.
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrc points to the block of input data.
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to the block of output data.
emh203 0:3d9c67d97d6f 57 * @param[in] blockSize number of samples to process.
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * @details
emh203 0:3d9c67d97d6f 61 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 62 * \par
emh203 0:3d9c67d97d6f 63 * The function is implemented using a 64-bit internal accumulator.
emh203 0:3d9c67d97d6f 64 * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
emh203 0:3d9c67d97d6f 65 * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
emh203 0:3d9c67d97d6f 66 * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
emh203 0:3d9c67d97d6f 67 * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
emh203 0:3d9c67d97d6f 68 * Lastly, the accumulator is saturated to yield a result in 1.15 format.
emh203 0:3d9c67d97d6f 69 */
emh203 0:3d9c67d97d6f 70
emh203 0:3d9c67d97d6f 71 void arm_iir_lattice_q15(
emh203 0:3d9c67d97d6f 72 const arm_iir_lattice_instance_q15 * S,
emh203 0:3d9c67d97d6f 73 q15_t * pSrc,
emh203 0:3d9c67d97d6f 74 q15_t * pDst,
emh203 0:3d9c67d97d6f 75 uint32_t blockSize)
emh203 0:3d9c67d97d6f 76 {
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 q31_t fcurr, fnext, gcurr = 0, gnext; /* Temporary variables for lattice stages */
emh203 0:3d9c67d97d6f 84 q15_t gnext1, gnext2; /* Temporary variables for lattice stages */
emh203 0:3d9c67d97d6f 85 uint32_t stgCnt; /* Temporary variables for counts */
emh203 0:3d9c67d97d6f 86 q63_t acc; /* Accumlator */
emh203 0:3d9c67d97d6f 87 uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
emh203 0:3d9c67d97d6f 88 q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
emh203 0:3d9c67d97d6f 89 uint32_t numStages = S->numStages; /* number of stages */
emh203 0:3d9c67d97d6f 90 q15_t *pState; /* State pointer */
emh203 0:3d9c67d97d6f 91 q15_t *pStateCurnt; /* State current pointer */
emh203 0:3d9c67d97d6f 92 q15_t out; /* Temporary variable for output */
emh203 0:3d9c67d97d6f 93 q31_t v; /* Temporary variable for ladder coefficient */
emh203 0:3d9c67d97d6f 94 #ifdef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 95 q15_t v1, v2;
emh203 0:3d9c67d97d6f 96 #endif
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101 pState = &S->pState[0];
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /* Sample processing */
emh203 0:3d9c67d97d6f 104 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 105 {
emh203 0:3d9c67d97d6f 106 /* Read Sample from input buffer */
emh203 0:3d9c67d97d6f 107 /* fN(n) = x(n) */
emh203 0:3d9c67d97d6f 108 fcurr = *pSrc++;
emh203 0:3d9c67d97d6f 109
emh203 0:3d9c67d97d6f 110 /* Initialize state read pointer */
emh203 0:3d9c67d97d6f 111 px1 = pState;
emh203 0:3d9c67d97d6f 112 /* Initialize state write pointer */
emh203 0:3d9c67d97d6f 113 px2 = pState;
emh203 0:3d9c67d97d6f 114 /* Set accumulator to zero */
emh203 0:3d9c67d97d6f 115 acc = 0;
emh203 0:3d9c67d97d6f 116 /* Initialize Ladder coeff pointer */
emh203 0:3d9c67d97d6f 117 pv = &S->pvCoeffs[0];
emh203 0:3d9c67d97d6f 118 /* Initialize Reflection coeff pointer */
emh203 0:3d9c67d97d6f 119 pk = &S->pkCoeffs[0];
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 /* Process sample for first tap */
emh203 0:3d9c67d97d6f 123 gcurr = *px1++;
emh203 0:3d9c67d97d6f 124 /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
emh203 0:3d9c67d97d6f 125 fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 126 fnext = __SSAT(fnext, 16);
emh203 0:3d9c67d97d6f 127 /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
emh203 0:3d9c67d97d6f 128 gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 129 gnext = __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 130 /* write gN(n) into state for next sample processing */
emh203 0:3d9c67d97d6f 131 *px2++ = (q15_t) gnext;
emh203 0:3d9c67d97d6f 132 /* y(n) += gN(n) * vN */
emh203 0:3d9c67d97d6f 133 acc += (q31_t) ((gnext * (*pv++)));
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /* Update f values for next coefficient processing */
emh203 0:3d9c67d97d6f 137 fcurr = fnext;
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* Loop unrolling. Process 4 taps at a time. */
emh203 0:3d9c67d97d6f 140 tapCnt = (numStages - 1u) >> 2;
emh203 0:3d9c67d97d6f 141
emh203 0:3d9c67d97d6f 142 while(tapCnt > 0u)
emh203 0:3d9c67d97d6f 143 {
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145 /* Process sample for 2nd, 6th ...taps */
emh203 0:3d9c67d97d6f 146 /* Read gN-2(n-1) from state buffer */
emh203 0:3d9c67d97d6f 147 gcurr = *px1++;
emh203 0:3d9c67d97d6f 148 /* Process sample for 2nd, 6th .. taps */
emh203 0:3d9c67d97d6f 149 /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
emh203 0:3d9c67d97d6f 150 fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 151 fnext = __SSAT(fnext, 16);
emh203 0:3d9c67d97d6f 152 /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
emh203 0:3d9c67d97d6f 153 gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 154 gnext1 = (q15_t) __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 155 /* write gN-1(n) into state */
emh203 0:3d9c67d97d6f 156 *px2++ = (q15_t) gnext1;
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 /* Process sample for 3nd, 7th ...taps */
emh203 0:3d9c67d97d6f 160 /* Read gN-3(n-1) from state */
emh203 0:3d9c67d97d6f 161 gcurr = *px1++;
emh203 0:3d9c67d97d6f 162 /* Process sample for 3rd, 7th .. taps */
emh203 0:3d9c67d97d6f 163 /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
emh203 0:3d9c67d97d6f 164 fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 165 fcurr = __SSAT(fcurr, 16);
emh203 0:3d9c67d97d6f 166 /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
emh203 0:3d9c67d97d6f 167 gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 168 gnext2 = (q15_t) __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 169 /* write gN-2(n) into state */
emh203 0:3d9c67d97d6f 170 *px2++ = (q15_t) gnext2;
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 /* Read vN-1 and vN-2 at a time */
emh203 0:3d9c67d97d6f 173 #ifndef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 174
emh203 0:3d9c67d97d6f 175 v = *__SIMD32(pv)++;
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177 #else
emh203 0:3d9c67d97d6f 178
emh203 0:3d9c67d97d6f 179 v1 = *pv++;
emh203 0:3d9c67d97d6f 180 v2 = *pv++;
emh203 0:3d9c67d97d6f 181
emh203 0:3d9c67d97d6f 182 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 183
emh203 0:3d9c67d97d6f 184 v = __PKHBT(v1, v2, 16);
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186 #else
emh203 0:3d9c67d97d6f 187
emh203 0:3d9c67d97d6f 188 v = __PKHBT(v2, v1, 16);
emh203 0:3d9c67d97d6f 189
emh203 0:3d9c67d97d6f 190 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 /* Pack gN-1(n) and gN-2(n) */
emh203 0:3d9c67d97d6f 196
emh203 0:3d9c67d97d6f 197 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 gnext = __PKHBT(gnext1, gnext2, 16);
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 #else
emh203 0:3d9c67d97d6f 202
emh203 0:3d9c67d97d6f 203 gnext = __PKHBT(gnext2, gnext1, 16);
emh203 0:3d9c67d97d6f 204
emh203 0:3d9c67d97d6f 205 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 206
emh203 0:3d9c67d97d6f 207 /* y(n) += gN-1(n) * vN-1 */
emh203 0:3d9c67d97d6f 208 /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
emh203 0:3d9c67d97d6f 209 /* y(n) += gN-2(n) * vN-2 */
emh203 0:3d9c67d97d6f 210 /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
emh203 0:3d9c67d97d6f 211 acc = __SMLALD(gnext, v, acc);
emh203 0:3d9c67d97d6f 212
emh203 0:3d9c67d97d6f 213
emh203 0:3d9c67d97d6f 214 /* Process sample for 4th, 8th ...taps */
emh203 0:3d9c67d97d6f 215 /* Read gN-4(n-1) from state */
emh203 0:3d9c67d97d6f 216 gcurr = *px1++;
emh203 0:3d9c67d97d6f 217 /* Process sample for 4th, 8th .. taps */
emh203 0:3d9c67d97d6f 218 /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
emh203 0:3d9c67d97d6f 219 fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 220 fnext = __SSAT(fnext, 16);
emh203 0:3d9c67d97d6f 221 /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
emh203 0:3d9c67d97d6f 222 gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 223 gnext1 = (q15_t) __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 224 /* write gN-3(n) for the next sample process */
emh203 0:3d9c67d97d6f 225 *px2++ = (q15_t) gnext1;
emh203 0:3d9c67d97d6f 226
emh203 0:3d9c67d97d6f 227
emh203 0:3d9c67d97d6f 228 /* Process sample for 5th, 9th ...taps */
emh203 0:3d9c67d97d6f 229 /* Read gN-5(n-1) from state */
emh203 0:3d9c67d97d6f 230 gcurr = *px1++;
emh203 0:3d9c67d97d6f 231 /* Process sample for 5th, 9th .. taps */
emh203 0:3d9c67d97d6f 232 /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
emh203 0:3d9c67d97d6f 233 fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 234 fcurr = __SSAT(fcurr, 16);
emh203 0:3d9c67d97d6f 235 /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
emh203 0:3d9c67d97d6f 236 gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 237 gnext2 = (q15_t) __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 238 /* write gN-4(n) for the next sample process */
emh203 0:3d9c67d97d6f 239 *px2++ = (q15_t) gnext2;
emh203 0:3d9c67d97d6f 240
emh203 0:3d9c67d97d6f 241 /* Read vN-3 and vN-4 at a time */
emh203 0:3d9c67d97d6f 242 #ifndef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 243
emh203 0:3d9c67d97d6f 244 v = *__SIMD32(pv)++;
emh203 0:3d9c67d97d6f 245
emh203 0:3d9c67d97d6f 246 #else
emh203 0:3d9c67d97d6f 247
emh203 0:3d9c67d97d6f 248 v1 = *pv++;
emh203 0:3d9c67d97d6f 249 v2 = *pv++;
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 252
emh203 0:3d9c67d97d6f 253 v = __PKHBT(v1, v2, 16);
emh203 0:3d9c67d97d6f 254
emh203 0:3d9c67d97d6f 255 #else
emh203 0:3d9c67d97d6f 256
emh203 0:3d9c67d97d6f 257 v = __PKHBT(v2, v1, 16);
emh203 0:3d9c67d97d6f 258
emh203 0:3d9c67d97d6f 259 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 260
emh203 0:3d9c67d97d6f 261 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 262
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 /* Pack gN-3(n) and gN-4(n) */
emh203 0:3d9c67d97d6f 265 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 266
emh203 0:3d9c67d97d6f 267 gnext = __PKHBT(gnext1, gnext2, 16);
emh203 0:3d9c67d97d6f 268
emh203 0:3d9c67d97d6f 269 #else
emh203 0:3d9c67d97d6f 270
emh203 0:3d9c67d97d6f 271 gnext = __PKHBT(gnext2, gnext1, 16);
emh203 0:3d9c67d97d6f 272
emh203 0:3d9c67d97d6f 273 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 274
emh203 0:3d9c67d97d6f 275 /* y(n) += gN-4(n) * vN-4 */
emh203 0:3d9c67d97d6f 276 /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
emh203 0:3d9c67d97d6f 277 /* y(n) += gN-3(n) * vN-3 */
emh203 0:3d9c67d97d6f 278 /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
emh203 0:3d9c67d97d6f 279 acc = __SMLALD(gnext, v, acc);
emh203 0:3d9c67d97d6f 280
emh203 0:3d9c67d97d6f 281 tapCnt--;
emh203 0:3d9c67d97d6f 282
emh203 0:3d9c67d97d6f 283 }
emh203 0:3d9c67d97d6f 284
emh203 0:3d9c67d97d6f 285 fnext = fcurr;
emh203 0:3d9c67d97d6f 286
emh203 0:3d9c67d97d6f 287 /* If the filter length is not a multiple of 4, compute the remaining filter taps */
emh203 0:3d9c67d97d6f 288 tapCnt = (numStages - 1u) % 0x4u;
emh203 0:3d9c67d97d6f 289
emh203 0:3d9c67d97d6f 290 while(tapCnt > 0u)
emh203 0:3d9c67d97d6f 291 {
emh203 0:3d9c67d97d6f 292 gcurr = *px1++;
emh203 0:3d9c67d97d6f 293 /* Process sample for last taps */
emh203 0:3d9c67d97d6f 294 fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 295 fnext = __SSAT(fnext, 16);
emh203 0:3d9c67d97d6f 296 gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 297 gnext = __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 298 /* Output samples for last taps */
emh203 0:3d9c67d97d6f 299 acc += (q31_t) (((q31_t) gnext * (*pv++)));
emh203 0:3d9c67d97d6f 300 *px2++ = (q15_t) gnext;
emh203 0:3d9c67d97d6f 301 fcurr = fnext;
emh203 0:3d9c67d97d6f 302
emh203 0:3d9c67d97d6f 303 tapCnt--;
emh203 0:3d9c67d97d6f 304 }
emh203 0:3d9c67d97d6f 305
emh203 0:3d9c67d97d6f 306 /* y(n) += g0(n) * v0 */
emh203 0:3d9c67d97d6f 307 acc += (q31_t) (((q31_t) fnext * (*pv++)));
emh203 0:3d9c67d97d6f 308
emh203 0:3d9c67d97d6f 309 out = (q15_t) __SSAT(acc >> 15, 16);
emh203 0:3d9c67d97d6f 310 *px2++ = (q15_t) fnext;
emh203 0:3d9c67d97d6f 311
emh203 0:3d9c67d97d6f 312 /* write out into pDst */
emh203 0:3d9c67d97d6f 313 *pDst++ = out;
emh203 0:3d9c67d97d6f 314
emh203 0:3d9c67d97d6f 315 /* Advance the state pointer by 4 to process the next group of 4 samples */
emh203 0:3d9c67d97d6f 316 pState = pState + 1u;
emh203 0:3d9c67d97d6f 317 blkCnt--;
emh203 0:3d9c67d97d6f 318
emh203 0:3d9c67d97d6f 319 }
emh203 0:3d9c67d97d6f 320
emh203 0:3d9c67d97d6f 321 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emh203 0:3d9c67d97d6f 322 for the preperation of next frame process */
emh203 0:3d9c67d97d6f 323 /* Points to the start of the state buffer */
emh203 0:3d9c67d97d6f 324 pStateCurnt = &S->pState[0];
emh203 0:3d9c67d97d6f 325 pState = &S->pState[blockSize];
emh203 0:3d9c67d97d6f 326
emh203 0:3d9c67d97d6f 327 stgCnt = (numStages >> 2u);
emh203 0:3d9c67d97d6f 328
emh203 0:3d9c67d97d6f 329 /* copy data */
emh203 0:3d9c67d97d6f 330 while(stgCnt > 0u)
emh203 0:3d9c67d97d6f 331 {
emh203 0:3d9c67d97d6f 332 #ifndef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 333
emh203 0:3d9c67d97d6f 334 *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
emh203 0:3d9c67d97d6f 335 *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
emh203 0:3d9c67d97d6f 336
emh203 0:3d9c67d97d6f 337 #else
emh203 0:3d9c67d97d6f 338
emh203 0:3d9c67d97d6f 339 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 340 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 341 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 342 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 343
emh203 0:3d9c67d97d6f 344 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 345
emh203 0:3d9c67d97d6f 346 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 347 stgCnt--;
emh203 0:3d9c67d97d6f 348
emh203 0:3d9c67d97d6f 349 }
emh203 0:3d9c67d97d6f 350
emh203 0:3d9c67d97d6f 351 /* Calculation of count for remaining q15_t data */
emh203 0:3d9c67d97d6f 352 stgCnt = (numStages) % 0x4u;
emh203 0:3d9c67d97d6f 353
emh203 0:3d9c67d97d6f 354 /* copy data */
emh203 0:3d9c67d97d6f 355 while(stgCnt > 0u)
emh203 0:3d9c67d97d6f 356 {
emh203 0:3d9c67d97d6f 357 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 358
emh203 0:3d9c67d97d6f 359 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 360 stgCnt--;
emh203 0:3d9c67d97d6f 361 }
emh203 0:3d9c67d97d6f 362
emh203 0:3d9c67d97d6f 363 #else
emh203 0:3d9c67d97d6f 364
emh203 0:3d9c67d97d6f 365 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 366
emh203 0:3d9c67d97d6f 367 q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
emh203 0:3d9c67d97d6f 368 uint32_t stgCnt; /* Temporary variables for counts */
emh203 0:3d9c67d97d6f 369 q63_t acc; /* Accumlator */
emh203 0:3d9c67d97d6f 370 uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
emh203 0:3d9c67d97d6f 371 q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
emh203 0:3d9c67d97d6f 372 uint32_t numStages = S->numStages; /* number of stages */
emh203 0:3d9c67d97d6f 373 q15_t *pState; /* State pointer */
emh203 0:3d9c67d97d6f 374 q15_t *pStateCurnt; /* State current pointer */
emh203 0:3d9c67d97d6f 375 q15_t out; /* Temporary variable for output */
emh203 0:3d9c67d97d6f 376
emh203 0:3d9c67d97d6f 377
emh203 0:3d9c67d97d6f 378 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 379
emh203 0:3d9c67d97d6f 380 pState = &S->pState[0];
emh203 0:3d9c67d97d6f 381
emh203 0:3d9c67d97d6f 382 /* Sample processing */
emh203 0:3d9c67d97d6f 383 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 384 {
emh203 0:3d9c67d97d6f 385 /* Read Sample from input buffer */
emh203 0:3d9c67d97d6f 386 /* fN(n) = x(n) */
emh203 0:3d9c67d97d6f 387 fcurr = *pSrc++;
emh203 0:3d9c67d97d6f 388
emh203 0:3d9c67d97d6f 389 /* Initialize state read pointer */
emh203 0:3d9c67d97d6f 390 px1 = pState;
emh203 0:3d9c67d97d6f 391 /* Initialize state write pointer */
emh203 0:3d9c67d97d6f 392 px2 = pState;
emh203 0:3d9c67d97d6f 393 /* Set accumulator to zero */
emh203 0:3d9c67d97d6f 394 acc = 0;
emh203 0:3d9c67d97d6f 395 /* Initialize Ladder coeff pointer */
emh203 0:3d9c67d97d6f 396 pv = &S->pvCoeffs[0];
emh203 0:3d9c67d97d6f 397 /* Initialize Reflection coeff pointer */
emh203 0:3d9c67d97d6f 398 pk = &S->pkCoeffs[0];
emh203 0:3d9c67d97d6f 399
emh203 0:3d9c67d97d6f 400 tapCnt = numStages;
emh203 0:3d9c67d97d6f 401
emh203 0:3d9c67d97d6f 402 while(tapCnt > 0u)
emh203 0:3d9c67d97d6f 403 {
emh203 0:3d9c67d97d6f 404 gcurr = *px1++;
emh203 0:3d9c67d97d6f 405 /* Process sample */
emh203 0:3d9c67d97d6f 406 /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
emh203 0:3d9c67d97d6f 407 fnext = fcurr - ((gcurr * (*pk)) >> 15);
emh203 0:3d9c67d97d6f 408 fnext = __SSAT(fnext, 16);
emh203 0:3d9c67d97d6f 409 /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
emh203 0:3d9c67d97d6f 410 gnext = ((fnext * (*pk++)) >> 15) + gcurr;
emh203 0:3d9c67d97d6f 411 gnext = __SSAT(gnext, 16);
emh203 0:3d9c67d97d6f 412 /* Output samples */
emh203 0:3d9c67d97d6f 413 /* y(n) += gN(n) * vN */
emh203 0:3d9c67d97d6f 414 acc += (q31_t) ((gnext * (*pv++)));
emh203 0:3d9c67d97d6f 415 /* write gN(n) into state for next sample processing */
emh203 0:3d9c67d97d6f 416 *px2++ = (q15_t) gnext;
emh203 0:3d9c67d97d6f 417 /* Update f values for next coefficient processing */
emh203 0:3d9c67d97d6f 418 fcurr = fnext;
emh203 0:3d9c67d97d6f 419
emh203 0:3d9c67d97d6f 420 tapCnt--;
emh203 0:3d9c67d97d6f 421 }
emh203 0:3d9c67d97d6f 422
emh203 0:3d9c67d97d6f 423 /* y(n) += g0(n) * v0 */
emh203 0:3d9c67d97d6f 424 acc += (q31_t) ((fnext * (*pv++)));
emh203 0:3d9c67d97d6f 425
emh203 0:3d9c67d97d6f 426 out = (q15_t) __SSAT(acc >> 15, 16);
emh203 0:3d9c67d97d6f 427 *px2++ = (q15_t) fnext;
emh203 0:3d9c67d97d6f 428
emh203 0:3d9c67d97d6f 429 /* write out into pDst */
emh203 0:3d9c67d97d6f 430 *pDst++ = out;
emh203 0:3d9c67d97d6f 431
emh203 0:3d9c67d97d6f 432 /* Advance the state pointer by 1 to process the next group of samples */
emh203 0:3d9c67d97d6f 433 pState = pState + 1u;
emh203 0:3d9c67d97d6f 434 blkCnt--;
emh203 0:3d9c67d97d6f 435
emh203 0:3d9c67d97d6f 436 }
emh203 0:3d9c67d97d6f 437
emh203 0:3d9c67d97d6f 438 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emh203 0:3d9c67d97d6f 439 for the preperation of next frame process */
emh203 0:3d9c67d97d6f 440 /* Points to the start of the state buffer */
emh203 0:3d9c67d97d6f 441 pStateCurnt = &S->pState[0];
emh203 0:3d9c67d97d6f 442 pState = &S->pState[blockSize];
emh203 0:3d9c67d97d6f 443
emh203 0:3d9c67d97d6f 444 stgCnt = numStages;
emh203 0:3d9c67d97d6f 445
emh203 0:3d9c67d97d6f 446 /* copy data */
emh203 0:3d9c67d97d6f 447 while(stgCnt > 0u)
emh203 0:3d9c67d97d6f 448 {
emh203 0:3d9c67d97d6f 449 *pStateCurnt++ = *pState++;
emh203 0:3d9c67d97d6f 450
emh203 0:3d9c67d97d6f 451 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 452 stgCnt--;
emh203 0:3d9c67d97d6f 453 }
emh203 0:3d9c67d97d6f 454
emh203 0:3d9c67d97d6f 455 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 456
emh203 0:3d9c67d97d6f 457 }
emh203 0:3d9c67d97d6f 458
emh203 0:3d9c67d97d6f 459
emh203 0:3d9c67d97d6f 460
emh203 0:3d9c67d97d6f 461
emh203 0:3d9c67d97d6f 462 /**
emh203 0:3d9c67d97d6f 463 * @} end of IIR_Lattice group
emh203 0:3d9c67d97d6f 464 */