V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_fir_init_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 FIR filter initialization function.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupFilters
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup FIR
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
emh203 0:3d9c67d97d6f 54 * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
emh203 0:3d9c67d97d6f 55 * @param[in] *pCoeffs points to the filter coefficients buffer.
emh203 0:3d9c67d97d6f 56 * @param[in] *pState points to the state buffer.
emh203 0:3d9c67d97d6f 57 * @param[in] blockSize is number of samples processed per call.
emh203 0:3d9c67d97d6f 58 * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
emh203 0:3d9c67d97d6f 59 * <code>numTaps</code> is not greater than or equal to 4 and even.
emh203 0:3d9c67d97d6f 60 *
emh203 0:3d9c67d97d6f 61 * <b>Description:</b>
emh203 0:3d9c67d97d6f 62 * \par
emh203 0:3d9c67d97d6f 63 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
emh203 0:3d9c67d97d6f 64 * <pre>
emh203 0:3d9c67d97d6f 65 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
emh203 0:3d9c67d97d6f 66 * </pre>
emh203 0:3d9c67d97d6f 67 * Note that <code>numTaps</code> must be even and greater than or equal to 4.
emh203 0:3d9c67d97d6f 68 * To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
emh203 0:3d9c67d97d6f 69 * For example, to implement a filter with <code>numTaps=3</code> and coefficients
emh203 0:3d9c67d97d6f 70 * <pre>
emh203 0:3d9c67d97d6f 71 * {0.3, -0.8, 0.3}
emh203 0:3d9c67d97d6f 72 * </pre>
emh203 0:3d9c67d97d6f 73 * set <code>numTaps=4</code> and use the coefficients:
emh203 0:3d9c67d97d6f 74 * <pre>
emh203 0:3d9c67d97d6f 75 * {0.3, -0.8, 0.3, 0}.
emh203 0:3d9c67d97d6f 76 * </pre>
emh203 0:3d9c67d97d6f 77 * Similarly, to implement a two point filter
emh203 0:3d9c67d97d6f 78 * <pre>
emh203 0:3d9c67d97d6f 79 * {0.3, -0.3}
emh203 0:3d9c67d97d6f 80 * </pre>
emh203 0:3d9c67d97d6f 81 * set <code>numTaps=4</code> and use the coefficients:
emh203 0:3d9c67d97d6f 82 * <pre>
emh203 0:3d9c67d97d6f 83 * {0.3, -0.3, 0, 0}.
emh203 0:3d9c67d97d6f 84 * </pre>
emh203 0:3d9c67d97d6f 85 * \par
emh203 0:3d9c67d97d6f 86 * <code>pState</code> points to the array of state variables.
emh203 0:3d9c67d97d6f 87 * <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
emh203 0:3d9c67d97d6f 88 */
emh203 0:3d9c67d97d6f 89
emh203 0:3d9c67d97d6f 90 arm_status arm_fir_init_q15(
emh203 0:3d9c67d97d6f 91 arm_fir_instance_q15 * S,
emh203 0:3d9c67d97d6f 92 uint16_t numTaps,
emh203 0:3d9c67d97d6f 93 q15_t * pCoeffs,
emh203 0:3d9c67d97d6f 94 q15_t * pState,
emh203 0:3d9c67d97d6f 95 uint32_t blockSize)
emh203 0:3d9c67d97d6f 96 {
emh203 0:3d9c67d97d6f 97 arm_status status;
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99
emh203 0:3d9c67d97d6f 100 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* The Number of filter coefficients in the filter must be even and at least 4 */
emh203 0:3d9c67d97d6f 105 if(numTaps & 0x1u)
emh203 0:3d9c67d97d6f 106 {
emh203 0:3d9c67d97d6f 107 status = ARM_MATH_ARGUMENT_ERROR;
emh203 0:3d9c67d97d6f 108 }
emh203 0:3d9c67d97d6f 109 else
emh203 0:3d9c67d97d6f 110 {
emh203 0:3d9c67d97d6f 111 /* Assign filter taps */
emh203 0:3d9c67d97d6f 112 S->numTaps = numTaps;
emh203 0:3d9c67d97d6f 113
emh203 0:3d9c67d97d6f 114 /* Assign coefficient pointer */
emh203 0:3d9c67d97d6f 115 S->pCoeffs = pCoeffs;
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 /* Clear the state buffer. The size is always (blockSize + numTaps ) */
emh203 0:3d9c67d97d6f 118 memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 /* Assign state pointer */
emh203 0:3d9c67d97d6f 121 S->pState = pState;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 124 }
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 return (status);
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 #else
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 131
emh203 0:3d9c67d97d6f 132 /* Assign filter taps */
emh203 0:3d9c67d97d6f 133 S->numTaps = numTaps;
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 /* Assign coefficient pointer */
emh203 0:3d9c67d97d6f 136 S->pCoeffs = pCoeffs;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
emh203 0:3d9c67d97d6f 139 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* Assign state pointer */
emh203 0:3d9c67d97d6f 142 S->pState = pState;
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 return (status);
emh203 0:3d9c67d97d6f 147
emh203 0:3d9c67d97d6f 148 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 }
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 /**
emh203 0:3d9c67d97d6f 153 * @} end of FIR group
emh203 0:3d9c67d97d6f 154 */