V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.
Dependents: MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more
FilteringFunctions/arm_biquad_cascade_df1_init_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)
- Committer:
- emh203
- Date:
- Mon Jul 28 15:03:15 2014 +0000
- Revision:
- 0:3d9c67d97d6f
1st working commit. Had to remove arm_bitreversal2.s arm_cfft_f32.c and arm_rfft_fast_f32.c. The .s will not assemble. For now I removed these functions so we could at least have a library for the other functions.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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emh203 | 0:3d9c67d97d6f | 1 | /*----------------------------------------------------------------------------- |
emh203 | 0:3d9c67d97d6f | 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
emh203 | 0:3d9c67d97d6f | 3 | * |
emh203 | 0:3d9c67d97d6f | 4 | * $Date: 12. March 2014 |
emh203 | 0:3d9c67d97d6f | 5 | * $Revision: V1.4.3 |
emh203 | 0:3d9c67d97d6f | 6 | * |
emh203 | 0:3d9c67d97d6f | 7 | * Project: CMSIS DSP Library |
emh203 | 0:3d9c67d97d6f | 8 | * Title: arm_biquad_cascade_df1_init_q15.c |
emh203 | 0:3d9c67d97d6f | 9 | * |
emh203 | 0:3d9c67d97d6f | 10 | * Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function. |
emh203 | 0:3d9c67d97d6f | 11 | * |
emh203 | 0:3d9c67d97d6f | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emh203 | 0:3d9c67d97d6f | 13 | * |
emh203 | 0:3d9c67d97d6f | 14 | * Redistribution and use in source and binary forms, with or without |
emh203 | 0:3d9c67d97d6f | 15 | * modification, are permitted provided that the following conditions |
emh203 | 0:3d9c67d97d6f | 16 | * are met: |
emh203 | 0:3d9c67d97d6f | 17 | * - Redistributions of source code must retain the above copyright |
emh203 | 0:3d9c67d97d6f | 18 | * notice, this list of conditions and the following disclaimer. |
emh203 | 0:3d9c67d97d6f | 19 | * - Redistributions in binary form must reproduce the above copyright |
emh203 | 0:3d9c67d97d6f | 20 | * notice, this list of conditions and the following disclaimer in |
emh203 | 0:3d9c67d97d6f | 21 | * the documentation and/or other materials provided with the |
emh203 | 0:3d9c67d97d6f | 22 | * distribution. |
emh203 | 0:3d9c67d97d6f | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
emh203 | 0:3d9c67d97d6f | 24 | * may be used to endorse or promote products derived from this |
emh203 | 0:3d9c67d97d6f | 25 | * software without specific prior written permission. |
emh203 | 0:3d9c67d97d6f | 26 | * |
emh203 | 0:3d9c67d97d6f | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
emh203 | 0:3d9c67d97d6f | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
emh203 | 0:3d9c67d97d6f | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
emh203 | 0:3d9c67d97d6f | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
emh203 | 0:3d9c67d97d6f | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
emh203 | 0:3d9c67d97d6f | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
emh203 | 0:3d9c67d97d6f | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
emh203 | 0:3d9c67d97d6f | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
emh203 | 0:3d9c67d97d6f | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
emh203 | 0:3d9c67d97d6f | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
emh203 | 0:3d9c67d97d6f | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
emh203 | 0:3d9c67d97d6f | 38 | * POSSIBILITY OF SUCH DAMAGE. |
emh203 | 0:3d9c67d97d6f | 39 | * ---------------------------------------------------------------------------*/ |
emh203 | 0:3d9c67d97d6f | 40 | |
emh203 | 0:3d9c67d97d6f | 41 | #include "arm_math.h" |
emh203 | 0:3d9c67d97d6f | 42 | |
emh203 | 0:3d9c67d97d6f | 43 | /** |
emh203 | 0:3d9c67d97d6f | 44 | * @ingroup groupFilters |
emh203 | 0:3d9c67d97d6f | 45 | */ |
emh203 | 0:3d9c67d97d6f | 46 | |
emh203 | 0:3d9c67d97d6f | 47 | /** |
emh203 | 0:3d9c67d97d6f | 48 | * @addtogroup BiquadCascadeDF1 |
emh203 | 0:3d9c67d97d6f | 49 | * @{ |
emh203 | 0:3d9c67d97d6f | 50 | */ |
emh203 | 0:3d9c67d97d6f | 51 | |
emh203 | 0:3d9c67d97d6f | 52 | /** |
emh203 | 0:3d9c67d97d6f | 53 | * @details |
emh203 | 0:3d9c67d97d6f | 54 | * |
emh203 | 0:3d9c67d97d6f | 55 | * @param[in,out] *S points to an instance of the Q15 Biquad cascade structure. |
emh203 | 0:3d9c67d97d6f | 56 | * @param[in] numStages number of 2nd order stages in the filter. |
emh203 | 0:3d9c67d97d6f | 57 | * @param[in] *pCoeffs points to the filter coefficients. |
emh203 | 0:3d9c67d97d6f | 58 | * @param[in] *pState points to the state buffer. |
emh203 | 0:3d9c67d97d6f | 59 | * @param[in] postShift Shift to be applied to the accumulator result. Varies according to the coefficients format |
emh203 | 0:3d9c67d97d6f | 60 | * @return none |
emh203 | 0:3d9c67d97d6f | 61 | * |
emh203 | 0:3d9c67d97d6f | 62 | * <b>Coefficient and State Ordering:</b> |
emh203 | 0:3d9c67d97d6f | 63 | * |
emh203 | 0:3d9c67d97d6f | 64 | * \par |
emh203 | 0:3d9c67d97d6f | 65 | * The coefficients are stored in the array <code>pCoeffs</code> in the following order: |
emh203 | 0:3d9c67d97d6f | 66 | * <pre> |
emh203 | 0:3d9c67d97d6f | 67 | * {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...} |
emh203 | 0:3d9c67d97d6f | 68 | * </pre> |
emh203 | 0:3d9c67d97d6f | 69 | * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, |
emh203 | 0:3d9c67d97d6f | 70 | * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, |
emh203 | 0:3d9c67d97d6f | 71 | * and so on. The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values. |
emh203 | 0:3d9c67d97d6f | 72 | * The zero coefficient between <code>b1</code> and <code>b2</code> facilities use of 16-bit SIMD instructions on the Cortex-M4. |
emh203 | 0:3d9c67d97d6f | 73 | * |
emh203 | 0:3d9c67d97d6f | 74 | * \par |
emh203 | 0:3d9c67d97d6f | 75 | * The state variables are stored in the array <code>pState</code>. |
emh203 | 0:3d9c67d97d6f | 76 | * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. |
emh203 | 0:3d9c67d97d6f | 77 | * The state variables are arranged in the <code>pState</code> array as: |
emh203 | 0:3d9c67d97d6f | 78 | * <pre> |
emh203 | 0:3d9c67d97d6f | 79 | * {x[n-1], x[n-2], y[n-1], y[n-2]} |
emh203 | 0:3d9c67d97d6f | 80 | * </pre> |
emh203 | 0:3d9c67d97d6f | 81 | * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. |
emh203 | 0:3d9c67d97d6f | 82 | * The state array has a total length of <code>4*numStages</code> values. |
emh203 | 0:3d9c67d97d6f | 83 | * The state variables are updated after each block of data is processed; the coefficients are untouched. |
emh203 | 0:3d9c67d97d6f | 84 | */ |
emh203 | 0:3d9c67d97d6f | 85 | |
emh203 | 0:3d9c67d97d6f | 86 | void arm_biquad_cascade_df1_init_q15( |
emh203 | 0:3d9c67d97d6f | 87 | arm_biquad_casd_df1_inst_q15 * S, |
emh203 | 0:3d9c67d97d6f | 88 | uint8_t numStages, |
emh203 | 0:3d9c67d97d6f | 89 | q15_t * pCoeffs, |
emh203 | 0:3d9c67d97d6f | 90 | q15_t * pState, |
emh203 | 0:3d9c67d97d6f | 91 | int8_t postShift) |
emh203 | 0:3d9c67d97d6f | 92 | { |
emh203 | 0:3d9c67d97d6f | 93 | /* Assign filter stages */ |
emh203 | 0:3d9c67d97d6f | 94 | S->numStages = numStages; |
emh203 | 0:3d9c67d97d6f | 95 | |
emh203 | 0:3d9c67d97d6f | 96 | /* Assign postShift to be applied to the output */ |
emh203 | 0:3d9c67d97d6f | 97 | S->postShift = postShift; |
emh203 | 0:3d9c67d97d6f | 98 | |
emh203 | 0:3d9c67d97d6f | 99 | /* Assign coefficient pointer */ |
emh203 | 0:3d9c67d97d6f | 100 | S->pCoeffs = pCoeffs; |
emh203 | 0:3d9c67d97d6f | 101 | |
emh203 | 0:3d9c67d97d6f | 102 | /* Clear state buffer and size is always 4 * numStages */ |
emh203 | 0:3d9c67d97d6f | 103 | memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t)); |
emh203 | 0:3d9c67d97d6f | 104 | |
emh203 | 0:3d9c67d97d6f | 105 | /* Assign state pointer */ |
emh203 | 0:3d9c67d97d6f | 106 | S->pState = pState; |
emh203 | 0:3d9c67d97d6f | 107 | } |
emh203 | 0:3d9c67d97d6f | 108 | |
emh203 | 0:3d9c67d97d6f | 109 | /** |
emh203 | 0:3d9c67d97d6f | 110 | * @} end of BiquadCascadeDF1 group |
emh203 | 0:3d9c67d97d6f | 111 | */ |