Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_scale_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_scale_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Multiplies a floating-point vector by a scalar.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @defgroup scale Vector Scale
emh203 0:3d9c67d97d6f 49 *
emh203 0:3d9c67d97d6f 50 * Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
emh203 0:3d9c67d97d6f 51 *
emh203 0:3d9c67d97d6f 52 * <pre>
emh203 0:3d9c67d97d6f 53 * pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
emh203 0:3d9c67d97d6f 54 * </pre>
emh203 0:3d9c67d97d6f 55 *
emh203 0:3d9c67d97d6f 56 * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
emh203 0:3d9c67d97d6f 57 * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
emh203 0:3d9c67d97d6f 58 * The shift allows the gain of the scaling operation to exceed 1.0.
emh203 0:3d9c67d97d6f 59 * The algorithm used with fixed-point data is:
emh203 0:3d9c67d97d6f 60 *
emh203 0:3d9c67d97d6f 61 * <pre>
emh203 0:3d9c67d97d6f 62 * pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
emh203 0:3d9c67d97d6f 63 * </pre>
emh203 0:3d9c67d97d6f 64 *
emh203 0:3d9c67d97d6f 65 * The overall scale factor applied to the fixed-point data is
emh203 0:3d9c67d97d6f 66 * <pre>
emh203 0:3d9c67d97d6f 67 * scale = scaleFract * 2^shift.
emh203 0:3d9c67d97d6f 68 * </pre>
emh203 0:3d9c67d97d6f 69 *
emh203 0:3d9c67d97d6f 70 * The functions support in-place computation allowing the source and destination
emh203 0:3d9c67d97d6f 71 * pointers to reference the same memory buffer.
emh203 0:3d9c67d97d6f 72 */
emh203 0:3d9c67d97d6f 73
emh203 0:3d9c67d97d6f 74 /**
emh203 0:3d9c67d97d6f 75 * @addtogroup scale
emh203 0:3d9c67d97d6f 76 * @{
emh203 0:3d9c67d97d6f 77 */
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 /**
emh203 0:3d9c67d97d6f 80 * @brief Multiplies a floating-point vector by a scalar.
emh203 0:3d9c67d97d6f 81 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 82 * @param[in] scale scale factor to be applied
emh203 0:3d9c67d97d6f 83 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 84 * @param[in] blockSize number of samples in the vector
emh203 0:3d9c67d97d6f 85 * @return none.
emh203 0:3d9c67d97d6f 86 */
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88
emh203 0:3d9c67d97d6f 89 void arm_scale_f32(
emh203 0:3d9c67d97d6f 90 float32_t * pSrc,
emh203 0:3d9c67d97d6f 91 float32_t scale,
emh203 0:3d9c67d97d6f 92 float32_t * pDst,
emh203 0:3d9c67d97d6f 93 uint32_t blockSize)
emh203 0:3d9c67d97d6f 94 {
emh203 0:3d9c67d97d6f 95 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 96 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 97
emh203 0:3d9c67d97d6f 98 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 99 float32_t in1, in2, in3, in4; /* temporary variabels */
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101 /*loop Unrolling */
emh203 0:3d9c67d97d6f 102 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 105 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 106 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 107 {
emh203 0:3d9c67d97d6f 108 /* C = A * scale */
emh203 0:3d9c67d97d6f 109 /* Scale the input and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 110 /* read input samples from source */
emh203 0:3d9c67d97d6f 111 in1 = *pSrc;
emh203 0:3d9c67d97d6f 112 in2 = *(pSrc + 1);
emh203 0:3d9c67d97d6f 113
emh203 0:3d9c67d97d6f 114 /* multiply with scaling factor */
emh203 0:3d9c67d97d6f 115 in1 = in1 * scale;
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 /* read input sample from source */
emh203 0:3d9c67d97d6f 118 in3 = *(pSrc + 2);
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 /* multiply with scaling factor */
emh203 0:3d9c67d97d6f 121 in2 = in2 * scale;
emh203 0:3d9c67d97d6f 122
emh203 0:3d9c67d97d6f 123 /* read input sample from source */
emh203 0:3d9c67d97d6f 124 in4 = *(pSrc + 3);
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 /* multiply with scaling factor */
emh203 0:3d9c67d97d6f 127 in3 = in3 * scale;
emh203 0:3d9c67d97d6f 128 in4 = in4 * scale;
emh203 0:3d9c67d97d6f 129 /* store the result to destination */
emh203 0:3d9c67d97d6f 130 *pDst = in1;
emh203 0:3d9c67d97d6f 131 *(pDst + 1) = in2;
emh203 0:3d9c67d97d6f 132 *(pDst + 2) = in3;
emh203 0:3d9c67d97d6f 133 *(pDst + 3) = in4;
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 /* update pointers to process next samples */
emh203 0:3d9c67d97d6f 136 pSrc += 4u;
emh203 0:3d9c67d97d6f 137 pDst += 4u;
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 140 blkCnt--;
emh203 0:3d9c67d97d6f 141 }
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 144 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 145 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 #else
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 152 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 157 {
emh203 0:3d9c67d97d6f 158 /* C = A * scale */
emh203 0:3d9c67d97d6f 159 /* Scale the input and then store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 160 *pDst++ = (*pSrc++) * scale;
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 163 blkCnt--;
emh203 0:3d9c67d97d6f 164 }
emh203 0:3d9c67d97d6f 165 }
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 /**
emh203 0:3d9c67d97d6f 168 * @} end of scale group
emh203 0:3d9c67d97d6f 169 */