Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_mult_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mult_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point vector multiplication.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @defgroup BasicMult Vector Multiplication
emh203 0:3d9c67d97d6f 49 *
emh203 0:3d9c67d97d6f 50 * Element-by-element multiplication of two vectors.
emh203 0:3d9c67d97d6f 51 *
emh203 0:3d9c67d97d6f 52 * <pre>
emh203 0:3d9c67d97d6f 53 * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
emh203 0:3d9c67d97d6f 54 * </pre>
emh203 0:3d9c67d97d6f 55 *
emh203 0:3d9c67d97d6f 56 * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
emh203 0:3d9c67d97d6f 57 */
emh203 0:3d9c67d97d6f 58
emh203 0:3d9c67d97d6f 59 /**
emh203 0:3d9c67d97d6f 60 * @addtogroup BasicMult
emh203 0:3d9c67d97d6f 61 * @{
emh203 0:3d9c67d97d6f 62 */
emh203 0:3d9c67d97d6f 63
emh203 0:3d9c67d97d6f 64 /**
emh203 0:3d9c67d97d6f 65 * @brief Floating-point vector multiplication.
emh203 0:3d9c67d97d6f 66 * @param[in] *pSrcA points to the first input vector
emh203 0:3d9c67d97d6f 67 * @param[in] *pSrcB points to the second input vector
emh203 0:3d9c67d97d6f 68 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 69 * @param[in] blockSize number of samples in each vector
emh203 0:3d9c67d97d6f 70 * @return none.
emh203 0:3d9c67d97d6f 71 */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 void arm_mult_f32(
emh203 0:3d9c67d97d6f 74 float32_t * pSrcA,
emh203 0:3d9c67d97d6f 75 float32_t * pSrcB,
emh203 0:3d9c67d97d6f 76 float32_t * pDst,
emh203 0:3d9c67d97d6f 77 uint32_t blockSize)
emh203 0:3d9c67d97d6f 78 {
emh203 0:3d9c67d97d6f 79 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 80 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 83 float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
emh203 0:3d9c67d97d6f 84 float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
emh203 0:3d9c67d97d6f 85 float32_t out1, out2, out3, out4; /* temporary output variables */
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 /* loop Unrolling */
emh203 0:3d9c67d97d6f 88 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 89
emh203 0:3d9c67d97d6f 90 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 91 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 92 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 93 {
emh203 0:3d9c67d97d6f 94 /* C = A * B */
emh203 0:3d9c67d97d6f 95 /* Multiply the inputs and store the results in output buffer */
emh203 0:3d9c67d97d6f 96 /* read sample from sourceA */
emh203 0:3d9c67d97d6f 97 inA1 = *pSrcA;
emh203 0:3d9c67d97d6f 98 /* read sample from sourceB */
emh203 0:3d9c67d97d6f 99 inB1 = *pSrcB;
emh203 0:3d9c67d97d6f 100 /* read sample from sourceA */
emh203 0:3d9c67d97d6f 101 inA2 = *(pSrcA + 1);
emh203 0:3d9c67d97d6f 102 /* read sample from sourceB */
emh203 0:3d9c67d97d6f 103 inB2 = *(pSrcB + 1);
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* out = sourceA * sourceB */
emh203 0:3d9c67d97d6f 106 out1 = inA1 * inB1;
emh203 0:3d9c67d97d6f 107
emh203 0:3d9c67d97d6f 108 /* read sample from sourceA */
emh203 0:3d9c67d97d6f 109 inA3 = *(pSrcA + 2);
emh203 0:3d9c67d97d6f 110 /* read sample from sourceB */
emh203 0:3d9c67d97d6f 111 inB3 = *(pSrcB + 2);
emh203 0:3d9c67d97d6f 112
emh203 0:3d9c67d97d6f 113 /* out = sourceA * sourceB */
emh203 0:3d9c67d97d6f 114 out2 = inA2 * inB2;
emh203 0:3d9c67d97d6f 115
emh203 0:3d9c67d97d6f 116 /* read sample from sourceA */
emh203 0:3d9c67d97d6f 117 inA4 = *(pSrcA + 3);
emh203 0:3d9c67d97d6f 118
emh203 0:3d9c67d97d6f 119 /* store result to destination buffer */
emh203 0:3d9c67d97d6f 120 *pDst = out1;
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 /* read sample from sourceB */
emh203 0:3d9c67d97d6f 123 inB4 = *(pSrcB + 3);
emh203 0:3d9c67d97d6f 124
emh203 0:3d9c67d97d6f 125 /* out = sourceA * sourceB */
emh203 0:3d9c67d97d6f 126 out3 = inA3 * inB3;
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* store result to destination buffer */
emh203 0:3d9c67d97d6f 129 *(pDst + 1) = out2;
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 /* out = sourceA * sourceB */
emh203 0:3d9c67d97d6f 132 out4 = inA4 * inB4;
emh203 0:3d9c67d97d6f 133 /* store result to destination buffer */
emh203 0:3d9c67d97d6f 134 *(pDst + 2) = out3;
emh203 0:3d9c67d97d6f 135 /* store result to destination buffer */
emh203 0:3d9c67d97d6f 136 *(pDst + 3) = out4;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* update pointers to process next samples */
emh203 0:3d9c67d97d6f 140 pSrcA += 4u;
emh203 0:3d9c67d97d6f 141 pSrcB += 4u;
emh203 0:3d9c67d97d6f 142 pDst += 4u;
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 /* Decrement the blockSize loop counter */
emh203 0:3d9c67d97d6f 145 blkCnt--;
emh203 0:3d9c67d97d6f 146 }
emh203 0:3d9c67d97d6f 147
emh203 0:3d9c67d97d6f 148 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 149 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 150 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 #else
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 157 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 160
emh203 0:3d9c67d97d6f 161 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 162 {
emh203 0:3d9c67d97d6f 163 /* C = A * B */
emh203 0:3d9c67d97d6f 164 /* Multiply the inputs and store the results in output buffer */
emh203 0:3d9c67d97d6f 165 *pDst++ = (*pSrcA++) * (*pSrcB++);
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 /* Decrement the blockSize loop counter */
emh203 0:3d9c67d97d6f 168 blkCnt--;
emh203 0:3d9c67d97d6f 169 }
emh203 0:3d9c67d97d6f 170 }
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 /**
emh203 0:3d9c67d97d6f 173 * @} end of BasicMult group
emh203 0:3d9c67d97d6f 174 */