Device Driver for RAMTRON FM25W256 SPI-driven FRAM Uses SPI peripheral at 10MHz Based on fast SPI routines
fm25w256.h@0:2290931492e7, 2012-04-05 (annotated)
- Committer:
- elmicro
- Date:
- Thu Apr 05 10:15:52 2012 +0000
- Revision:
- 0:2290931492e7
Initial Revision with Read Block, Write Block, Read Byte, Write Byte
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
elmicro | 0:2290931492e7 | 1 | #include "mbed.h" |
elmicro | 0:2290931492e7 | 2 | |
elmicro | 0:2290931492e7 | 3 | //Shortcuts |
elmicro | 0:2290931492e7 | 4 | #define SSL1 LPC_GPIO0->FIOSET = BIT6 |
elmicro | 0:2290931492e7 | 5 | #define SSL0 LPC_GPIO0->FIOCLR = BIT6 |
elmicro | 0:2290931492e7 | 6 | |
elmicro | 0:2290931492e7 | 7 | // Aliases for code readability |
elmicro | 0:2290931492e7 | 8 | #define BIT31 0x80000000 |
elmicro | 0:2290931492e7 | 9 | #define BIT30 0x40000000 |
elmicro | 0:2290931492e7 | 10 | #define BIT29 0x20000000 |
elmicro | 0:2290931492e7 | 11 | #define BIT28 0x10000000 |
elmicro | 0:2290931492e7 | 12 | #define BIT27 0x08000000 |
elmicro | 0:2290931492e7 | 13 | #define BIT26 0x04000000 |
elmicro | 0:2290931492e7 | 14 | #define BIT25 0x02000000 |
elmicro | 0:2290931492e7 | 15 | #define BIT24 0x01000000 |
elmicro | 0:2290931492e7 | 16 | #define BIT23 0x00800000 |
elmicro | 0:2290931492e7 | 17 | #define BIT22 0x00400000 |
elmicro | 0:2290931492e7 | 18 | #define BIT21 0x00200000 |
elmicro | 0:2290931492e7 | 19 | #define BIT20 0x00100000 |
elmicro | 0:2290931492e7 | 20 | #define BIT19 0x00080000 |
elmicro | 0:2290931492e7 | 21 | #define BIT18 0x00040000 |
elmicro | 0:2290931492e7 | 22 | #define BIT17 0x00020000 |
elmicro | 0:2290931492e7 | 23 | #define BIT16 0x00010000 |
elmicro | 0:2290931492e7 | 24 | #define BIT15 0x00008000 |
elmicro | 0:2290931492e7 | 25 | #define BIT14 0x00004000 |
elmicro | 0:2290931492e7 | 26 | #define BIT13 0x00002000 |
elmicro | 0:2290931492e7 | 27 | #define BIT12 0x00001000 |
elmicro | 0:2290931492e7 | 28 | #define BIT11 0x00000800 |
elmicro | 0:2290931492e7 | 29 | #define BIT10 0x00000400 |
elmicro | 0:2290931492e7 | 30 | #define BIT9 0x00000200 |
elmicro | 0:2290931492e7 | 31 | #define BIT8 0x00000100 |
elmicro | 0:2290931492e7 | 32 | #define BIT7 0x00000080 |
elmicro | 0:2290931492e7 | 33 | #define BIT6 0x00000040 |
elmicro | 0:2290931492e7 | 34 | #define BIT5 0x00000020 |
elmicro | 0:2290931492e7 | 35 | #define BIT4 0x00000010 |
elmicro | 0:2290931492e7 | 36 | #define BIT3 0x00000008 |
elmicro | 0:2290931492e7 | 37 | #define BIT2 0x00000004 |
elmicro | 0:2290931492e7 | 38 | #define BIT1 0x00000002 |
elmicro | 0:2290931492e7 | 39 | #define BIT0 0x00000001 |
elmicro | 0:2290931492e7 | 40 | |
elmicro | 0:2290931492e7 | 41 | // FeRAM command defines |
elmicro | 0:2290931492e7 | 42 | #define WREN 0x06 // Write enable |
elmicro | 0:2290931492e7 | 43 | #define WRITE 0x02 // Write command |
elmicro | 0:2290931492e7 | 44 | #define READ 0x03 // Read command |
elmicro | 0:2290931492e7 | 45 | #define RDSR 0x05 // Read Status Register |
elmicro | 0:2290931492e7 | 46 | |
elmicro | 0:2290931492e7 | 47 | |
elmicro | 0:2290931492e7 | 48 | void FM25W_SSP1_Init (void); |
elmicro | 0:2290931492e7 | 49 | unsigned char FM25W_ReadByte (unsigned int iAddress); |
elmicro | 0:2290931492e7 | 50 | void FM25W_WriteByte (unsigned int iAddress, unsigned char cByte); |
elmicro | 0:2290931492e7 | 51 | void FM25W_WriteBlock(unsigned int iAddress, unsigned char *ptrBlock, unsigned int iCount); |
elmicro | 0:2290931492e7 | 52 | void FM25W_ReadBlock (unsigned int iAddress, unsigned char *ptrBlock, unsigned int iCount); |