Jason Garner / ARM

same stuff from mbed trunk (LPC17xx.h, etc.) but nothing else

Dependents:   registers-example test test Tweeting_Machine_HelloWorld_WIZwiki-W750

same as the mbed trunk dated december 20th, 2012

(latest version is here: http://mbed.org/projects/libraries/svn/mbed/trunk/LPC1768/ARM)

LPC17xx.h@0:f86e6135dcbc, 2012-12-21 (annotated)

Committer:
elevatorguy
Date:
Fri Dec 21 01:54:37 2012 +0000
Revision:
0:f86e6135dcbc
standard library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elevatorguy 0:f86e6135dcbc 1 /**************************************************************************//**
elevatorguy 0:f86e6135dcbc 2 * @file LPC17xx.h
elevatorguy 0:f86e6135dcbc 3 * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File for
elevatorguy 0:f86e6135dcbc 4 * NXP LPC17xx Device Series
elevatorguy 0:f86e6135dcbc 5 * @version: V1.09
elevatorguy 0:f86e6135dcbc 6 * @date: 17. March 2010
elevatorguy 0:f86e6135dcbc 7
elevatorguy 0:f86e6135dcbc 8 *
elevatorguy 0:f86e6135dcbc 9 * @note
elevatorguy 0:f86e6135dcbc 10 * Copyright (C) 2009 ARM Limited. All rights reserved.
elevatorguy 0:f86e6135dcbc 11 *
elevatorguy 0:f86e6135dcbc 12 * @par
elevatorguy 0:f86e6135dcbc 13 * ARM Limited (ARM) is supplying this software for use with Cortex-M
elevatorguy 0:f86e6135dcbc 14 * processor based microcontrollers. This file can be freely distributed
elevatorguy 0:f86e6135dcbc 15 * within development tools that are supporting such ARM based processors.
elevatorguy 0:f86e6135dcbc 16 *
elevatorguy 0:f86e6135dcbc 17 * @par
elevatorguy 0:f86e6135dcbc 18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elevatorguy 0:f86e6135dcbc 19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elevatorguy 0:f86e6135dcbc 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elevatorguy 0:f86e6135dcbc 21 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
elevatorguy 0:f86e6135dcbc 22 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elevatorguy 0:f86e6135dcbc 23 *
elevatorguy 0:f86e6135dcbc 24 ******************************************************************************/
elevatorguy 0:f86e6135dcbc 25
elevatorguy 0:f86e6135dcbc 26
elevatorguy 0:f86e6135dcbc 27 #ifndef __LPC17xx_H__
elevatorguy 0:f86e6135dcbc 28 #define __LPC17xx_H__
elevatorguy 0:f86e6135dcbc 29
elevatorguy 0:f86e6135dcbc 30 /*
elevatorguy 0:f86e6135dcbc 31 * ==========================================================================
elevatorguy 0:f86e6135dcbc 32 * ---------- Interrupt Number Definition -----------------------------------
elevatorguy 0:f86e6135dcbc 33 * ==========================================================================
elevatorguy 0:f86e6135dcbc 34 */
elevatorguy 0:f86e6135dcbc 35
elevatorguy 0:f86e6135dcbc 36 typedef enum IRQn
elevatorguy 0:f86e6135dcbc 37 {
elevatorguy 0:f86e6135dcbc 38 /****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
elevatorguy 0:f86e6135dcbc 39 NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
elevatorguy 0:f86e6135dcbc 40 MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
elevatorguy 0:f86e6135dcbc 41 BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
elevatorguy 0:f86e6135dcbc 42 UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
elevatorguy 0:f86e6135dcbc 43 SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
elevatorguy 0:f86e6135dcbc 44 DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
elevatorguy 0:f86e6135dcbc 45 PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
elevatorguy 0:f86e6135dcbc 46 SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
elevatorguy 0:f86e6135dcbc 47
elevatorguy 0:f86e6135dcbc 48 /****** LPC17xx Specific Interrupt Numbers *******************************************************/
elevatorguy 0:f86e6135dcbc 49 WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */
elevatorguy 0:f86e6135dcbc 50 TIMER0_IRQn = 1, /*!< Timer0 Interrupt */
elevatorguy 0:f86e6135dcbc 51 TIMER1_IRQn = 2, /*!< Timer1 Interrupt */
elevatorguy 0:f86e6135dcbc 52 TIMER2_IRQn = 3, /*!< Timer2 Interrupt */
elevatorguy 0:f86e6135dcbc 53 TIMER3_IRQn = 4, /*!< Timer3 Interrupt */
elevatorguy 0:f86e6135dcbc 54 UART0_IRQn = 5, /*!< UART0 Interrupt */
elevatorguy 0:f86e6135dcbc 55 UART1_IRQn = 6, /*!< UART1 Interrupt */
elevatorguy 0:f86e6135dcbc 56 UART2_IRQn = 7, /*!< UART2 Interrupt */
elevatorguy 0:f86e6135dcbc 57 UART3_IRQn = 8, /*!< UART3 Interrupt */
elevatorguy 0:f86e6135dcbc 58 PWM1_IRQn = 9, /*!< PWM1 Interrupt */
elevatorguy 0:f86e6135dcbc 59 I2C0_IRQn = 10, /*!< I2C0 Interrupt */
elevatorguy 0:f86e6135dcbc 60 I2C1_IRQn = 11, /*!< I2C1 Interrupt */
elevatorguy 0:f86e6135dcbc 61 I2C2_IRQn = 12, /*!< I2C2 Interrupt */
elevatorguy 0:f86e6135dcbc 62 SPI_IRQn = 13, /*!< SPI Interrupt */
elevatorguy 0:f86e6135dcbc 63 SSP0_IRQn = 14, /*!< SSP0 Interrupt */
elevatorguy 0:f86e6135dcbc 64 SSP1_IRQn = 15, /*!< SSP1 Interrupt */
elevatorguy 0:f86e6135dcbc 65 PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */
elevatorguy 0:f86e6135dcbc 66 RTC_IRQn = 17, /*!< Real Time Clock Interrupt */
elevatorguy 0:f86e6135dcbc 67 EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */
elevatorguy 0:f86e6135dcbc 68 EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */
elevatorguy 0:f86e6135dcbc 69 EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */
elevatorguy 0:f86e6135dcbc 70 EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */
elevatorguy 0:f86e6135dcbc 71 ADC_IRQn = 22, /*!< A/D Converter Interrupt */
elevatorguy 0:f86e6135dcbc 72 BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */
elevatorguy 0:f86e6135dcbc 73 USB_IRQn = 24, /*!< USB Interrupt */
elevatorguy 0:f86e6135dcbc 74 CAN_IRQn = 25, /*!< CAN Interrupt */
elevatorguy 0:f86e6135dcbc 75 DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */
elevatorguy 0:f86e6135dcbc 76 I2S_IRQn = 27, /*!< I2S Interrupt */
elevatorguy 0:f86e6135dcbc 77 ENET_IRQn = 28, /*!< Ethernet Interrupt */
elevatorguy 0:f86e6135dcbc 78 RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */
elevatorguy 0:f86e6135dcbc 79 MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */
elevatorguy 0:f86e6135dcbc 80 QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */
elevatorguy 0:f86e6135dcbc 81 PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */
elevatorguy 0:f86e6135dcbc 82 USBActivity_IRQn = 33, /* USB Activity interrupt */
elevatorguy 0:f86e6135dcbc 83 CANActivity_IRQn = 34, /* CAN Activity interrupt */
elevatorguy 0:f86e6135dcbc 84 } IRQn_Type;
elevatorguy 0:f86e6135dcbc 85
elevatorguy 0:f86e6135dcbc 86
elevatorguy 0:f86e6135dcbc 87 /*
elevatorguy 0:f86e6135dcbc 88 * ==========================================================================
elevatorguy 0:f86e6135dcbc 89 * ----------- Processor and Core Peripheral Section ------------------------
elevatorguy 0:f86e6135dcbc 90 * ==========================================================================
elevatorguy 0:f86e6135dcbc 91 */
elevatorguy 0:f86e6135dcbc 92
elevatorguy 0:f86e6135dcbc 93 /* Configuration of the Cortex-M3 Processor and Core Peripherals */
elevatorguy 0:f86e6135dcbc 94 #define __MPU_PRESENT 1 /*!< MPU present or not */
elevatorguy 0:f86e6135dcbc 95 #define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */
elevatorguy 0:f86e6135dcbc 96 #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
elevatorguy 0:f86e6135dcbc 97
elevatorguy 0:f86e6135dcbc 98
elevatorguy 0:f86e6135dcbc 99 #include "core_cm3.h" /* Cortex-M3 processor and core peripherals */
elevatorguy 0:f86e6135dcbc 100 #include "system_LPC17xx.h" /* System Header */
elevatorguy 0:f86e6135dcbc 101
elevatorguy 0:f86e6135dcbc 102
elevatorguy 0:f86e6135dcbc 103 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 104 /* Device Specific Peripheral registers structures */
elevatorguy 0:f86e6135dcbc 105 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 106
elevatorguy 0:f86e6135dcbc 107 #if defined ( __CC_ARM )
elevatorguy 0:f86e6135dcbc 108 #pragma anon_unions
elevatorguy 0:f86e6135dcbc 109 #endif
elevatorguy 0:f86e6135dcbc 110
elevatorguy 0:f86e6135dcbc 111 /*------------- System Control (SC) ------------------------------------------*/
elevatorguy 0:f86e6135dcbc 112 typedef struct
elevatorguy 0:f86e6135dcbc 113 {
elevatorguy 0:f86e6135dcbc 114 __IO uint32_t FLASHCFG; /* Flash Accelerator Module */
elevatorguy 0:f86e6135dcbc 115 uint32_t RESERVED0[31];
elevatorguy 0:f86e6135dcbc 116 __IO uint32_t PLL0CON; /* Clocking and Power Control */
elevatorguy 0:f86e6135dcbc 117 __IO uint32_t PLL0CFG;
elevatorguy 0:f86e6135dcbc 118 __I uint32_t PLL0STAT;
elevatorguy 0:f86e6135dcbc 119 __O uint32_t PLL0FEED;
elevatorguy 0:f86e6135dcbc 120 uint32_t RESERVED1[4];
elevatorguy 0:f86e6135dcbc 121 __IO uint32_t PLL1CON;
elevatorguy 0:f86e6135dcbc 122 __IO uint32_t PLL1CFG;
elevatorguy 0:f86e6135dcbc 123 __I uint32_t PLL1STAT;
elevatorguy 0:f86e6135dcbc 124 __O uint32_t PLL1FEED;
elevatorguy 0:f86e6135dcbc 125 uint32_t RESERVED2[4];
elevatorguy 0:f86e6135dcbc 126 __IO uint32_t PCON;
elevatorguy 0:f86e6135dcbc 127 __IO uint32_t PCONP;
elevatorguy 0:f86e6135dcbc 128 uint32_t RESERVED3[15];
elevatorguy 0:f86e6135dcbc 129 __IO uint32_t CCLKCFG;
elevatorguy 0:f86e6135dcbc 130 __IO uint32_t USBCLKCFG;
elevatorguy 0:f86e6135dcbc 131 __IO uint32_t CLKSRCSEL;
elevatorguy 0:f86e6135dcbc 132 __IO uint32_t CANSLEEPCLR;
elevatorguy 0:f86e6135dcbc 133 __IO uint32_t CANWAKEFLAGS;
elevatorguy 0:f86e6135dcbc 134 uint32_t RESERVED4[10];
elevatorguy 0:f86e6135dcbc 135 __IO uint32_t EXTINT; /* External Interrupts */
elevatorguy 0:f86e6135dcbc 136 uint32_t RESERVED5;
elevatorguy 0:f86e6135dcbc 137 __IO uint32_t EXTMODE;
elevatorguy 0:f86e6135dcbc 138 __IO uint32_t EXTPOLAR;
elevatorguy 0:f86e6135dcbc 139 uint32_t RESERVED6[12];
elevatorguy 0:f86e6135dcbc 140 __IO uint32_t RSID; /* Reset */
elevatorguy 0:f86e6135dcbc 141 uint32_t RESERVED7[7];
elevatorguy 0:f86e6135dcbc 142 __IO uint32_t SCS; /* Syscon Miscellaneous Registers */
elevatorguy 0:f86e6135dcbc 143 __IO uint32_t IRCTRIM; /* Clock Dividers */
elevatorguy 0:f86e6135dcbc 144 __IO uint32_t PCLKSEL0;
elevatorguy 0:f86e6135dcbc 145 __IO uint32_t PCLKSEL1;
elevatorguy 0:f86e6135dcbc 146 uint32_t RESERVED8[4];
elevatorguy 0:f86e6135dcbc 147 __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */
elevatorguy 0:f86e6135dcbc 148 __IO uint32_t DMAREQSEL;
elevatorguy 0:f86e6135dcbc 149 __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */
elevatorguy 0:f86e6135dcbc 150 } LPC_SC_TypeDef;
elevatorguy 0:f86e6135dcbc 151
elevatorguy 0:f86e6135dcbc 152 /*------------- Pin Connect Block (PINCON) -----------------------------------*/
elevatorguy 0:f86e6135dcbc 153 typedef struct
elevatorguy 0:f86e6135dcbc 154 {
elevatorguy 0:f86e6135dcbc 155 __IO uint32_t PINSEL0;
elevatorguy 0:f86e6135dcbc 156 __IO uint32_t PINSEL1;
elevatorguy 0:f86e6135dcbc 157 __IO uint32_t PINSEL2;
elevatorguy 0:f86e6135dcbc 158 __IO uint32_t PINSEL3;
elevatorguy 0:f86e6135dcbc 159 __IO uint32_t PINSEL4;
elevatorguy 0:f86e6135dcbc 160 __IO uint32_t PINSEL5;
elevatorguy 0:f86e6135dcbc 161 __IO uint32_t PINSEL6;
elevatorguy 0:f86e6135dcbc 162 __IO uint32_t PINSEL7;
elevatorguy 0:f86e6135dcbc 163 __IO uint32_t PINSEL8;
elevatorguy 0:f86e6135dcbc 164 __IO uint32_t PINSEL9;
elevatorguy 0:f86e6135dcbc 165 __IO uint32_t PINSEL10;
elevatorguy 0:f86e6135dcbc 166 uint32_t RESERVED0[5];
elevatorguy 0:f86e6135dcbc 167 __IO uint32_t PINMODE0;
elevatorguy 0:f86e6135dcbc 168 __IO uint32_t PINMODE1;
elevatorguy 0:f86e6135dcbc 169 __IO uint32_t PINMODE2;
elevatorguy 0:f86e6135dcbc 170 __IO uint32_t PINMODE3;
elevatorguy 0:f86e6135dcbc 171 __IO uint32_t PINMODE4;
elevatorguy 0:f86e6135dcbc 172 __IO uint32_t PINMODE5;
elevatorguy 0:f86e6135dcbc 173 __IO uint32_t PINMODE6;
elevatorguy 0:f86e6135dcbc 174 __IO uint32_t PINMODE7;
elevatorguy 0:f86e6135dcbc 175 __IO uint32_t PINMODE8;
elevatorguy 0:f86e6135dcbc 176 __IO uint32_t PINMODE9;
elevatorguy 0:f86e6135dcbc 177 __IO uint32_t PINMODE_OD0;
elevatorguy 0:f86e6135dcbc 178 __IO uint32_t PINMODE_OD1;
elevatorguy 0:f86e6135dcbc 179 __IO uint32_t PINMODE_OD2;
elevatorguy 0:f86e6135dcbc 180 __IO uint32_t PINMODE_OD3;
elevatorguy 0:f86e6135dcbc 181 __IO uint32_t PINMODE_OD4;
elevatorguy 0:f86e6135dcbc 182 __IO uint32_t I2CPADCFG;
elevatorguy 0:f86e6135dcbc 183 } LPC_PINCON_TypeDef;
elevatorguy 0:f86e6135dcbc 184
elevatorguy 0:f86e6135dcbc 185 /*------------- General Purpose Input/Output (GPIO) --------------------------*/
elevatorguy 0:f86e6135dcbc 186 typedef struct
elevatorguy 0:f86e6135dcbc 187 {
elevatorguy 0:f86e6135dcbc 188 union {
elevatorguy 0:f86e6135dcbc 189 __IO uint32_t FIODIR;
elevatorguy 0:f86e6135dcbc 190 struct {
elevatorguy 0:f86e6135dcbc 191 __IO uint16_t FIODIRL;
elevatorguy 0:f86e6135dcbc 192 __IO uint16_t FIODIRH;
elevatorguy 0:f86e6135dcbc 193 };
elevatorguy 0:f86e6135dcbc 194 struct {
elevatorguy 0:f86e6135dcbc 195 __IO uint8_t FIODIR0;
elevatorguy 0:f86e6135dcbc 196 __IO uint8_t FIODIR1;
elevatorguy 0:f86e6135dcbc 197 __IO uint8_t FIODIR2;
elevatorguy 0:f86e6135dcbc 198 __IO uint8_t FIODIR3;
elevatorguy 0:f86e6135dcbc 199 };
elevatorguy 0:f86e6135dcbc 200 };
elevatorguy 0:f86e6135dcbc 201 uint32_t RESERVED0[3];
elevatorguy 0:f86e6135dcbc 202 union {
elevatorguy 0:f86e6135dcbc 203 __IO uint32_t FIOMASK;
elevatorguy 0:f86e6135dcbc 204 struct {
elevatorguy 0:f86e6135dcbc 205 __IO uint16_t FIOMASKL;
elevatorguy 0:f86e6135dcbc 206 __IO uint16_t FIOMASKH;
elevatorguy 0:f86e6135dcbc 207 };
elevatorguy 0:f86e6135dcbc 208 struct {
elevatorguy 0:f86e6135dcbc 209 __IO uint8_t FIOMASK0;
elevatorguy 0:f86e6135dcbc 210 __IO uint8_t FIOMASK1;
elevatorguy 0:f86e6135dcbc 211 __IO uint8_t FIOMASK2;
elevatorguy 0:f86e6135dcbc 212 __IO uint8_t FIOMASK3;
elevatorguy 0:f86e6135dcbc 213 };
elevatorguy 0:f86e6135dcbc 214 };
elevatorguy 0:f86e6135dcbc 215 union {
elevatorguy 0:f86e6135dcbc 216 __IO uint32_t FIOPIN;
elevatorguy 0:f86e6135dcbc 217 struct {
elevatorguy 0:f86e6135dcbc 218 __IO uint16_t FIOPINL;
elevatorguy 0:f86e6135dcbc 219 __IO uint16_t FIOPINH;
elevatorguy 0:f86e6135dcbc 220 };
elevatorguy 0:f86e6135dcbc 221 struct {
elevatorguy 0:f86e6135dcbc 222 __IO uint8_t FIOPIN0;
elevatorguy 0:f86e6135dcbc 223 __IO uint8_t FIOPIN1;
elevatorguy 0:f86e6135dcbc 224 __IO uint8_t FIOPIN2;
elevatorguy 0:f86e6135dcbc 225 __IO uint8_t FIOPIN3;
elevatorguy 0:f86e6135dcbc 226 };
elevatorguy 0:f86e6135dcbc 227 };
elevatorguy 0:f86e6135dcbc 228 union {
elevatorguy 0:f86e6135dcbc 229 __IO uint32_t FIOSET;
elevatorguy 0:f86e6135dcbc 230 struct {
elevatorguy 0:f86e6135dcbc 231 __IO uint16_t FIOSETL;
elevatorguy 0:f86e6135dcbc 232 __IO uint16_t FIOSETH;
elevatorguy 0:f86e6135dcbc 233 };
elevatorguy 0:f86e6135dcbc 234 struct {
elevatorguy 0:f86e6135dcbc 235 __IO uint8_t FIOSET0;
elevatorguy 0:f86e6135dcbc 236 __IO uint8_t FIOSET1;
elevatorguy 0:f86e6135dcbc 237 __IO uint8_t FIOSET2;
elevatorguy 0:f86e6135dcbc 238 __IO uint8_t FIOSET3;
elevatorguy 0:f86e6135dcbc 239 };
elevatorguy 0:f86e6135dcbc 240 };
elevatorguy 0:f86e6135dcbc 241 union {
elevatorguy 0:f86e6135dcbc 242 __O uint32_t FIOCLR;
elevatorguy 0:f86e6135dcbc 243 struct {
elevatorguy 0:f86e6135dcbc 244 __O uint16_t FIOCLRL;
elevatorguy 0:f86e6135dcbc 245 __O uint16_t FIOCLRH;
elevatorguy 0:f86e6135dcbc 246 };
elevatorguy 0:f86e6135dcbc 247 struct {
elevatorguy 0:f86e6135dcbc 248 __O uint8_t FIOCLR0;
elevatorguy 0:f86e6135dcbc 249 __O uint8_t FIOCLR1;
elevatorguy 0:f86e6135dcbc 250 __O uint8_t FIOCLR2;
elevatorguy 0:f86e6135dcbc 251 __O uint8_t FIOCLR3;
elevatorguy 0:f86e6135dcbc 252 };
elevatorguy 0:f86e6135dcbc 253 };
elevatorguy 0:f86e6135dcbc 254 } LPC_GPIO_TypeDef;
elevatorguy 0:f86e6135dcbc 255
elevatorguy 0:f86e6135dcbc 256 typedef struct
elevatorguy 0:f86e6135dcbc 257 {
elevatorguy 0:f86e6135dcbc 258 __I uint32_t IntStatus;
elevatorguy 0:f86e6135dcbc 259 __I uint32_t IO0IntStatR;
elevatorguy 0:f86e6135dcbc 260 __I uint32_t IO0IntStatF;
elevatorguy 0:f86e6135dcbc 261 __O uint32_t IO0IntClr;
elevatorguy 0:f86e6135dcbc 262 __IO uint32_t IO0IntEnR;
elevatorguy 0:f86e6135dcbc 263 __IO uint32_t IO0IntEnF;
elevatorguy 0:f86e6135dcbc 264 uint32_t RESERVED0[3];
elevatorguy 0:f86e6135dcbc 265 __I uint32_t IO2IntStatR;
elevatorguy 0:f86e6135dcbc 266 __I uint32_t IO2IntStatF;
elevatorguy 0:f86e6135dcbc 267 __O uint32_t IO2IntClr;
elevatorguy 0:f86e6135dcbc 268 __IO uint32_t IO2IntEnR;
elevatorguy 0:f86e6135dcbc 269 __IO uint32_t IO2IntEnF;
elevatorguy 0:f86e6135dcbc 270 } LPC_GPIOINT_TypeDef;
elevatorguy 0:f86e6135dcbc 271
elevatorguy 0:f86e6135dcbc 272 /*------------- Timer (TIM) --------------------------------------------------*/
elevatorguy 0:f86e6135dcbc 273 typedef struct
elevatorguy 0:f86e6135dcbc 274 {
elevatorguy 0:f86e6135dcbc 275 __IO uint32_t IR;
elevatorguy 0:f86e6135dcbc 276 __IO uint32_t TCR;
elevatorguy 0:f86e6135dcbc 277 __IO uint32_t TC;
elevatorguy 0:f86e6135dcbc 278 __IO uint32_t PR;
elevatorguy 0:f86e6135dcbc 279 __IO uint32_t PC;
elevatorguy 0:f86e6135dcbc 280 __IO uint32_t MCR;
elevatorguy 0:f86e6135dcbc 281 __IO uint32_t MR0;
elevatorguy 0:f86e6135dcbc 282 __IO uint32_t MR1;
elevatorguy 0:f86e6135dcbc 283 __IO uint32_t MR2;
elevatorguy 0:f86e6135dcbc 284 __IO uint32_t MR3;
elevatorguy 0:f86e6135dcbc 285 __IO uint32_t CCR;
elevatorguy 0:f86e6135dcbc 286 __I uint32_t CR0;
elevatorguy 0:f86e6135dcbc 287 __I uint32_t CR1;
elevatorguy 0:f86e6135dcbc 288 uint32_t RESERVED0[2];
elevatorguy 0:f86e6135dcbc 289 __IO uint32_t EMR;
elevatorguy 0:f86e6135dcbc 290 uint32_t RESERVED1[12];
elevatorguy 0:f86e6135dcbc 291 __IO uint32_t CTCR;
elevatorguy 0:f86e6135dcbc 292 } LPC_TIM_TypeDef;
elevatorguy 0:f86e6135dcbc 293
elevatorguy 0:f86e6135dcbc 294 /*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
elevatorguy 0:f86e6135dcbc 295 typedef struct
elevatorguy 0:f86e6135dcbc 296 {
elevatorguy 0:f86e6135dcbc 297 __IO uint32_t IR;
elevatorguy 0:f86e6135dcbc 298 __IO uint32_t TCR;
elevatorguy 0:f86e6135dcbc 299 __IO uint32_t TC;
elevatorguy 0:f86e6135dcbc 300 __IO uint32_t PR;
elevatorguy 0:f86e6135dcbc 301 __IO uint32_t PC;
elevatorguy 0:f86e6135dcbc 302 __IO uint32_t MCR;
elevatorguy 0:f86e6135dcbc 303 __IO uint32_t MR0;
elevatorguy 0:f86e6135dcbc 304 __IO uint32_t MR1;
elevatorguy 0:f86e6135dcbc 305 __IO uint32_t MR2;
elevatorguy 0:f86e6135dcbc 306 __IO uint32_t MR3;
elevatorguy 0:f86e6135dcbc 307 __IO uint32_t CCR;
elevatorguy 0:f86e6135dcbc 308 __I uint32_t CR0;
elevatorguy 0:f86e6135dcbc 309 __I uint32_t CR1;
elevatorguy 0:f86e6135dcbc 310 __I uint32_t CR2;
elevatorguy 0:f86e6135dcbc 311 __I uint32_t CR3;
elevatorguy 0:f86e6135dcbc 312 uint32_t RESERVED0;
elevatorguy 0:f86e6135dcbc 313 __IO uint32_t MR4;
elevatorguy 0:f86e6135dcbc 314 __IO uint32_t MR5;
elevatorguy 0:f86e6135dcbc 315 __IO uint32_t MR6;
elevatorguy 0:f86e6135dcbc 316 __IO uint32_t PCR;
elevatorguy 0:f86e6135dcbc 317 __IO uint32_t LER;
elevatorguy 0:f86e6135dcbc 318 uint32_t RESERVED1[7];
elevatorguy 0:f86e6135dcbc 319 __IO uint32_t CTCR;
elevatorguy 0:f86e6135dcbc 320 } LPC_PWM_TypeDef;
elevatorguy 0:f86e6135dcbc 321
elevatorguy 0:f86e6135dcbc 322 /*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
elevatorguy 0:f86e6135dcbc 323 typedef struct
elevatorguy 0:f86e6135dcbc 324 {
elevatorguy 0:f86e6135dcbc 325 union {
elevatorguy 0:f86e6135dcbc 326 __I uint8_t RBR;
elevatorguy 0:f86e6135dcbc 327 __O uint8_t THR;
elevatorguy 0:f86e6135dcbc 328 __IO uint8_t DLL;
elevatorguy 0:f86e6135dcbc 329 uint32_t RESERVED0;
elevatorguy 0:f86e6135dcbc 330 };
elevatorguy 0:f86e6135dcbc 331 union {
elevatorguy 0:f86e6135dcbc 332 __IO uint8_t DLM;
elevatorguy 0:f86e6135dcbc 333 __IO uint32_t IER;
elevatorguy 0:f86e6135dcbc 334 };
elevatorguy 0:f86e6135dcbc 335 union {
elevatorguy 0:f86e6135dcbc 336 __I uint32_t IIR;
elevatorguy 0:f86e6135dcbc 337 __O uint8_t FCR;
elevatorguy 0:f86e6135dcbc 338 };
elevatorguy 0:f86e6135dcbc 339 __IO uint8_t LCR;
elevatorguy 0:f86e6135dcbc 340 uint8_t RESERVED1[7];
elevatorguy 0:f86e6135dcbc 341 __I uint8_t LSR;
elevatorguy 0:f86e6135dcbc 342 uint8_t RESERVED2[7];
elevatorguy 0:f86e6135dcbc 343 __IO uint8_t SCR;
elevatorguy 0:f86e6135dcbc 344 uint8_t RESERVED3[3];
elevatorguy 0:f86e6135dcbc 345 __IO uint32_t ACR;
elevatorguy 0:f86e6135dcbc 346 __IO uint8_t ICR;
elevatorguy 0:f86e6135dcbc 347 uint8_t RESERVED4[3];
elevatorguy 0:f86e6135dcbc 348 __IO uint8_t FDR;
elevatorguy 0:f86e6135dcbc 349 uint8_t RESERVED5[7];
elevatorguy 0:f86e6135dcbc 350 __IO uint8_t TER;
elevatorguy 0:f86e6135dcbc 351 uint8_t RESERVED6[39];
elevatorguy 0:f86e6135dcbc 352 __IO uint32_t FIFOLVL;
elevatorguy 0:f86e6135dcbc 353 } LPC_UART_TypeDef;
elevatorguy 0:f86e6135dcbc 354
elevatorguy 0:f86e6135dcbc 355 typedef struct
elevatorguy 0:f86e6135dcbc 356 {
elevatorguy 0:f86e6135dcbc 357 union {
elevatorguy 0:f86e6135dcbc 358 __I uint8_t RBR;
elevatorguy 0:f86e6135dcbc 359 __O uint8_t THR;
elevatorguy 0:f86e6135dcbc 360 __IO uint8_t DLL;
elevatorguy 0:f86e6135dcbc 361 uint32_t RESERVED0;
elevatorguy 0:f86e6135dcbc 362 };
elevatorguy 0:f86e6135dcbc 363 union {
elevatorguy 0:f86e6135dcbc 364 __IO uint8_t DLM;
elevatorguy 0:f86e6135dcbc 365 __IO uint32_t IER;
elevatorguy 0:f86e6135dcbc 366 };
elevatorguy 0:f86e6135dcbc 367 union {
elevatorguy 0:f86e6135dcbc 368 __I uint32_t IIR;
elevatorguy 0:f86e6135dcbc 369 __O uint8_t FCR;
elevatorguy 0:f86e6135dcbc 370 };
elevatorguy 0:f86e6135dcbc 371 __IO uint8_t LCR;
elevatorguy 0:f86e6135dcbc 372 uint8_t RESERVED1[7];
elevatorguy 0:f86e6135dcbc 373 __I uint8_t LSR;
elevatorguy 0:f86e6135dcbc 374 uint8_t RESERVED2[7];
elevatorguy 0:f86e6135dcbc 375 __IO uint8_t SCR;
elevatorguy 0:f86e6135dcbc 376 uint8_t RESERVED3[3];
elevatorguy 0:f86e6135dcbc 377 __IO uint32_t ACR;
elevatorguy 0:f86e6135dcbc 378 __IO uint8_t ICR;
elevatorguy 0:f86e6135dcbc 379 uint8_t RESERVED4[3];
elevatorguy 0:f86e6135dcbc 380 __IO uint8_t FDR;
elevatorguy 0:f86e6135dcbc 381 uint8_t RESERVED5[7];
elevatorguy 0:f86e6135dcbc 382 __IO uint8_t TER;
elevatorguy 0:f86e6135dcbc 383 uint8_t RESERVED6[39];
elevatorguy 0:f86e6135dcbc 384 __IO uint32_t FIFOLVL;
elevatorguy 0:f86e6135dcbc 385 } LPC_UART0_TypeDef;
elevatorguy 0:f86e6135dcbc 386
elevatorguy 0:f86e6135dcbc 387 typedef struct
elevatorguy 0:f86e6135dcbc 388 {
elevatorguy 0:f86e6135dcbc 389 union {
elevatorguy 0:f86e6135dcbc 390 __I uint8_t RBR;
elevatorguy 0:f86e6135dcbc 391 __O uint8_t THR;
elevatorguy 0:f86e6135dcbc 392 __IO uint8_t DLL;
elevatorguy 0:f86e6135dcbc 393 uint32_t RESERVED0;
elevatorguy 0:f86e6135dcbc 394 };
elevatorguy 0:f86e6135dcbc 395 union {
elevatorguy 0:f86e6135dcbc 396 __IO uint8_t DLM;
elevatorguy 0:f86e6135dcbc 397 __IO uint32_t IER;
elevatorguy 0:f86e6135dcbc 398 };
elevatorguy 0:f86e6135dcbc 399 union {
elevatorguy 0:f86e6135dcbc 400 __I uint32_t IIR;
elevatorguy 0:f86e6135dcbc 401 __O uint8_t FCR;
elevatorguy 0:f86e6135dcbc 402 };
elevatorguy 0:f86e6135dcbc 403 __IO uint8_t LCR;
elevatorguy 0:f86e6135dcbc 404 uint8_t RESERVED1[3];
elevatorguy 0:f86e6135dcbc 405 __IO uint8_t MCR;
elevatorguy 0:f86e6135dcbc 406 uint8_t RESERVED2[3];
elevatorguy 0:f86e6135dcbc 407 __I uint8_t LSR;
elevatorguy 0:f86e6135dcbc 408 uint8_t RESERVED3[3];
elevatorguy 0:f86e6135dcbc 409 __I uint8_t MSR;
elevatorguy 0:f86e6135dcbc 410 uint8_t RESERVED4[3];
elevatorguy 0:f86e6135dcbc 411 __IO uint8_t SCR;
elevatorguy 0:f86e6135dcbc 412 uint8_t RESERVED5[3];
elevatorguy 0:f86e6135dcbc 413 __IO uint32_t ACR;
elevatorguy 0:f86e6135dcbc 414 uint32_t RESERVED6;
elevatorguy 0:f86e6135dcbc 415 __IO uint32_t FDR;
elevatorguy 0:f86e6135dcbc 416 uint32_t RESERVED7;
elevatorguy 0:f86e6135dcbc 417 __IO uint8_t TER;
elevatorguy 0:f86e6135dcbc 418 uint8_t RESERVED8[27];
elevatorguy 0:f86e6135dcbc 419 __IO uint8_t RS485CTRL;
elevatorguy 0:f86e6135dcbc 420 uint8_t RESERVED9[3];
elevatorguy 0:f86e6135dcbc 421 __IO uint8_t ADRMATCH;
elevatorguy 0:f86e6135dcbc 422 uint8_t RESERVED10[3];
elevatorguy 0:f86e6135dcbc 423 __IO uint8_t RS485DLY;
elevatorguy 0:f86e6135dcbc 424 uint8_t RESERVED11[3];
elevatorguy 0:f86e6135dcbc 425 __IO uint32_t FIFOLVL;
elevatorguy 0:f86e6135dcbc 426 } LPC_UART1_TypeDef;
elevatorguy 0:f86e6135dcbc 427
elevatorguy 0:f86e6135dcbc 428 /*------------- Serial Peripheral Interface (SPI) ----------------------------*/
elevatorguy 0:f86e6135dcbc 429 typedef struct
elevatorguy 0:f86e6135dcbc 430 {
elevatorguy 0:f86e6135dcbc 431 __IO uint32_t SPCR;
elevatorguy 0:f86e6135dcbc 432 __I uint32_t SPSR;
elevatorguy 0:f86e6135dcbc 433 __IO uint32_t SPDR;
elevatorguy 0:f86e6135dcbc 434 __IO uint32_t SPCCR;
elevatorguy 0:f86e6135dcbc 435 uint32_t RESERVED0[3];
elevatorguy 0:f86e6135dcbc 436 __IO uint32_t SPINT;
elevatorguy 0:f86e6135dcbc 437 } LPC_SPI_TypeDef;
elevatorguy 0:f86e6135dcbc 438
elevatorguy 0:f86e6135dcbc 439 /*------------- Synchronous Serial Communication (SSP) -----------------------*/
elevatorguy 0:f86e6135dcbc 440 typedef struct
elevatorguy 0:f86e6135dcbc 441 {
elevatorguy 0:f86e6135dcbc 442 __IO uint32_t CR0;
elevatorguy 0:f86e6135dcbc 443 __IO uint32_t CR1;
elevatorguy 0:f86e6135dcbc 444 __IO uint32_t DR;
elevatorguy 0:f86e6135dcbc 445 __I uint32_t SR;
elevatorguy 0:f86e6135dcbc 446 __IO uint32_t CPSR;
elevatorguy 0:f86e6135dcbc 447 __IO uint32_t IMSC;
elevatorguy 0:f86e6135dcbc 448 __IO uint32_t RIS;
elevatorguy 0:f86e6135dcbc 449 __IO uint32_t MIS;
elevatorguy 0:f86e6135dcbc 450 __IO uint32_t ICR;
elevatorguy 0:f86e6135dcbc 451 __IO uint32_t DMACR;
elevatorguy 0:f86e6135dcbc 452 } LPC_SSP_TypeDef;
elevatorguy 0:f86e6135dcbc 453
elevatorguy 0:f86e6135dcbc 454 /*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
elevatorguy 0:f86e6135dcbc 455 typedef struct
elevatorguy 0:f86e6135dcbc 456 {
elevatorguy 0:f86e6135dcbc 457 __IO uint32_t I2CONSET;
elevatorguy 0:f86e6135dcbc 458 __I uint32_t I2STAT;
elevatorguy 0:f86e6135dcbc 459 __IO uint32_t I2DAT;
elevatorguy 0:f86e6135dcbc 460 __IO uint32_t I2ADR0;
elevatorguy 0:f86e6135dcbc 461 __IO uint32_t I2SCLH;
elevatorguy 0:f86e6135dcbc 462 __IO uint32_t I2SCLL;
elevatorguy 0:f86e6135dcbc 463 __O uint32_t I2CONCLR;
elevatorguy 0:f86e6135dcbc 464 __IO uint32_t MMCTRL;
elevatorguy 0:f86e6135dcbc 465 __IO uint32_t I2ADR1;
elevatorguy 0:f86e6135dcbc 466 __IO uint32_t I2ADR2;
elevatorguy 0:f86e6135dcbc 467 __IO uint32_t I2ADR3;
elevatorguy 0:f86e6135dcbc 468 __I uint32_t I2DATA_BUFFER;
elevatorguy 0:f86e6135dcbc 469 __IO uint32_t I2MASK0;
elevatorguy 0:f86e6135dcbc 470 __IO uint32_t I2MASK1;
elevatorguy 0:f86e6135dcbc 471 __IO uint32_t I2MASK2;
elevatorguy 0:f86e6135dcbc 472 __IO uint32_t I2MASK3;
elevatorguy 0:f86e6135dcbc 473 } LPC_I2C_TypeDef;
elevatorguy 0:f86e6135dcbc 474
elevatorguy 0:f86e6135dcbc 475 /*------------- Inter IC Sound (I2S) -----------------------------------------*/
elevatorguy 0:f86e6135dcbc 476 typedef struct
elevatorguy 0:f86e6135dcbc 477 {
elevatorguy 0:f86e6135dcbc 478 __IO uint32_t I2SDAO;
elevatorguy 0:f86e6135dcbc 479 __IO uint32_t I2SDAI;
elevatorguy 0:f86e6135dcbc 480 __O uint32_t I2STXFIFO;
elevatorguy 0:f86e6135dcbc 481 __I uint32_t I2SRXFIFO;
elevatorguy 0:f86e6135dcbc 482 __I uint32_t I2SSTATE;
elevatorguy 0:f86e6135dcbc 483 __IO uint32_t I2SDMA1;
elevatorguy 0:f86e6135dcbc 484 __IO uint32_t I2SDMA2;
elevatorguy 0:f86e6135dcbc 485 __IO uint32_t I2SIRQ;
elevatorguy 0:f86e6135dcbc 486 __IO uint32_t I2STXRATE;
elevatorguy 0:f86e6135dcbc 487 __IO uint32_t I2SRXRATE;
elevatorguy 0:f86e6135dcbc 488 __IO uint32_t I2STXBITRATE;
elevatorguy 0:f86e6135dcbc 489 __IO uint32_t I2SRXBITRATE;
elevatorguy 0:f86e6135dcbc 490 __IO uint32_t I2STXMODE;
elevatorguy 0:f86e6135dcbc 491 __IO uint32_t I2SRXMODE;
elevatorguy 0:f86e6135dcbc 492 } LPC_I2S_TypeDef;
elevatorguy 0:f86e6135dcbc 493
elevatorguy 0:f86e6135dcbc 494 /*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/
elevatorguy 0:f86e6135dcbc 495 typedef struct
elevatorguy 0:f86e6135dcbc 496 {
elevatorguy 0:f86e6135dcbc 497 __IO uint32_t RICOMPVAL;
elevatorguy 0:f86e6135dcbc 498 __IO uint32_t RIMASK;
elevatorguy 0:f86e6135dcbc 499 __IO uint8_t RICTRL;
elevatorguy 0:f86e6135dcbc 500 uint8_t RESERVED0[3];
elevatorguy 0:f86e6135dcbc 501 __IO uint32_t RICOUNTER;
elevatorguy 0:f86e6135dcbc 502 } LPC_RIT_TypeDef;
elevatorguy 0:f86e6135dcbc 503
elevatorguy 0:f86e6135dcbc 504 /*------------- Real-Time Clock (RTC) ----------------------------------------*/
elevatorguy 0:f86e6135dcbc 505 typedef struct
elevatorguy 0:f86e6135dcbc 506 {
elevatorguy 0:f86e6135dcbc 507 __IO uint8_t ILR;
elevatorguy 0:f86e6135dcbc 508 uint8_t RESERVED0[7];
elevatorguy 0:f86e6135dcbc 509 __IO uint8_t CCR;
elevatorguy 0:f86e6135dcbc 510 uint8_t RESERVED1[3];
elevatorguy 0:f86e6135dcbc 511 __IO uint8_t CIIR;
elevatorguy 0:f86e6135dcbc 512 uint8_t RESERVED2[3];
elevatorguy 0:f86e6135dcbc 513 __IO uint8_t AMR;
elevatorguy 0:f86e6135dcbc 514 uint8_t RESERVED3[3];
elevatorguy 0:f86e6135dcbc 515 __I uint32_t CTIME0;
elevatorguy 0:f86e6135dcbc 516 __I uint32_t CTIME1;
elevatorguy 0:f86e6135dcbc 517 __I uint32_t CTIME2;
elevatorguy 0:f86e6135dcbc 518 __IO uint8_t SEC;
elevatorguy 0:f86e6135dcbc 519 uint8_t RESERVED4[3];
elevatorguy 0:f86e6135dcbc 520 __IO uint8_t MIN;
elevatorguy 0:f86e6135dcbc 521 uint8_t RESERVED5[3];
elevatorguy 0:f86e6135dcbc 522 __IO uint8_t HOUR;
elevatorguy 0:f86e6135dcbc 523 uint8_t RESERVED6[3];
elevatorguy 0:f86e6135dcbc 524 __IO uint8_t DOM;
elevatorguy 0:f86e6135dcbc 525 uint8_t RESERVED7[3];
elevatorguy 0:f86e6135dcbc 526 __IO uint8_t DOW;
elevatorguy 0:f86e6135dcbc 527 uint8_t RESERVED8[3];
elevatorguy 0:f86e6135dcbc 528 __IO uint16_t DOY;
elevatorguy 0:f86e6135dcbc 529 uint16_t RESERVED9;
elevatorguy 0:f86e6135dcbc 530 __IO uint8_t MONTH;
elevatorguy 0:f86e6135dcbc 531 uint8_t RESERVED10[3];
elevatorguy 0:f86e6135dcbc 532 __IO uint16_t YEAR;
elevatorguy 0:f86e6135dcbc 533 uint16_t RESERVED11;
elevatorguy 0:f86e6135dcbc 534 __IO uint32_t CALIBRATION;
elevatorguy 0:f86e6135dcbc 535 __IO uint32_t GPREG0;
elevatorguy 0:f86e6135dcbc 536 __IO uint32_t GPREG1;
elevatorguy 0:f86e6135dcbc 537 __IO uint32_t GPREG2;
elevatorguy 0:f86e6135dcbc 538 __IO uint32_t GPREG3;
elevatorguy 0:f86e6135dcbc 539 __IO uint32_t GPREG4;
elevatorguy 0:f86e6135dcbc 540 __IO uint8_t RTC_AUXEN;
elevatorguy 0:f86e6135dcbc 541 uint8_t RESERVED12[3];
elevatorguy 0:f86e6135dcbc 542 __IO uint8_t RTC_AUX;
elevatorguy 0:f86e6135dcbc 543 uint8_t RESERVED13[3];
elevatorguy 0:f86e6135dcbc 544 __IO uint8_t ALSEC;
elevatorguy 0:f86e6135dcbc 545 uint8_t RESERVED14[3];
elevatorguy 0:f86e6135dcbc 546 __IO uint8_t ALMIN;
elevatorguy 0:f86e6135dcbc 547 uint8_t RESERVED15[3];
elevatorguy 0:f86e6135dcbc 548 __IO uint8_t ALHOUR;
elevatorguy 0:f86e6135dcbc 549 uint8_t RESERVED16[3];
elevatorguy 0:f86e6135dcbc 550 __IO uint8_t ALDOM;
elevatorguy 0:f86e6135dcbc 551 uint8_t RESERVED17[3];
elevatorguy 0:f86e6135dcbc 552 __IO uint8_t ALDOW;
elevatorguy 0:f86e6135dcbc 553 uint8_t RESERVED18[3];
elevatorguy 0:f86e6135dcbc 554 __IO uint16_t ALDOY;
elevatorguy 0:f86e6135dcbc 555 uint16_t RESERVED19;
elevatorguy 0:f86e6135dcbc 556 __IO uint8_t ALMON;
elevatorguy 0:f86e6135dcbc 557 uint8_t RESERVED20[3];
elevatorguy 0:f86e6135dcbc 558 __IO uint16_t ALYEAR;
elevatorguy 0:f86e6135dcbc 559 uint16_t RESERVED21;
elevatorguy 0:f86e6135dcbc 560 } LPC_RTC_TypeDef;
elevatorguy 0:f86e6135dcbc 561
elevatorguy 0:f86e6135dcbc 562 /*------------- Watchdog Timer (WDT) -----------------------------------------*/
elevatorguy 0:f86e6135dcbc 563 typedef struct
elevatorguy 0:f86e6135dcbc 564 {
elevatorguy 0:f86e6135dcbc 565 __IO uint8_t WDMOD;
elevatorguy 0:f86e6135dcbc 566 uint8_t RESERVED0[3];
elevatorguy 0:f86e6135dcbc 567 __IO uint32_t WDTC;
elevatorguy 0:f86e6135dcbc 568 __O uint8_t WDFEED;
elevatorguy 0:f86e6135dcbc 569 uint8_t RESERVED1[3];
elevatorguy 0:f86e6135dcbc 570 __I uint32_t WDTV;
elevatorguy 0:f86e6135dcbc 571 __IO uint32_t WDCLKSEL;
elevatorguy 0:f86e6135dcbc 572 } LPC_WDT_TypeDef;
elevatorguy 0:f86e6135dcbc 573
elevatorguy 0:f86e6135dcbc 574 /*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
elevatorguy 0:f86e6135dcbc 575 typedef struct
elevatorguy 0:f86e6135dcbc 576 {
elevatorguy 0:f86e6135dcbc 577 __IO uint32_t ADCR;
elevatorguy 0:f86e6135dcbc 578 __IO uint32_t ADGDR;
elevatorguy 0:f86e6135dcbc 579 uint32_t RESERVED0;
elevatorguy 0:f86e6135dcbc 580 __IO uint32_t ADINTEN;
elevatorguy 0:f86e6135dcbc 581 __I uint32_t ADDR0;
elevatorguy 0:f86e6135dcbc 582 __I uint32_t ADDR1;
elevatorguy 0:f86e6135dcbc 583 __I uint32_t ADDR2;
elevatorguy 0:f86e6135dcbc 584 __I uint32_t ADDR3;
elevatorguy 0:f86e6135dcbc 585 __I uint32_t ADDR4;
elevatorguy 0:f86e6135dcbc 586 __I uint32_t ADDR5;
elevatorguy 0:f86e6135dcbc 587 __I uint32_t ADDR6;
elevatorguy 0:f86e6135dcbc 588 __I uint32_t ADDR7;
elevatorguy 0:f86e6135dcbc 589 __I uint32_t ADSTAT;
elevatorguy 0:f86e6135dcbc 590 __IO uint32_t ADTRM;
elevatorguy 0:f86e6135dcbc 591 } LPC_ADC_TypeDef;
elevatorguy 0:f86e6135dcbc 592
elevatorguy 0:f86e6135dcbc 593 /*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
elevatorguy 0:f86e6135dcbc 594 typedef struct
elevatorguy 0:f86e6135dcbc 595 {
elevatorguy 0:f86e6135dcbc 596 __IO uint32_t DACR;
elevatorguy 0:f86e6135dcbc 597 __IO uint32_t DACCTRL;
elevatorguy 0:f86e6135dcbc 598 __IO uint16_t DACCNTVAL;
elevatorguy 0:f86e6135dcbc 599 } LPC_DAC_TypeDef;
elevatorguy 0:f86e6135dcbc 600
elevatorguy 0:f86e6135dcbc 601 /*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/
elevatorguy 0:f86e6135dcbc 602 typedef struct
elevatorguy 0:f86e6135dcbc 603 {
elevatorguy 0:f86e6135dcbc 604 __I uint32_t MCCON;
elevatorguy 0:f86e6135dcbc 605 __O uint32_t MCCON_SET;
elevatorguy 0:f86e6135dcbc 606 __O uint32_t MCCON_CLR;
elevatorguy 0:f86e6135dcbc 607 __I uint32_t MCCAPCON;
elevatorguy 0:f86e6135dcbc 608 __O uint32_t MCCAPCON_SET;
elevatorguy 0:f86e6135dcbc 609 __O uint32_t MCCAPCON_CLR;
elevatorguy 0:f86e6135dcbc 610 __IO uint32_t MCTIM0;
elevatorguy 0:f86e6135dcbc 611 __IO uint32_t MCTIM1;
elevatorguy 0:f86e6135dcbc 612 __IO uint32_t MCTIM2;
elevatorguy 0:f86e6135dcbc 613 __IO uint32_t MCPER0;
elevatorguy 0:f86e6135dcbc 614 __IO uint32_t MCPER1;
elevatorguy 0:f86e6135dcbc 615 __IO uint32_t MCPER2;
elevatorguy 0:f86e6135dcbc 616 __IO uint32_t MCPW0;
elevatorguy 0:f86e6135dcbc 617 __IO uint32_t MCPW1;
elevatorguy 0:f86e6135dcbc 618 __IO uint32_t MCPW2;
elevatorguy 0:f86e6135dcbc 619 __IO uint32_t MCDEADTIME;
elevatorguy 0:f86e6135dcbc 620 __IO uint32_t MCCCP;
elevatorguy 0:f86e6135dcbc 621 __IO uint32_t MCCR0;
elevatorguy 0:f86e6135dcbc 622 __IO uint32_t MCCR1;
elevatorguy 0:f86e6135dcbc 623 __IO uint32_t MCCR2;
elevatorguy 0:f86e6135dcbc 624 __I uint32_t MCINTEN;
elevatorguy 0:f86e6135dcbc 625 __O uint32_t MCINTEN_SET;
elevatorguy 0:f86e6135dcbc 626 __O uint32_t MCINTEN_CLR;
elevatorguy 0:f86e6135dcbc 627 __I uint32_t MCCNTCON;
elevatorguy 0:f86e6135dcbc 628 __O uint32_t MCCNTCON_SET;
elevatorguy 0:f86e6135dcbc 629 __O uint32_t MCCNTCON_CLR;
elevatorguy 0:f86e6135dcbc 630 __I uint32_t MCINTFLAG;
elevatorguy 0:f86e6135dcbc 631 __O uint32_t MCINTFLAG_SET;
elevatorguy 0:f86e6135dcbc 632 __O uint32_t MCINTFLAG_CLR;
elevatorguy 0:f86e6135dcbc 633 __O uint32_t MCCAP_CLR;
elevatorguy 0:f86e6135dcbc 634 } LPC_MCPWM_TypeDef;
elevatorguy 0:f86e6135dcbc 635
elevatorguy 0:f86e6135dcbc 636 /*------------- Quadrature Encoder Interface (QEI) ---------------------------*/
elevatorguy 0:f86e6135dcbc 637 typedef struct
elevatorguy 0:f86e6135dcbc 638 {
elevatorguy 0:f86e6135dcbc 639 __O uint32_t QEICON;
elevatorguy 0:f86e6135dcbc 640 __I uint32_t QEISTAT;
elevatorguy 0:f86e6135dcbc 641 __IO uint32_t QEICONF;
elevatorguy 0:f86e6135dcbc 642 __I uint32_t QEIPOS;
elevatorguy 0:f86e6135dcbc 643 __IO uint32_t QEIMAXPOS;
elevatorguy 0:f86e6135dcbc 644 __IO uint32_t CMPOS0;
elevatorguy 0:f86e6135dcbc 645 __IO uint32_t CMPOS1;
elevatorguy 0:f86e6135dcbc 646 __IO uint32_t CMPOS2;
elevatorguy 0:f86e6135dcbc 647 __I uint32_t INXCNT;
elevatorguy 0:f86e6135dcbc 648 __IO uint32_t INXCMP;
elevatorguy 0:f86e6135dcbc 649 __IO uint32_t QEILOAD;
elevatorguy 0:f86e6135dcbc 650 __I uint32_t QEITIME;
elevatorguy 0:f86e6135dcbc 651 __I uint32_t QEIVEL;
elevatorguy 0:f86e6135dcbc 652 __I uint32_t QEICAP;
elevatorguy 0:f86e6135dcbc 653 __IO uint32_t VELCOMP;
elevatorguy 0:f86e6135dcbc 654 __IO uint32_t FILTER;
elevatorguy 0:f86e6135dcbc 655 uint32_t RESERVED0[998];
elevatorguy 0:f86e6135dcbc 656 __O uint32_t QEIIEC;
elevatorguy 0:f86e6135dcbc 657 __O uint32_t QEIIES;
elevatorguy 0:f86e6135dcbc 658 __I uint32_t QEIINTSTAT;
elevatorguy 0:f86e6135dcbc 659 __I uint32_t QEIIE;
elevatorguy 0:f86e6135dcbc 660 __O uint32_t QEICLR;
elevatorguy 0:f86e6135dcbc 661 __O uint32_t QEISET;
elevatorguy 0:f86e6135dcbc 662 } LPC_QEI_TypeDef;
elevatorguy 0:f86e6135dcbc 663
elevatorguy 0:f86e6135dcbc 664 /*------------- Controller Area Network (CAN) --------------------------------*/
elevatorguy 0:f86e6135dcbc 665 typedef struct
elevatorguy 0:f86e6135dcbc 666 {
elevatorguy 0:f86e6135dcbc 667 __IO uint32_t mask[512]; /* ID Masks */
elevatorguy 0:f86e6135dcbc 668 } LPC_CANAF_RAM_TypeDef;
elevatorguy 0:f86e6135dcbc 669
elevatorguy 0:f86e6135dcbc 670 typedef struct /* Acceptance Filter Registers */
elevatorguy 0:f86e6135dcbc 671 {
elevatorguy 0:f86e6135dcbc 672 __IO uint32_t AFMR;
elevatorguy 0:f86e6135dcbc 673 __IO uint32_t SFF_sa;
elevatorguy 0:f86e6135dcbc 674 __IO uint32_t SFF_GRP_sa;
elevatorguy 0:f86e6135dcbc 675 __IO uint32_t EFF_sa;
elevatorguy 0:f86e6135dcbc 676 __IO uint32_t EFF_GRP_sa;
elevatorguy 0:f86e6135dcbc 677 __IO uint32_t ENDofTable;
elevatorguy 0:f86e6135dcbc 678 __I uint32_t LUTerrAd;
elevatorguy 0:f86e6135dcbc 679 __I uint32_t LUTerr;
elevatorguy 0:f86e6135dcbc 680 __IO uint32_t FCANIE;
elevatorguy 0:f86e6135dcbc 681 __IO uint32_t FCANIC0;
elevatorguy 0:f86e6135dcbc 682 __IO uint32_t FCANIC1;
elevatorguy 0:f86e6135dcbc 683 } LPC_CANAF_TypeDef;
elevatorguy 0:f86e6135dcbc 684
elevatorguy 0:f86e6135dcbc 685 typedef struct /* Central Registers */
elevatorguy 0:f86e6135dcbc 686 {
elevatorguy 0:f86e6135dcbc 687 __I uint32_t CANTxSR;
elevatorguy 0:f86e6135dcbc 688 __I uint32_t CANRxSR;
elevatorguy 0:f86e6135dcbc 689 __I uint32_t CANMSR;
elevatorguy 0:f86e6135dcbc 690 } LPC_CANCR_TypeDef;
elevatorguy 0:f86e6135dcbc 691
elevatorguy 0:f86e6135dcbc 692 typedef struct /* Controller Registers */
elevatorguy 0:f86e6135dcbc 693 {
elevatorguy 0:f86e6135dcbc 694 __IO uint32_t MOD;
elevatorguy 0:f86e6135dcbc 695 __O uint32_t CMR;
elevatorguy 0:f86e6135dcbc 696 __IO uint32_t GSR;
elevatorguy 0:f86e6135dcbc 697 __I uint32_t ICR;
elevatorguy 0:f86e6135dcbc 698 __IO uint32_t IER;
elevatorguy 0:f86e6135dcbc 699 __IO uint32_t BTR;
elevatorguy 0:f86e6135dcbc 700 __IO uint32_t EWL;
elevatorguy 0:f86e6135dcbc 701 __I uint32_t SR;
elevatorguy 0:f86e6135dcbc 702 __IO uint32_t RFS;
elevatorguy 0:f86e6135dcbc 703 __IO uint32_t RID;
elevatorguy 0:f86e6135dcbc 704 __IO uint32_t RDA;
elevatorguy 0:f86e6135dcbc 705 __IO uint32_t RDB;
elevatorguy 0:f86e6135dcbc 706 __IO uint32_t TFI1;
elevatorguy 0:f86e6135dcbc 707 __IO uint32_t TID1;
elevatorguy 0:f86e6135dcbc 708 __IO uint32_t TDA1;
elevatorguy 0:f86e6135dcbc 709 __IO uint32_t TDB1;
elevatorguy 0:f86e6135dcbc 710 __IO uint32_t TFI2;
elevatorguy 0:f86e6135dcbc 711 __IO uint32_t TID2;
elevatorguy 0:f86e6135dcbc 712 __IO uint32_t TDA2;
elevatorguy 0:f86e6135dcbc 713 __IO uint32_t TDB2;
elevatorguy 0:f86e6135dcbc 714 __IO uint32_t TFI3;
elevatorguy 0:f86e6135dcbc 715 __IO uint32_t TID3;
elevatorguy 0:f86e6135dcbc 716 __IO uint32_t TDA3;
elevatorguy 0:f86e6135dcbc 717 __IO uint32_t TDB3;
elevatorguy 0:f86e6135dcbc 718 } LPC_CAN_TypeDef;
elevatorguy 0:f86e6135dcbc 719
elevatorguy 0:f86e6135dcbc 720 /*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
elevatorguy 0:f86e6135dcbc 721 typedef struct /* Common Registers */
elevatorguy 0:f86e6135dcbc 722 {
elevatorguy 0:f86e6135dcbc 723 __I uint32_t DMACIntStat;
elevatorguy 0:f86e6135dcbc 724 __I uint32_t DMACIntTCStat;
elevatorguy 0:f86e6135dcbc 725 __O uint32_t DMACIntTCClear;
elevatorguy 0:f86e6135dcbc 726 __I uint32_t DMACIntErrStat;
elevatorguy 0:f86e6135dcbc 727 __O uint32_t DMACIntErrClr;
elevatorguy 0:f86e6135dcbc 728 __I uint32_t DMACRawIntTCStat;
elevatorguy 0:f86e6135dcbc 729 __I uint32_t DMACRawIntErrStat;
elevatorguy 0:f86e6135dcbc 730 __I uint32_t DMACEnbldChns;
elevatorguy 0:f86e6135dcbc 731 __IO uint32_t DMACSoftBReq;
elevatorguy 0:f86e6135dcbc 732 __IO uint32_t DMACSoftSReq;
elevatorguy 0:f86e6135dcbc 733 __IO uint32_t DMACSoftLBReq;
elevatorguy 0:f86e6135dcbc 734 __IO uint32_t DMACSoftLSReq;
elevatorguy 0:f86e6135dcbc 735 __IO uint32_t DMACConfig;
elevatorguy 0:f86e6135dcbc 736 __IO uint32_t DMACSync;
elevatorguy 0:f86e6135dcbc 737 } LPC_GPDMA_TypeDef;
elevatorguy 0:f86e6135dcbc 738
elevatorguy 0:f86e6135dcbc 739 typedef struct /* Channel Registers */
elevatorguy 0:f86e6135dcbc 740 {
elevatorguy 0:f86e6135dcbc 741 __IO uint32_t DMACCSrcAddr;
elevatorguy 0:f86e6135dcbc 742 __IO uint32_t DMACCDestAddr;
elevatorguy 0:f86e6135dcbc 743 __IO uint32_t DMACCLLI;
elevatorguy 0:f86e6135dcbc 744 __IO uint32_t DMACCControl;
elevatorguy 0:f86e6135dcbc 745 __IO uint32_t DMACCConfig;
elevatorguy 0:f86e6135dcbc 746 } LPC_GPDMACH_TypeDef;
elevatorguy 0:f86e6135dcbc 747
elevatorguy 0:f86e6135dcbc 748 /*------------- Universal Serial Bus (USB) -----------------------------------*/
elevatorguy 0:f86e6135dcbc 749 typedef struct
elevatorguy 0:f86e6135dcbc 750 {
elevatorguy 0:f86e6135dcbc 751 __I uint32_t HcRevision; /* USB Host Registers */
elevatorguy 0:f86e6135dcbc 752 __IO uint32_t HcControl;
elevatorguy 0:f86e6135dcbc 753 __IO uint32_t HcCommandStatus;
elevatorguy 0:f86e6135dcbc 754 __IO uint32_t HcInterruptStatus;
elevatorguy 0:f86e6135dcbc 755 __IO uint32_t HcInterruptEnable;
elevatorguy 0:f86e6135dcbc 756 __IO uint32_t HcInterruptDisable;
elevatorguy 0:f86e6135dcbc 757 __IO uint32_t HcHCCA;
elevatorguy 0:f86e6135dcbc 758 __I uint32_t HcPeriodCurrentED;
elevatorguy 0:f86e6135dcbc 759 __IO uint32_t HcControlHeadED;
elevatorguy 0:f86e6135dcbc 760 __IO uint32_t HcControlCurrentED;
elevatorguy 0:f86e6135dcbc 761 __IO uint32_t HcBulkHeadED;
elevatorguy 0:f86e6135dcbc 762 __IO uint32_t HcBulkCurrentED;
elevatorguy 0:f86e6135dcbc 763 __I uint32_t HcDoneHead;
elevatorguy 0:f86e6135dcbc 764 __IO uint32_t HcFmInterval;
elevatorguy 0:f86e6135dcbc 765 __I uint32_t HcFmRemaining;
elevatorguy 0:f86e6135dcbc 766 __I uint32_t HcFmNumber;
elevatorguy 0:f86e6135dcbc 767 __IO uint32_t HcPeriodicStart;
elevatorguy 0:f86e6135dcbc 768 __IO uint32_t HcLSTreshold;
elevatorguy 0:f86e6135dcbc 769 __IO uint32_t HcRhDescriptorA;
elevatorguy 0:f86e6135dcbc 770 __IO uint32_t HcRhDescriptorB;
elevatorguy 0:f86e6135dcbc 771 __IO uint32_t HcRhStatus;
elevatorguy 0:f86e6135dcbc 772 __IO uint32_t HcRhPortStatus1;
elevatorguy 0:f86e6135dcbc 773 __IO uint32_t HcRhPortStatus2;
elevatorguy 0:f86e6135dcbc 774 uint32_t RESERVED0[40];
elevatorguy 0:f86e6135dcbc 775 __I uint32_t Module_ID;
elevatorguy 0:f86e6135dcbc 776
elevatorguy 0:f86e6135dcbc 777 __I uint32_t OTGIntSt; /* USB On-The-Go Registers */
elevatorguy 0:f86e6135dcbc 778 __IO uint32_t OTGIntEn;
elevatorguy 0:f86e6135dcbc 779 __O uint32_t OTGIntSet;
elevatorguy 0:f86e6135dcbc 780 __O uint32_t OTGIntClr;
elevatorguy 0:f86e6135dcbc 781 __IO uint32_t OTGStCtrl;
elevatorguy 0:f86e6135dcbc 782 __IO uint32_t OTGTmr;
elevatorguy 0:f86e6135dcbc 783 uint32_t RESERVED1[58];
elevatorguy 0:f86e6135dcbc 784
elevatorguy 0:f86e6135dcbc 785 __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */
elevatorguy 0:f86e6135dcbc 786 __IO uint32_t USBDevIntEn;
elevatorguy 0:f86e6135dcbc 787 __O uint32_t USBDevIntClr;
elevatorguy 0:f86e6135dcbc 788 __O uint32_t USBDevIntSet;
elevatorguy 0:f86e6135dcbc 789
elevatorguy 0:f86e6135dcbc 790 __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */
elevatorguy 0:f86e6135dcbc 791 __I uint32_t USBCmdData;
elevatorguy 0:f86e6135dcbc 792
elevatorguy 0:f86e6135dcbc 793 __I uint32_t USBRxData; /* USB Device Transfer Registers */
elevatorguy 0:f86e6135dcbc 794 __O uint32_t USBTxData;
elevatorguy 0:f86e6135dcbc 795 __I uint32_t USBRxPLen;
elevatorguy 0:f86e6135dcbc 796 __O uint32_t USBTxPLen;
elevatorguy 0:f86e6135dcbc 797 __IO uint32_t USBCtrl;
elevatorguy 0:f86e6135dcbc 798 __O uint32_t USBDevIntPri;
elevatorguy 0:f86e6135dcbc 799
elevatorguy 0:f86e6135dcbc 800 __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */
elevatorguy 0:f86e6135dcbc 801 __IO uint32_t USBEpIntEn;
elevatorguy 0:f86e6135dcbc 802 __O uint32_t USBEpIntClr;
elevatorguy 0:f86e6135dcbc 803 __O uint32_t USBEpIntSet;
elevatorguy 0:f86e6135dcbc 804 __O uint32_t USBEpIntPri;
elevatorguy 0:f86e6135dcbc 805
elevatorguy 0:f86e6135dcbc 806 __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/
elevatorguy 0:f86e6135dcbc 807 __O uint32_t USBEpInd;
elevatorguy 0:f86e6135dcbc 808 __IO uint32_t USBMaxPSize;
elevatorguy 0:f86e6135dcbc 809
elevatorguy 0:f86e6135dcbc 810 __I uint32_t USBDMARSt; /* USB Device DMA Registers */
elevatorguy 0:f86e6135dcbc 811 __O uint32_t USBDMARClr;
elevatorguy 0:f86e6135dcbc 812 __O uint32_t USBDMARSet;
elevatorguy 0:f86e6135dcbc 813 uint32_t RESERVED2[9];
elevatorguy 0:f86e6135dcbc 814 __IO uint32_t USBUDCAH;
elevatorguy 0:f86e6135dcbc 815 __I uint32_t USBEpDMASt;
elevatorguy 0:f86e6135dcbc 816 __O uint32_t USBEpDMAEn;
elevatorguy 0:f86e6135dcbc 817 __O uint32_t USBEpDMADis;
elevatorguy 0:f86e6135dcbc 818 __I uint32_t USBDMAIntSt;
elevatorguy 0:f86e6135dcbc 819 __IO uint32_t USBDMAIntEn;
elevatorguy 0:f86e6135dcbc 820 uint32_t RESERVED3[2];
elevatorguy 0:f86e6135dcbc 821 __I uint32_t USBEoTIntSt;
elevatorguy 0:f86e6135dcbc 822 __O uint32_t USBEoTIntClr;
elevatorguy 0:f86e6135dcbc 823 __O uint32_t USBEoTIntSet;
elevatorguy 0:f86e6135dcbc 824 __I uint32_t USBNDDRIntSt;
elevatorguy 0:f86e6135dcbc 825 __O uint32_t USBNDDRIntClr;
elevatorguy 0:f86e6135dcbc 826 __O uint32_t USBNDDRIntSet;
elevatorguy 0:f86e6135dcbc 827 __I uint32_t USBSysErrIntSt;
elevatorguy 0:f86e6135dcbc 828 __O uint32_t USBSysErrIntClr;
elevatorguy 0:f86e6135dcbc 829 __O uint32_t USBSysErrIntSet;
elevatorguy 0:f86e6135dcbc 830 uint32_t RESERVED4[15];
elevatorguy 0:f86e6135dcbc 831
elevatorguy 0:f86e6135dcbc 832 union {
elevatorguy 0:f86e6135dcbc 833 __I uint32_t I2C_RX; /* USB OTG I2C Registers */
elevatorguy 0:f86e6135dcbc 834 __O uint32_t I2C_TX;
elevatorguy 0:f86e6135dcbc 835 };
elevatorguy 0:f86e6135dcbc 836 __I uint32_t I2C_STS;
elevatorguy 0:f86e6135dcbc 837 __IO uint32_t I2C_CTL;
elevatorguy 0:f86e6135dcbc 838 __IO uint32_t I2C_CLKHI;
elevatorguy 0:f86e6135dcbc 839 __O uint32_t I2C_CLKLO;
elevatorguy 0:f86e6135dcbc 840 uint32_t RESERVED5[824];
elevatorguy 0:f86e6135dcbc 841
elevatorguy 0:f86e6135dcbc 842 union {
elevatorguy 0:f86e6135dcbc 843 __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */
elevatorguy 0:f86e6135dcbc 844 __IO uint32_t OTGClkCtrl;
elevatorguy 0:f86e6135dcbc 845 };
elevatorguy 0:f86e6135dcbc 846 union {
elevatorguy 0:f86e6135dcbc 847 __I uint32_t USBClkSt;
elevatorguy 0:f86e6135dcbc 848 __I uint32_t OTGClkSt;
elevatorguy 0:f86e6135dcbc 849 };
elevatorguy 0:f86e6135dcbc 850 } LPC_USB_TypeDef;
elevatorguy 0:f86e6135dcbc 851
elevatorguy 0:f86e6135dcbc 852 /*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
elevatorguy 0:f86e6135dcbc 853 typedef struct
elevatorguy 0:f86e6135dcbc 854 {
elevatorguy 0:f86e6135dcbc 855 __IO uint32_t MAC1; /* MAC Registers */
elevatorguy 0:f86e6135dcbc 856 __IO uint32_t MAC2;
elevatorguy 0:f86e6135dcbc 857 __IO uint32_t IPGT;
elevatorguy 0:f86e6135dcbc 858 __IO uint32_t IPGR;
elevatorguy 0:f86e6135dcbc 859 __IO uint32_t CLRT;
elevatorguy 0:f86e6135dcbc 860 __IO uint32_t MAXF;
elevatorguy 0:f86e6135dcbc 861 __IO uint32_t SUPP;
elevatorguy 0:f86e6135dcbc 862 __IO uint32_t TEST;
elevatorguy 0:f86e6135dcbc 863 __IO uint32_t MCFG;
elevatorguy 0:f86e6135dcbc 864 __IO uint32_t MCMD;
elevatorguy 0:f86e6135dcbc 865 __IO uint32_t MADR;
elevatorguy 0:f86e6135dcbc 866 __O uint32_t MWTD;
elevatorguy 0:f86e6135dcbc 867 __I uint32_t MRDD;
elevatorguy 0:f86e6135dcbc 868 __I uint32_t MIND;
elevatorguy 0:f86e6135dcbc 869 uint32_t RESERVED0[2];
elevatorguy 0:f86e6135dcbc 870 __IO uint32_t SA0;
elevatorguy 0:f86e6135dcbc 871 __IO uint32_t SA1;
elevatorguy 0:f86e6135dcbc 872 __IO uint32_t SA2;
elevatorguy 0:f86e6135dcbc 873 uint32_t RESERVED1[45];
elevatorguy 0:f86e6135dcbc 874 __IO uint32_t Command; /* Control Registers */
elevatorguy 0:f86e6135dcbc 875 __I uint32_t Status;
elevatorguy 0:f86e6135dcbc 876 __IO uint32_t RxDescriptor;
elevatorguy 0:f86e6135dcbc 877 __IO uint32_t RxStatus;
elevatorguy 0:f86e6135dcbc 878 __IO uint32_t RxDescriptorNumber;
elevatorguy 0:f86e6135dcbc 879 __I uint32_t RxProduceIndex;
elevatorguy 0:f86e6135dcbc 880 __IO uint32_t RxConsumeIndex;
elevatorguy 0:f86e6135dcbc 881 __IO uint32_t TxDescriptor;
elevatorguy 0:f86e6135dcbc 882 __IO uint32_t TxStatus;
elevatorguy 0:f86e6135dcbc 883 __IO uint32_t TxDescriptorNumber;
elevatorguy 0:f86e6135dcbc 884 __IO uint32_t TxProduceIndex;
elevatorguy 0:f86e6135dcbc 885 __I uint32_t TxConsumeIndex;
elevatorguy 0:f86e6135dcbc 886 uint32_t RESERVED2[10];
elevatorguy 0:f86e6135dcbc 887 __I uint32_t TSV0;
elevatorguy 0:f86e6135dcbc 888 __I uint32_t TSV1;
elevatorguy 0:f86e6135dcbc 889 __I uint32_t RSV;
elevatorguy 0:f86e6135dcbc 890 uint32_t RESERVED3[3];
elevatorguy 0:f86e6135dcbc 891 __IO uint32_t FlowControlCounter;
elevatorguy 0:f86e6135dcbc 892 __I uint32_t FlowControlStatus;
elevatorguy 0:f86e6135dcbc 893 uint32_t RESERVED4[34];
elevatorguy 0:f86e6135dcbc 894 __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */
elevatorguy 0:f86e6135dcbc 895 __IO uint32_t RxFilterWoLStatus;
elevatorguy 0:f86e6135dcbc 896 __IO uint32_t RxFilterWoLClear;
elevatorguy 0:f86e6135dcbc 897 uint32_t RESERVED5;
elevatorguy 0:f86e6135dcbc 898 __IO uint32_t HashFilterL;
elevatorguy 0:f86e6135dcbc 899 __IO uint32_t HashFilterH;
elevatorguy 0:f86e6135dcbc 900 uint32_t RESERVED6[882];
elevatorguy 0:f86e6135dcbc 901 __I uint32_t IntStatus; /* Module Control Registers */
elevatorguy 0:f86e6135dcbc 902 __IO uint32_t IntEnable;
elevatorguy 0:f86e6135dcbc 903 __O uint32_t IntClear;
elevatorguy 0:f86e6135dcbc 904 __O uint32_t IntSet;
elevatorguy 0:f86e6135dcbc 905 uint32_t RESERVED7;
elevatorguy 0:f86e6135dcbc 906 __IO uint32_t PowerDown;
elevatorguy 0:f86e6135dcbc 907 uint32_t RESERVED8;
elevatorguy 0:f86e6135dcbc 908 __IO uint32_t Module_ID;
elevatorguy 0:f86e6135dcbc 909 } LPC_EMAC_TypeDef;
elevatorguy 0:f86e6135dcbc 910
elevatorguy 0:f86e6135dcbc 911 #if defined ( __CC_ARM )
elevatorguy 0:f86e6135dcbc 912 #pragma no_anon_unions
elevatorguy 0:f86e6135dcbc 913 #endif
elevatorguy 0:f86e6135dcbc 914
elevatorguy 0:f86e6135dcbc 915
elevatorguy 0:f86e6135dcbc 916 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 917 /* Peripheral memory map */
elevatorguy 0:f86e6135dcbc 918 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 919 /* Base addresses */
elevatorguy 0:f86e6135dcbc 920 #define LPC_FLASH_BASE (0x00000000UL)
elevatorguy 0:f86e6135dcbc 921 #define LPC_RAM_BASE (0x10000000UL)
elevatorguy 0:f86e6135dcbc 922 #define LPC_GPIO_BASE (0x2009C000UL)
elevatorguy 0:f86e6135dcbc 923 #define LPC_APB0_BASE (0x40000000UL)
elevatorguy 0:f86e6135dcbc 924 #define LPC_APB1_BASE (0x40080000UL)
elevatorguy 0:f86e6135dcbc 925 #define LPC_AHB_BASE (0x50000000UL)
elevatorguy 0:f86e6135dcbc 926 #define LPC_CM3_BASE (0xE0000000UL)
elevatorguy 0:f86e6135dcbc 927
elevatorguy 0:f86e6135dcbc 928 /* APB0 peripherals */
elevatorguy 0:f86e6135dcbc 929 #define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
elevatorguy 0:f86e6135dcbc 930 #define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
elevatorguy 0:f86e6135dcbc 931 #define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
elevatorguy 0:f86e6135dcbc 932 #define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
elevatorguy 0:f86e6135dcbc 933 #define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
elevatorguy 0:f86e6135dcbc 934 #define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
elevatorguy 0:f86e6135dcbc 935 #define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
elevatorguy 0:f86e6135dcbc 936 #define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
elevatorguy 0:f86e6135dcbc 937 #define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
elevatorguy 0:f86e6135dcbc 938 #define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
elevatorguy 0:f86e6135dcbc 939 #define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
elevatorguy 0:f86e6135dcbc 940 #define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
elevatorguy 0:f86e6135dcbc 941 #define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
elevatorguy 0:f86e6135dcbc 942 #define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
elevatorguy 0:f86e6135dcbc 943 #define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
elevatorguy 0:f86e6135dcbc 944 #define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
elevatorguy 0:f86e6135dcbc 945 #define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
elevatorguy 0:f86e6135dcbc 946 #define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
elevatorguy 0:f86e6135dcbc 947 #define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
elevatorguy 0:f86e6135dcbc 948
elevatorguy 0:f86e6135dcbc 949 /* APB1 peripherals */
elevatorguy 0:f86e6135dcbc 950 #define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
elevatorguy 0:f86e6135dcbc 951 #define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
elevatorguy 0:f86e6135dcbc 952 #define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
elevatorguy 0:f86e6135dcbc 953 #define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
elevatorguy 0:f86e6135dcbc 954 #define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
elevatorguy 0:f86e6135dcbc 955 #define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
elevatorguy 0:f86e6135dcbc 956 #define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
elevatorguy 0:f86e6135dcbc 957 #define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
elevatorguy 0:f86e6135dcbc 958 #define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
elevatorguy 0:f86e6135dcbc 959 #define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
elevatorguy 0:f86e6135dcbc 960 #define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
elevatorguy 0:f86e6135dcbc 961 #define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
elevatorguy 0:f86e6135dcbc 962
elevatorguy 0:f86e6135dcbc 963 /* AHB peripherals */
elevatorguy 0:f86e6135dcbc 964 #define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
elevatorguy 0:f86e6135dcbc 965 #define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
elevatorguy 0:f86e6135dcbc 966 #define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
elevatorguy 0:f86e6135dcbc 967 #define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
elevatorguy 0:f86e6135dcbc 968 #define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
elevatorguy 0:f86e6135dcbc 969 #define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
elevatorguy 0:f86e6135dcbc 970 #define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
elevatorguy 0:f86e6135dcbc 971 #define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
elevatorguy 0:f86e6135dcbc 972 #define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
elevatorguy 0:f86e6135dcbc 973 #define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
elevatorguy 0:f86e6135dcbc 974 #define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
elevatorguy 0:f86e6135dcbc 975
elevatorguy 0:f86e6135dcbc 976 /* GPIOs */
elevatorguy 0:f86e6135dcbc 977 #define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
elevatorguy 0:f86e6135dcbc 978 #define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
elevatorguy 0:f86e6135dcbc 979 #define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
elevatorguy 0:f86e6135dcbc 980 #define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
elevatorguy 0:f86e6135dcbc 981 #define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
elevatorguy 0:f86e6135dcbc 982
elevatorguy 0:f86e6135dcbc 983
elevatorguy 0:f86e6135dcbc 984 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 985 /* Peripheral declaration */
elevatorguy 0:f86e6135dcbc 986 /******************************************************************************/
elevatorguy 0:f86e6135dcbc 987 #define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
elevatorguy 0:f86e6135dcbc 988 #define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
elevatorguy 0:f86e6135dcbc 989 #define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
elevatorguy 0:f86e6135dcbc 990 #define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
elevatorguy 0:f86e6135dcbc 991 #define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
elevatorguy 0:f86e6135dcbc 992 #define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
elevatorguy 0:f86e6135dcbc 993 #define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
elevatorguy 0:f86e6135dcbc 994 #define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
elevatorguy 0:f86e6135dcbc 995 #define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
elevatorguy 0:f86e6135dcbc 996 #define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
elevatorguy 0:f86e6135dcbc 997 #define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
elevatorguy 0:f86e6135dcbc 998 #define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
elevatorguy 0:f86e6135dcbc 999 #define LPC_UART0 ((LPC_UART0_TypeDef *) LPC_UART0_BASE )
elevatorguy 0:f86e6135dcbc 1000 #define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
elevatorguy 0:f86e6135dcbc 1001 #define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
elevatorguy 0:f86e6135dcbc 1002 #define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
elevatorguy 0:f86e6135dcbc 1003 #define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
elevatorguy 0:f86e6135dcbc 1004 #define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
elevatorguy 0:f86e6135dcbc 1005 #define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
elevatorguy 0:f86e6135dcbc 1006 #define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
elevatorguy 0:f86e6135dcbc 1007 #define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
elevatorguy 0:f86e6135dcbc 1008 #define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
elevatorguy 0:f86e6135dcbc 1009 #define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
elevatorguy 0:f86e6135dcbc 1010 #define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
elevatorguy 0:f86e6135dcbc 1011 #define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
elevatorguy 0:f86e6135dcbc 1012 #define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
elevatorguy 0:f86e6135dcbc 1013 #define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
elevatorguy 0:f86e6135dcbc 1014 #define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
elevatorguy 0:f86e6135dcbc 1015 #define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
elevatorguy 0:f86e6135dcbc 1016 #define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
elevatorguy 0:f86e6135dcbc 1017 #define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
elevatorguy 0:f86e6135dcbc 1018 #define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
elevatorguy 0:f86e6135dcbc 1019 #define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
elevatorguy 0:f86e6135dcbc 1020 #define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
elevatorguy 0:f86e6135dcbc 1021 #define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
elevatorguy 0:f86e6135dcbc 1022 #define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
elevatorguy 0:f86e6135dcbc 1023 #define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
elevatorguy 0:f86e6135dcbc 1024 #define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
elevatorguy 0:f86e6135dcbc 1025 #define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
elevatorguy 0:f86e6135dcbc 1026 #define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
elevatorguy 0:f86e6135dcbc 1027 #define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
elevatorguy 0:f86e6135dcbc 1028 #define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
elevatorguy 0:f86e6135dcbc 1029 #define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
elevatorguy 0:f86e6135dcbc 1030 #define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
elevatorguy 0:f86e6135dcbc 1031 #define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
elevatorguy 0:f86e6135dcbc 1032 #define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
elevatorguy 0:f86e6135dcbc 1033 #define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )
elevatorguy 0:f86e6135dcbc 1034
elevatorguy 0:f86e6135dcbc 1035 #endif // __LPC17xx_H__