erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC13XX/PeripheralNames.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #ifndef MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 17 #define MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #ifdef __cplusplus
elessair 0:f269e3021894 22 extern "C" {
elessair 0:f269e3021894 23 #endif
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 typedef enum {
elessair 0:f269e3021894 26 UART_0 = (int)LPC_USART_BASE
elessair 0:f269e3021894 27 } UARTName;
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 typedef enum {
elessair 0:f269e3021894 30 I2C_0 = (int)LPC_I2C_BASE
elessair 0:f269e3021894 31 } I2CName;
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 typedef enum {
elessair 0:f269e3021894 34 ADC0_0 = 0,
elessair 0:f269e3021894 35 ADC0_1,
elessair 0:f269e3021894 36 ADC0_2,
elessair 0:f269e3021894 37 ADC0_3,
elessair 0:f269e3021894 38 ADC0_4,
elessair 0:f269e3021894 39 ADC0_5,
elessair 0:f269e3021894 40 ADC0_6,
elessair 0:f269e3021894 41 ADC0_7
elessair 0:f269e3021894 42 } ADCName;
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 typedef enum {
elessair 0:f269e3021894 45 SPI_0 = (int)LPC_SSP0_BASE,
elessair 0:f269e3021894 46 SPI_1 = (int)LPC_SSP1_BASE
elessair 0:f269e3021894 47 } SPIName;
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 typedef enum {
elessair 0:f269e3021894 50 PWM_1 = 0,
elessair 0:f269e3021894 51 PWM_2,
elessair 0:f269e3021894 52 PWM_3,
elessair 0:f269e3021894 53 PWM_4,
elessair 0:f269e3021894 54 PWM_5,
elessair 0:f269e3021894 55 PWM_6,
elessair 0:f269e3021894 56 PWM_7,
elessair 0:f269e3021894 57 PWM_8,
elessair 0:f269e3021894 58 PWM_9,
elessair 0:f269e3021894 59 PWM_10,
elessair 0:f269e3021894 60 PWM_11
elessair 0:f269e3021894 61 } PWMName;
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 #define STDIO_UART_TX UART_TX
elessair 0:f269e3021894 64 #define STDIO_UART_RX UART_RX
elessair 0:f269e3021894 65 #define STDIO_UART UART_0
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 #ifdef __cplusplus
elessair 0:f269e3021894 68 }
elessair 0:f269e3021894 69 #endif
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 #endif