erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC11U6X/PeripheralNames.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #ifndef MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 17 #define MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #ifdef __cplusplus
elessair 0:f269e3021894 22 extern "C" {
elessair 0:f269e3021894 23 #endif
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 typedef enum {
elessair 0:f269e3021894 26 UART_0 = (int)LPC_USART0_BASE,
elessair 0:f269e3021894 27 UART_1 = (int)LPC_USART1_BASE,
elessair 0:f269e3021894 28 UART_2 = (int)LPC_USART2_BASE,
elessair 0:f269e3021894 29 UART_3 = (int)LPC_USART3_BASE,
elessair 0:f269e3021894 30 UART_4 = (int)LPC_USART4_BASE,
elessair 0:f269e3021894 31 } UARTName;
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 typedef enum {
elessair 0:f269e3021894 34 ADC_0 = 0,
elessair 0:f269e3021894 35 ADC_1,
elessair 0:f269e3021894 36 ADC_2,
elessair 0:f269e3021894 37 ADC_3,
elessair 0:f269e3021894 38 ADC_4,
elessair 0:f269e3021894 39 ADC_5,
elessair 0:f269e3021894 40 ADC_6,
elessair 0:f269e3021894 41 ADC_7,
elessair 0:f269e3021894 42 ADC_8,
elessair 0:f269e3021894 43 ADC_9,
elessair 0:f269e3021894 44 ADC_10,
elessair 0:f269e3021894 45 ADC_11,
elessair 0:f269e3021894 46 } ADCName;
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 typedef enum {
elessair 0:f269e3021894 49 SPI_0 = (int)LPC_SSP0_BASE,
elessair 0:f269e3021894 50 SPI_1 = (int)LPC_SSP1_BASE
elessair 0:f269e3021894 51 } SPIName;
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 typedef enum {
elessair 0:f269e3021894 54 I2C_0 = (int)LPC_I2C0_BASE,
elessair 0:f269e3021894 55 I2C_1 = (int)LPC_I2C1_BASE
elessair 0:f269e3021894 56 } I2CName;
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 typedef enum {
elessair 0:f269e3021894 59 SCT0_0 = 0,
elessair 0:f269e3021894 60 SCT0_1,
elessair 0:f269e3021894 61 SCT0_2,
elessair 0:f269e3021894 62 SCT0_3,
elessair 0:f269e3021894 63 SCT1_0,
elessair 0:f269e3021894 64 SCT1_1,
elessair 0:f269e3021894 65 SCT1_2,
elessair 0:f269e3021894 66 SCT1_3,
elessair 0:f269e3021894 67 } PWMName;
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 #ifdef __cplusplus
elessair 0:f269e3021894 70 }
elessair 0:f269e3021894 71 #endif
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 #endif