imp_rx_flow

Dependencies:   mbed

Committer:
ee12b079
Date:
Thu Jan 08 16:22:08 2015 +0000
Revision:
0:06ef97f5aa97
imp_rx_flow

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ee12b079 0:06ef97f5aa97 1 // 6CC000 for 435 MHz
ee12b079 0:06ef97f5aa97 2 //set all values as FF for checking on spectrum analyzer
ee12b079 0:06ef97f5aa97 3 #include "beacon.h"
ee12b079 0:06ef97f5aa97 4 //Serial pc(USBTX, USBRX); // tx, rx
ee12b079 0:06ef97f5aa97 5 Serial pc(USBTX, USBRX);
ee12b079 0:06ef97f5aa97 6 SPI spi(D11, D12, D13); // mosi, miso, sclk
ee12b079 0:06ef97f5aa97 7 DigitalOut cs_bar(D10); //slave select or chip select
ee12b079 0:06ef97f5aa97 8 //InterruptIn button(p9);
ee12b079 0:06ef97f5aa97 9 #define TX_DATA 180
ee12b079 0:06ef97f5aa97 10 //Timer t;
ee12b079 0:06ef97f5aa97 11
ee12b079 0:06ef97f5aa97 12 //functons
ee12b079 0:06ef97f5aa97 13 void copy_bit(uint8_t*,uint8_t*,uint8_t*);
ee12b079 0:06ef97f5aa97 14 uint8_t read_byte(uint8_t*);
ee12b079 0:06ef97f5aa97 15 void attach_byte(uint8_t* , struct frame*, uint8_t*, uint8_t *);
ee12b079 0:06ef97f5aa97 16 void attach_frame(struct frame*, struct frame *,uint8_t*,uint8_t*);
ee12b079 0:06ef97f5aa97 17 void scan_dstuff(uint8_t*,uint8_t* ,uint8_t*,uint8_t*,uint8_t*);
ee12b079 0:06ef97f5aa97 18 void post_flag(uint8_t* ,uint8_t* ,uint8_t* );
ee12b079 0:06ef97f5aa97 19 void post_shift_out(uint8_t*,uint8_t*,uint8_t*);
ee12b079 0:06ef97f5aa97 20 struct frame{
ee12b079 0:06ef97f5aa97 21 uint8_t byte[182];
ee12b079 0:06ef97f5aa97 22 }p_frame[32],t_frame;
ee12b079 0:06ef97f5aa97 23 void writereg(uint8_t reg,uint8_t val)
ee12b079 0:06ef97f5aa97 24 {
ee12b079 0:06ef97f5aa97 25 cs_bar = 0;
ee12b079 0:06ef97f5aa97 26 spi.write(reg | 0x80);
ee12b079 0:06ef97f5aa97 27 spi.write(val);
ee12b079 0:06ef97f5aa97 28 cs_bar = 1;
ee12b079 0:06ef97f5aa97 29 }
ee12b079 0:06ef97f5aa97 30 uint8_t readreg(uint8_t reg)
ee12b079 0:06ef97f5aa97 31 {
ee12b079 0:06ef97f5aa97 32 uint8_t val;
ee12b079 0:06ef97f5aa97 33 cs_bar = 0;
ee12b079 0:06ef97f5aa97 34 spi.write(reg & ~0x80);
ee12b079 0:06ef97f5aa97 35 val = spi.write(0);
ee12b079 0:06ef97f5aa97 36 cs_bar = 1;
ee12b079 0:06ef97f5aa97 37 return val;
ee12b079 0:06ef97f5aa97 38 }
ee12b079 0:06ef97f5aa97 39
ee12b079 0:06ef97f5aa97 40 main() {
ee12b079 0:06ef97f5aa97 41 int n = 0;int x = 0;int thresh=0;
ee12b079 0:06ef97f5aa97 42 int data[TX_DATA];
ee12b079 0:06ef97f5aa97 43 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
ee12b079 0:06ef97f5aa97 44 wait(0.02); // pl. update this value or even avoid it!!!
ee12b079 0:06ef97f5aa97 45 //extract values from short_beacon[]
ee12b079 0:06ef97f5aa97 46
ee12b079 0:06ef97f5aa97 47 //pc.baud(115200);
ee12b079 0:06ef97f5aa97 48 spi.format(8,0);
ee12b079 0:06ef97f5aa97 49 spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw)
ee12b079 0:06ef97f5aa97 50
ee12b079 0:06ef97f5aa97 51 cs_bar = 1; // Chip must be deselected
ee12b079 0:06ef97f5aa97 52
ee12b079 0:06ef97f5aa97 53 if (readreg(0x15) == 0xB0) pc.printf("spi connection valid\n");
ee12b079 0:06ef97f5aa97 54 else {pc.printf("error in spi connection\n"); exit(0); }
ee12b079 0:06ef97f5aa97 55
ee12b079 0:06ef97f5aa97 56 //initialization
ee12b079 0:06ef97f5aa97 57 //Common configuration registers
ee12b079 0:06ef97f5aa97 58 writereg(0x01,0x00); //sequencer on,standby mode
ee12b079 0:06ef97f5aa97 59 writereg(0x02,0x08);// |0x01); //packet, ook, no dc //0x00 for fsk //default = 0x08 for ook
ee12b079 0:06ef97f5aa97 60 writereg(0x03,0x68); //1200bps
ee12b079 0:06ef97f5aa97 61 writereg(0x04,0x2B); //1200bps
ee12b079 0:06ef97f5aa97 62 writereg(0x07,0x6C);
ee12b079 0:06ef97f5aa97 63 writereg(0x08,0xC0);
ee12b079 0:06ef97f5aa97 64 writereg(0x09,0x00); //try 6C C0 00 for 435 MHZ //try 6C 40 00 for 432.something //try E4 C0 00 for 915
ee12b079 0:06ef97f5aa97 65
ee12b079 0:06ef97f5aa97 66 //FSK settings
ee12b079 0:06ef97f5aa97 67 writereg(0x06,0x52);// = (actual Fdev)*0.016384 //0x52 for 5khz //0x14 for 1.2khz //0x0A for0.6khz
ee12b079 0:06ef97f5aa97 68
ee12b079 0:06ef97f5aa97 69
ee12b079 0:06ef97f5aa97 70
ee12b079 0:06ef97f5aa97 71 //Transmitter registers
ee12b079 0:06ef97f5aa97 72 // RegPaLevel
ee12b079 0:06ef97f5aa97 73
ee12b079 0:06ef97f5aa97 74 //IRQ and Pin Mapping Registers
ee12b079 0:06ef97f5aa97 75 //no DIO mapped yet
ee12b079 0:06ef97f5aa97 76 //irq1: modeready used
ee12b079 0:06ef97f5aa97 77 //irq2: fifofull, fifothresh,packetsent used
ee12b079 0:06ef97f5aa97 78
ee12b079 0:06ef97f5aa97 79 //rx registers
ee12b079 0:06ef97f5aa97 80 writereg(0x18,0x08); //RegLNA using agc
ee12b079 0:06ef97f5aa97 81 writereg(0x19,0x51); //Regrxbw (data is successfully received from 5.2 khz onwards for 1200bps)
ee12b079 0:06ef97f5aa97 82 //keep it as 0x51 for 83.3kHz, 0x42 for 62.5kHz, 0x49 for 100 kHz, 0x40 for 250khz, 57 for 1.3khz, 56 for 2.6khz
ee12b079 0:06ef97f5aa97 83 //46 for 3.9khz//0x57:2.6khz for 1.2khz
ee12b079 0:06ef97f5aa97 84
ee12b079 0:06ef97f5aa97 85 writereg(0x29,0x78); //rssi_thresh = -110 (0x6E) //0xB4 for -180 //0x96 for -150dBm
ee12b079 0:06ef97f5aa97 86 //0x78 for -120
ee12b079 0:06ef97f5aa97 87
ee12b079 0:06ef97f5aa97 88
ee12b079 0:06ef97f5aa97 89 //Packet Engine Registers
ee12b079 0:06ef97f5aa97 90 writereg(0x2C,0x00); //set preamble
ee12b079 0:06ef97f5aa97 91 writereg(0x2D,0x0A); //set preamble default(0x0A)
ee12b079 0:06ef97f5aa97 92 writereg(0x2E,0x80); //sync off ..........................
ee12b079 0:06ef97f5aa97 93 writereg(0x2F,0x5E); //sync word 1 .........................
ee12b079 0:06ef97f5aa97 94 writereg(0x37,0x08);// | 0x10);// | 0x40); //packetconfig1 data whitening(0x40), crc (0x10) packet issue even if crc fails???..........................
ee12b079 0:06ef97f5aa97 95 writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode
ee12b079 0:06ef97f5aa97 96 writereg(0x3C,30); //fifothresh = 48 because we want it cleared once its 40!!!!
ee12b079 0:06ef97f5aa97 97 //Initialization complete
ee12b079 0:06ef97f5aa97 98 pc.printf("press 'r' to start receiver\n");
ee12b079 0:06ef97f5aa97 99 while(pc.getc()== 'r'){
ee12b079 0:06ef97f5aa97 100 //force rx in WAIT mode
ee12b079 0:06ef97f5aa97 101 writereg(0x3D,0x04);//avoid rx deadlocks
ee12b079 0:06ef97f5aa97 102 //set to Rx mode
ee12b079 0:06ef97f5aa97 103 writereg(0x01,0x10);
ee12b079 0:06ef97f5aa97 104
ee12b079 0:06ef97f5aa97 105 //wait for modeready
ee12b079 0:06ef97f5aa97 106 while((readreg(0x27)&0x80)!=0x80);
ee12b079 0:06ef97f5aa97 107 pc.printf("receiver is on, ready to accept.....\n");
ee12b079 0:06ef97f5aa97 108
ee12b079 0:06ef97f5aa97 109 //wait for rssi to cross rssi_thresh
ee12b079 0:06ef97f5aa97 110 while((readreg(0x27)& 0x08) != 0x08)pc.printf("w:rssi\n");
ee12b079 0:06ef97f5aa97 111
ee12b079 0:06ef97f5aa97 112 //wait for SyncAddressMatch
ee12b079 0:06ef97f5aa97 113 while((readreg(0x27) & 0x01) != 0x01)pc.printf("w:sync\n");
ee12b079 0:06ef97f5aa97 114
ee12b079 0:06ef97f5aa97 115 //pc.printf("receiving.....\n");
ee12b079 0:06ef97f5aa97 116 //check for fifo_thresh
ee12b079 0:06ef97f5aa97 117 while((readreg(0x28) & 0x20) != 0x20);//pc.printf("w:fifo_thresh\n");
ee12b079 0:06ef97f5aa97 118
ee12b079 0:06ef97f5aa97 119
ee12b079 0:06ef97f5aa97 120 /*while(x!=TX_DATA)//fifo_thresh
ee12b079 0:06ef97f5aa97 121 {
ee12b079 0:06ef97f5aa97 122 thresh = TX_DATA - x;
ee12b079 0:06ef97f5aa97 123 //reading
ee12b079 0:06ef97f5aa97 124 cs_bar = 0;
ee12b079 0:06ef97f5aa97 125 spi.write(0x00);
ee12b079 0:06ef97f5aa97 126 if(TX_DATA-x>20)
ee12b079 0:06ef97f5aa97 127 for(int i=0; i<20;i++,x++)
ee12b079 0:06ef97f5aa97 128 data[x] = spi.write(0);
ee12b079 0:06ef97f5aa97 129 else
ee12b079 0:06ef97f5aa97 130 for(int i=0; i<thresh;i++,x++)
ee12b079 0:06ef97f5aa97 131 data[x] = spi.write(0);
ee12b079 0:06ef97f5aa97 132 cs_bar = 1;
ee12b079 0:06ef97f5aa97 133 //check for fifo_thresh
ee12b079 0:06ef97f5aa97 134 while((readreg(0x28) & 0x20) != 0x20);
ee12b079 0:06ef97f5aa97 135 }*/
ee12b079 0:06ef97f5aa97 136
ee12b079 0:06ef97f5aa97 137 //~~~~ RX BEGIN
ee12b079 0:06ef97f5aa97 138
ee12b079 0:06ef97f5aa97 139
ee12b079 0:06ef97f5aa97 140
ee12b079 0:06ef97f5aa97 141 uint8_t test_byte=0,flag =0;
ee12b079 0:06ef97f5aa97 142 uint8_t fifo_byte=0;
ee12b079 0:06ef97f5aa97 143 uint8_t dstuff_byte=0;
ee12b079 0:06ef97f5aa97 144 uint8_t byte_no=0;
ee12b079 0:06ef97f5aa97 145 uint8_t frame_no=0;
ee12b079 0:06ef97f5aa97 146 uint8_t shift_in=0,shift_out=0;
ee12b079 0:06ef97f5aa97 147 uint8_t dstuff_count = 0;
ee12b079 0:06ef97f5aa97 148
ee12b079 0:06ef97f5aa97 149 while(frame_no!=1){
ee12b079 0:06ef97f5aa97 150 while(flag == 0)
ee12b079 0:06ef97f5aa97 151 {
ee12b079 0:06ef97f5aa97 152 //while((readreg(0x28) & 0x20) != 0x20);
ee12b079 0:06ef97f5aa97 153 //printf("entered\n");
ee12b079 0:06ef97f5aa97 154 //fifo_byte = read_byte(&shift_in);
ee12b079 0:06ef97f5aa97 155 if(fifo_byte != 0x7E)
ee12b079 0:06ef97f5aa97 156 {fifo_byte = read_byte(&shift_in);continue;//cs_bar = 0;
ee12b079 0:06ef97f5aa97 157 //spi.write(0x00);
ee12b079 0:06ef97f5aa97 158 //printf("\n\n\n\nbbbyyyte = %X\n\n\n\n", spi.write(0));
ee12b079 0:06ef97f5aa97 159 //cs_bar = 1;
ee12b079 0:06ef97f5aa97 160 }
ee12b079 0:06ef97f5aa97 161 else {flag = 2;fifo_byte = read_byte(&shift_in);post_flag(&fifo_byte, &test_byte, &shift_in);}
ee12b079 0:06ef97f5aa97 162 }
ee12b079 0:06ef97f5aa97 163 if(flag == 2)
ee12b079 0:06ef97f5aa97 164 for(;shift_in < 8;)
ee12b079 0:06ef97f5aa97 165 {
ee12b079 0:06ef97f5aa97 166 if(shift_out == 8)
ee12b079 0:06ef97f5aa97 167 { if(byte_no < 182 )
ee12b079 0:06ef97f5aa97 168 attach_byte(&dstuff_byte,&t_frame,&shift_out,&byte_no);
ee12b079 0:06ef97f5aa97 169 else
ee12b079 0:06ef97f5aa97 170 {attach_frame(&t_frame,&p_frame[frame_no++],&frame_no,&byte_no);flag =0;post_flag(&fifo_byte,&test_byte,&shift_in);dstuff_byte=0;break;}
ee12b079 0:06ef97f5aa97 171 }
ee12b079 0:06ef97f5aa97 172 if(!(dstuff_count))
ee12b079 0:06ef97f5aa97 173 scan_dstuff(&fifo_byte,&test_byte, &flag,&shift_in,&dstuff_count);
ee12b079 0:06ef97f5aa97 174 else
ee12b079 0:06ef97f5aa97 175 dstuff_count--;
ee12b079 0:06ef97f5aa97 176 if(flag == 3)
ee12b079 0:06ef97f5aa97 177 break;
ee12b079 0:06ef97f5aa97 178 copy_bit(&test_byte,&dstuff_byte,&shift_out);//shift_out
ee12b079 0:06ef97f5aa97 179 post_shift_out(&fifo_byte,&test_byte,&shift_in);//updating last bit of test_byte
ee12b079 0:06ef97f5aa97 180 }
ee12b079 0:06ef97f5aa97 181 //~~
ee12b079 0:06ef97f5aa97 182
ee12b079 0:06ef97f5aa97 183 //a check for fifo...
ee12b079 0:06ef97f5aa97 184 //writereg(0x3C,50);
ee12b079 0:06ef97f5aa97 185 //while((readreg(0x28) & 0x20) != 0x20)pc.printf("w:fifo_thresh3\n");
ee12b079 0:06ef97f5aa97 186 //pc.printf("waiting for 50\n");
ee12b079 0:06ef97f5aa97 187 //writereg(0x3C,10);
ee12b079 0:06ef97f5aa97 188
ee12b079 0:06ef97f5aa97 189 //~~
ee12b079 0:06ef97f5aa97 190
ee12b079 0:06ef97f5aa97 191 if(flag == 0)
ee12b079 0:06ef97f5aa97 192 continue;
ee12b079 0:06ef97f5aa97 193 if(shift_in == 8)
ee12b079 0:06ef97f5aa97 194 fifo_byte = read_byte(&shift_in);
ee12b079 0:06ef97f5aa97 195 if(flag == 3)
ee12b079 0:06ef97f5aa97 196 { if(shift_out%8 != 0){t_frame = (const struct frame){ 0 };shift_out=0;post_flag(&fifo_byte,&test_byte,&shift_in);}//discarding frame not a multiple of 8...make a function later
ee12b079 0:06ef97f5aa97 197 else {attach_frame(&t_frame,&p_frame[frame_no++],&frame_no,&byte_no);flag =2;post_flag(&fifo_byte,&test_byte,&shift_in);dstuff_byte=0;}
ee12b079 0:06ef97f5aa97 198 }
ee12b079 0:06ef97f5aa97 199 }
ee12b079 0:06ef97f5aa97 200
ee12b079 0:06ef97f5aa97 201
ee12b079 0:06ef97f5aa97 202
ee12b079 0:06ef97f5aa97 203 //RX END
ee12b079 0:06ef97f5aa97 204
ee12b079 0:06ef97f5aa97 205 pc.printf("\n\npacket received!!! \n\n");
ee12b079 0:06ef97f5aa97 206
ee12b079 0:06ef97f5aa97 207 wait(1);
ee12b079 0:06ef97f5aa97 208 //Switch back to Standby Mode
ee12b079 0:06ef97f5aa97 209 writereg(0x01,0x04);
ee12b079 0:06ef97f5aa97 210 //wait for modeready
ee12b079 0:06ef97f5aa97 211 while((readreg(0x27)&0x80)!=0x80);
ee12b079 0:06ef97f5aa97 212
ee12b079 0:06ef97f5aa97 213 /*pc.printf("Received data:\n");
ee12b079 0:06ef97f5aa97 214 for(int i = 0;i< TX_DATA;i++ )
ee12b079 0:06ef97f5aa97 215 printf("%X\n",data[i]);*/
ee12b079 0:06ef97f5aa97 216
ee12b079 0:06ef97f5aa97 217
ee12b079 0:06ef97f5aa97 218 }
ee12b079 0:06ef97f5aa97 219 }
ee12b079 0:06ef97f5aa97 220 void copy_bit(uint8_t* a_byte,uint8_t* b_byte, uint8_t* count)
ee12b079 0:06ef97f5aa97 221 {
ee12b079 0:06ef97f5aa97 222
ee12b079 0:06ef97f5aa97 223 if(*a_byte & 0x80)
ee12b079 0:06ef97f5aa97 224 {*b_byte <<= 1;
ee12b079 0:06ef97f5aa97 225 *b_byte +=1;}
ee12b079 0:06ef97f5aa97 226 else *b_byte<<=1;
ee12b079 0:06ef97f5aa97 227 *a_byte<<=1;
ee12b079 0:06ef97f5aa97 228 (*count)++;
ee12b079 0:06ef97f5aa97 229
ee12b079 0:06ef97f5aa97 230 }
ee12b079 0:06ef97f5aa97 231 uint8_t read_byte(uint8_t* shift_in)
ee12b079 0:06ef97f5aa97 232 {uint8_t byte;
ee12b079 0:06ef97f5aa97 233 while((readreg(0x28) & 0x20) != 0x20);//will surely cause problem if not implemented
ee12b079 0:06ef97f5aa97 234 //pc.printf("waiting for fifo full\n");
ee12b079 0:06ef97f5aa97 235 cs_bar = 0;
ee12b079 0:06ef97f5aa97 236 spi.write(0x00);
ee12b079 0:06ef97f5aa97 237 byte = spi.write(0);
ee12b079 0:06ef97f5aa97 238 //byte = data[x++];
ee12b079 0:06ef97f5aa97 239 cs_bar = 1;
ee12b079 0:06ef97f5aa97 240 *shift_in=0;
ee12b079 0:06ef97f5aa97 241 //printf("byte read :0x%X \n",byte);
ee12b079 0:06ef97f5aa97 242 return byte;}
ee12b079 0:06ef97f5aa97 243
ee12b079 0:06ef97f5aa97 244 void attach_byte(uint8_t* a_byte,struct frame* t_frame,uint8_t* count,uint8_t* byte_no)
ee12b079 0:06ef97f5aa97 245 {t_frame->byte[(*byte_no)++] = *a_byte;*count=0;}
ee12b079 0:06ef97f5aa97 246
ee12b079 0:06ef97f5aa97 247 void attach_frame(struct frame* t_frame, struct frame* p_frame,uint8_t* frame_no,uint8_t* byte_no)
ee12b079 0:06ef97f5aa97 248 {*p_frame = *t_frame;
ee12b079 0:06ef97f5aa97 249 printf("byte_no = %d %X \n",*byte_no,p_frame->byte[(*byte_no-1)]);
ee12b079 0:06ef97f5aa97 250 //for(int i = 0; i<*byte_no;i++)
ee12b079 0:06ef97f5aa97 251 //printf("frame[%d][%d] = %X\n",*frame_no,i,p_frame->byte[i]);
ee12b079 0:06ef97f5aa97 252 *byte_no=0;
ee12b079 0:06ef97f5aa97 253 *t_frame = (const struct frame){ 0 };}
ee12b079 0:06ef97f5aa97 254
ee12b079 0:06ef97f5aa97 255 void scan_dstuff(uint8_t* fifo_byte,uint8_t* test_byte, uint8_t* flag,uint8_t* shift_in,uint8_t* dstuff_count)
ee12b079 0:06ef97f5aa97 256 {
ee12b079 0:06ef97f5aa97 257
ee12b079 0:06ef97f5aa97 258 if(*test_byte == 0x7E)//scan for flag
ee12b079 0:06ef97f5aa97 259 {*flag = 3;
ee12b079 0:06ef97f5aa97 260 return;}
ee12b079 0:06ef97f5aa97 261 if(((*test_byte) & 0xFC) == 0xF8)//destuff
ee12b079 0:06ef97f5aa97 262 {if(*shift_in == 8 ) *fifo_byte=read_byte(shift_in);
ee12b079 0:06ef97f5aa97 263 copy_bit(fifo_byte,test_byte,shift_in);
ee12b079 0:06ef97f5aa97 264 *test_byte = *test_byte | 0xF8;
ee12b079 0:06ef97f5aa97 265 *dstuff_count = 4;}
ee12b079 0:06ef97f5aa97 266
ee12b079 0:06ef97f5aa97 267
ee12b079 0:06ef97f5aa97 268 }
ee12b079 0:06ef97f5aa97 269 void post_flag(uint8_t* a_byte,uint8_t* b_byte,uint8_t *shift_in )
ee12b079 0:06ef97f5aa97 270 {
ee12b079 0:06ef97f5aa97 271
ee12b079 0:06ef97f5aa97 272 for(int i = 0 ; i < 8 ; i++)
ee12b079 0:06ef97f5aa97 273 {if(*shift_in == 8)
ee12b079 0:06ef97f5aa97 274 {*a_byte = read_byte(shift_in);}
ee12b079 0:06ef97f5aa97 275 copy_bit(a_byte,b_byte,shift_in);
ee12b079 0:06ef97f5aa97 276 }
ee12b079 0:06ef97f5aa97 277
ee12b079 0:06ef97f5aa97 278 }
ee12b079 0:06ef97f5aa97 279 void post_shift_out(uint8_t* fifo_byte,uint8_t* test_byte,uint8_t* shift_in)
ee12b079 0:06ef97f5aa97 280 {
ee12b079 0:06ef97f5aa97 281 if(*shift_in == 8 ) *fifo_byte=read_byte(shift_in);
ee12b079 0:06ef97f5aa97 282 if(*fifo_byte & 0x80)
ee12b079 0:06ef97f5aa97 283 *test_byte |= 0x01;
ee12b079 0:06ef97f5aa97 284 (*shift_in)++;
ee12b079 0:06ef97f5aa97 285 *fifo_byte <<= 1;
ee12b079 0:06ef97f5aa97 286 }
ee12b079 0:06ef97f5aa97 287
ee12b079 0:06ef97f5aa97 288