My controller identifies as an ILI9328, but only works if initialised as an ILI9325. This fork includes a fix to force 9325 initialization when a 9328 is detected.
Dependents: TouchScreenCalibrate TouchScreenGUIDemo
Fork of UniGraphic by
Protocols/I2C_bus.h@34:091b954c3205, 2020-06-21 (annotated)
- Committer:
- Duncan McIntyre
- Date:
- Sun Jun 21 15:23:02 2020 +0100
- Revision:
- 34:091b954c3205
Updated to include latest changes from upstream
Added a class to provide an interface for my MINI-STM32-V3.0 board.
This class uses direct GPIO access to achieve decent update speeds.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Duncan McIntyre |
34:091b954c3205 | 1 | #ifndef I2C_bus_H |
Duncan McIntyre |
34:091b954c3205 | 2 | #define I2C_bus_H |
Duncan McIntyre |
34:091b954c3205 | 3 | |
Duncan McIntyre |
34:091b954c3205 | 4 | #include "mbed.h" |
Duncan McIntyre |
34:091b954c3205 | 5 | #include "Protocols.h" |
Duncan McIntyre |
34:091b954c3205 | 6 | |
Duncan McIntyre |
34:091b954c3205 | 7 | /** I2C interface |
Duncan McIntyre |
34:091b954c3205 | 8 | */ |
Duncan McIntyre |
34:091b954c3205 | 9 | class I2C_bus : public Protocols |
Duncan McIntyre |
34:091b954c3205 | 10 | { |
Duncan McIntyre |
34:091b954c3205 | 11 | public: |
Duncan McIntyre |
34:091b954c3205 | 12 | |
Duncan McIntyre |
34:091b954c3205 | 13 | /** Create an I2C display interface |
Duncan McIntyre |
34:091b954c3205 | 14 | * |
Duncan McIntyre |
34:091b954c3205 | 15 | * @param I2C frquency |
Duncan McIntyre |
34:091b954c3205 | 16 | * @param I2C address |
Duncan McIntyre |
34:091b954c3205 | 17 | * @param I2C pin sda |
Duncan McIntyre |
34:091b954c3205 | 18 | * @param I2C pin scl |
Duncan McIntyre |
34:091b954c3205 | 19 | */ |
Duncan McIntyre |
34:091b954c3205 | 20 | I2C_bus(int Hz, int address,PinName sda, PinName scl); |
Duncan McIntyre |
34:091b954c3205 | 21 | |
Duncan McIntyre |
34:091b954c3205 | 22 | protected: |
Duncan McIntyre |
34:091b954c3205 | 23 | |
Duncan McIntyre |
34:091b954c3205 | 24 | /** Send 8bit command to display controller |
Duncan McIntyre |
34:091b954c3205 | 25 | * |
Duncan McIntyre |
34:091b954c3205 | 26 | * @param cmd: byte to send |
Duncan McIntyre |
34:091b954c3205 | 27 | * |
Duncan McIntyre |
34:091b954c3205 | 28 | */ |
Duncan McIntyre |
34:091b954c3205 | 29 | virtual void wr_cmd8(unsigned char cmd); |
Duncan McIntyre |
34:091b954c3205 | 30 | |
Duncan McIntyre |
34:091b954c3205 | 31 | /** Send 8bit data to display controller |
Duncan McIntyre |
34:091b954c3205 | 32 | * |
Duncan McIntyre |
34:091b954c3205 | 33 | * @param data: byte to send |
Duncan McIntyre |
34:091b954c3205 | 34 | * |
Duncan McIntyre |
34:091b954c3205 | 35 | */ |
Duncan McIntyre |
34:091b954c3205 | 36 | virtual void wr_data8(unsigned char data); |
Duncan McIntyre |
34:091b954c3205 | 37 | |
Duncan McIntyre |
34:091b954c3205 | 38 | /** Send 2x8bit command to display controller |
Duncan McIntyre |
34:091b954c3205 | 39 | * |
Duncan McIntyre |
34:091b954c3205 | 40 | * @param cmd: halfword to send |
Duncan McIntyre |
34:091b954c3205 | 41 | * @note in SPI_16 mode a single 16bit transfer will be done |
Duncan McIntyre |
34:091b954c3205 | 42 | */ |
Duncan McIntyre |
34:091b954c3205 | 43 | virtual void wr_cmd16(unsigned short cmd); |
Duncan McIntyre |
34:091b954c3205 | 44 | |
Duncan McIntyre |
34:091b954c3205 | 45 | /** Send 2x8bit data to display controller |
Duncan McIntyre |
34:091b954c3205 | 46 | * |
Duncan McIntyre |
34:091b954c3205 | 47 | * @param data: halfword to send |
Duncan McIntyre |
34:091b954c3205 | 48 | * @note in SPI_16 mode a single 16bit transfer will be done |
Duncan McIntyre |
34:091b954c3205 | 49 | */ |
Duncan McIntyre |
34:091b954c3205 | 50 | virtual void wr_data16(unsigned short data); |
Duncan McIntyre |
34:091b954c3205 | 51 | |
Duncan McIntyre |
34:091b954c3205 | 52 | /** Send 16bit pixeldata to display controller |
Duncan McIntyre |
34:091b954c3205 | 53 | * |
Duncan McIntyre |
34:091b954c3205 | 54 | * @param data: halfword to send |
Duncan McIntyre |
34:091b954c3205 | 55 | * |
Duncan McIntyre |
34:091b954c3205 | 56 | */ |
Duncan McIntyre |
34:091b954c3205 | 57 | virtual void wr_gram(unsigned short data); |
Duncan McIntyre |
34:091b954c3205 | 58 | |
Duncan McIntyre |
34:091b954c3205 | 59 | /** Send same 16bit pixeldata to display controller multiple times |
Duncan McIntyre |
34:091b954c3205 | 60 | * |
Duncan McIntyre |
34:091b954c3205 | 61 | * @param data: halfword to send |
Duncan McIntyre |
34:091b954c3205 | 62 | * @param count: how many |
Duncan McIntyre |
34:091b954c3205 | 63 | * |
Duncan McIntyre |
34:091b954c3205 | 64 | */ |
Duncan McIntyre |
34:091b954c3205 | 65 | virtual void wr_gram(unsigned short data, unsigned int count); |
Duncan McIntyre |
34:091b954c3205 | 66 | |
Duncan McIntyre |
34:091b954c3205 | 67 | /** Send array of pixeldata shorts to display controller |
Duncan McIntyre |
34:091b954c3205 | 68 | * |
Duncan McIntyre |
34:091b954c3205 | 69 | * @param data: unsigned short pixeldata array |
Duncan McIntyre |
34:091b954c3205 | 70 | * @param lenght: lenght (in shorts) |
Duncan McIntyre |
34:091b954c3205 | 71 | * |
Duncan McIntyre |
34:091b954c3205 | 72 | */ |
Duncan McIntyre |
34:091b954c3205 | 73 | virtual void wr_grambuf(unsigned short* data, unsigned int lenght); |
Duncan McIntyre |
34:091b954c3205 | 74 | |
Duncan McIntyre |
34:091b954c3205 | 75 | /** Read 16bit pixeldata from display controller (with dummy cycle) |
Duncan McIntyre |
34:091b954c3205 | 76 | * |
Duncan McIntyre |
34:091b954c3205 | 77 | * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit |
Duncan McIntyre |
34:091b954c3205 | 78 | * @returns 16bit color |
Duncan McIntyre |
34:091b954c3205 | 79 | */ |
Duncan McIntyre |
34:091b954c3205 | 80 | virtual unsigned short rd_gram(bool convert); |
Duncan McIntyre |
34:091b954c3205 | 81 | |
Duncan McIntyre |
34:091b954c3205 | 82 | /** Read 4x8bit register data ( |
Duncan McIntyre |
34:091b954c3205 | 83 | * reading from display ia I2C is not implemented in most controllers ! |
Duncan McIntyre |
34:091b954c3205 | 84 | * |
Duncan McIntyre |
34:091b954c3205 | 85 | */ |
Duncan McIntyre |
34:091b954c3205 | 86 | virtual unsigned int rd_reg_data32(unsigned char reg); |
Duncan McIntyre |
34:091b954c3205 | 87 | |
Duncan McIntyre |
34:091b954c3205 | 88 | /** Read 3x8bit ExtendedCommands register data |
Duncan McIntyre |
34:091b954c3205 | 89 | * reading from display ia I2C is not implemented in most controllers ! |
Duncan McIntyre |
34:091b954c3205 | 90 | */ |
Duncan McIntyre |
34:091b954c3205 | 91 | virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd); |
Duncan McIntyre |
34:091b954c3205 | 92 | |
Duncan McIntyre |
34:091b954c3205 | 93 | /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent |
Duncan McIntyre |
34:091b954c3205 | 94 | * reading from display ia I2C is not implemented in most controllers ! |
Duncan McIntyre |
34:091b954c3205 | 95 | */ |
Duncan McIntyre |
34:091b954c3205 | 96 | virtual void dummyread (); |
Duncan McIntyre |
34:091b954c3205 | 97 | |
Duncan McIntyre |
34:091b954c3205 | 98 | /** ILI932x specific, select register for a successive write or read |
Duncan McIntyre |
34:091b954c3205 | 99 | * |
Duncan McIntyre |
34:091b954c3205 | 100 | * reading from display ia I2C is not implemented in most controllers ! |
Duncan McIntyre |
34:091b954c3205 | 101 | */ |
Duncan McIntyre |
34:091b954c3205 | 102 | virtual void reg_select(unsigned char reg, bool forread =false); |
Duncan McIntyre |
34:091b954c3205 | 103 | |
Duncan McIntyre |
34:091b954c3205 | 104 | /** ILI932x specific, write register with data |
Duncan McIntyre |
34:091b954c3205 | 105 | * |
Duncan McIntyre |
34:091b954c3205 | 106 | * @param reg register to write |
Duncan McIntyre |
34:091b954c3205 | 107 | * @param data 16bit data |
Duncan McIntyre |
34:091b954c3205 | 108 | * not implemented for I2C ! |
Duncan McIntyre |
34:091b954c3205 | 109 | */ |
Duncan McIntyre |
34:091b954c3205 | 110 | virtual void reg_write(unsigned char reg, unsigned short data); |
Duncan McIntyre |
34:091b954c3205 | 111 | |
Duncan McIntyre |
34:091b954c3205 | 112 | /** ILI932x specific, read register |
Duncan McIntyre |
34:091b954c3205 | 113 | * |
Duncan McIntyre |
34:091b954c3205 | 114 | * @param reg register to be read |
Duncan McIntyre |
34:091b954c3205 | 115 | * @returns 16bit register value |
Duncan McIntyre |
34:091b954c3205 | 116 | * not implemented for I2C ! |
Duncan McIntyre |
34:091b954c3205 | 117 | */ |
Duncan McIntyre |
34:091b954c3205 | 118 | virtual unsigned short reg_read(unsigned char reg); |
Duncan McIntyre |
34:091b954c3205 | 119 | |
Duncan McIntyre |
34:091b954c3205 | 120 | /** HW reset sequence (without display init commands) |
Duncan McIntyre |
34:091b954c3205 | 121 | * most I2C displays have no reset signal ! |
Duncan McIntyre |
34:091b954c3205 | 122 | */ |
Duncan McIntyre |
34:091b954c3205 | 123 | virtual void hw_reset(); |
Duncan McIntyre |
34:091b954c3205 | 124 | |
Duncan McIntyre |
34:091b954c3205 | 125 | /** Set ChipSelect high or low |
Duncan McIntyre |
34:091b954c3205 | 126 | * @param enable 0/1 |
Duncan McIntyre |
34:091b954c3205 | 127 | * not implemented for I2C ! |
Duncan McIntyre |
34:091b954c3205 | 128 | */ |
Duncan McIntyre |
34:091b954c3205 | 129 | virtual void BusEnable(bool enable); |
Duncan McIntyre |
34:091b954c3205 | 130 | |
Duncan McIntyre |
34:091b954c3205 | 131 | private: |
Duncan McIntyre |
34:091b954c3205 | 132 | |
Duncan McIntyre |
34:091b954c3205 | 133 | I2C _i2c; |
Duncan McIntyre |
34:091b954c3205 | 134 | int _address; |
Duncan McIntyre |
34:091b954c3205 | 135 | |
Duncan McIntyre |
34:091b954c3205 | 136 | }; |
Duncan McIntyre |
34:091b954c3205 | 137 | |
Duncan McIntyre |
34:091b954c3205 | 138 | |
Duncan McIntyre |
34:091b954c3205 | 139 | #endif |