sx1261/2 driver
Dependents: alarm_slave iq_sx126x sx126x_simple_TX_shield_2020a sx126x_simple_RX_shield_2020a ... more
Driver for SX1261 or SX1262
Diff: sx12xx.h
- Revision:
- 8:66d3e344d61c
- Parent:
- 7:fe8c0186ee50
- Child:
- 9:34f1f2bbe7b3
--- a/sx12xx.h Fri Aug 17 17:20:24 2018 -0700 +++ b/sx12xx.h Tue Aug 21 14:19:26 2018 -0700 @@ -31,6 +31,7 @@ #define OPCODE_SET_TX 0x83 #define OPCODE_SET_SLEEP 0x84 #define OPCODE_SET_RF_FREQUENCY 0x86 +#define OPCODE_SET_CAD_PARAM 0x88 #define OPCODE_CALIBRATE 0x89 #define OPCODE_SET_PACKET_TYPE 0x8a #define OPCODE_SET_MODULATION_PARAMS 0x8b @@ -44,6 +45,7 @@ #define OPCODE_SET_LORA_SYMBOL_TIMEOUT 0xa0 #define OPCODE_GET_STATUS 0xc0 #define OPCODE_SET_FS 0xc1 +#define OPCODE_SET_CAD 0xc5 #define OPCODE_SET_TX_CARRIER 0xd1 #define OPCODE_SET_TX_PREAMBLE 0xd2 /***************************************************************/ @@ -86,7 +88,10 @@ #define REG_ADDR_LORA_CONFIG1 0x704 // 8bit ppm_offset, fixlen, invertiq, cr #define REG_ADDR_LORA_CONFIG2 0x705 // 8bit crcType #define REG_ADDR_LORA_IRQ_MASK 0x70a // 24bit +#define REG_ADDR_LORA_CONFIG9 0x724 // 8bit #define REG_ADDR_LORA_PREAMBLE_SYMBNB 0x73a // 16bit +#define REG_ADDR_LORA_CAD_PN_RATIO 0x73e // 8bit +#define REG_ADDR_LORA_CAD_MINPEAK 0x73f // 8bit #define REG_ADDR_LORA_SYNC 0x740 // config22, config23: frame sync peak position #define REG_ADDR_LORA_STATUS 0x76b // @@ -520,6 +525,7 @@ void setStandby(stby_t); void setSleep(bool warmStart, bool rtcWakeup); void setFS(void); + void setCAD(void); void setBufferBase(uint8_t txAddr, uint8_t rxAddr); static Callback<void()> dio1_topHalf; // low latency ISR context @@ -528,6 +534,7 @@ Callback<void()> chipModeChange; // read chipMode_e chipMode void (*rxDone)(uint8_t size, float rssi, float snr); // user context void (*timeout)(bool tx); // user context + void (*cadDone)(bool detected); // user context //! RF transmit packet buffer uint8_t tx_buf[256]; // lora fifo size