wayne roberts / sx126x

sx1261/2 driver

Dependents:   alarm_slave iq_sx126x sx126x_simple_TX_shield_2020a sx126x_simple_RX_shield_2020a ... more

Driver for SX1261 or SX1262

sx126x.cpp@3:f6f2f8adcd22, 2018-07-03 (annotated)

Committer:
Wayne Roberts
Date:
Tue Jul 03 15:38:55 2018 -0700
Revision:
3:f6f2f8adcd22
Parent:
2:e6e159c8ab4d
Child:
4:b941bceb401d
add getPacketType

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Wayne Roberts 1:497af0bd9e53 1 #include "sx12xx.h"
Wayne Roberts 0:c79a1f70c110 2
Wayne Roberts 0:c79a1f70c110 3 Callback<void()> SX126x::dio1_topHalf; // low latency ISR context
Wayne Roberts 0:c79a1f70c110 4
Wayne Roberts 0:c79a1f70c110 5 void SX126x::dio1isr()
Wayne Roberts 0:c79a1f70c110 6 {
Wayne Roberts 0:c79a1f70c110 7 if (dio1_topHalf)
Wayne Roberts 0:c79a1f70c110 8 dio1_topHalf.call();
Wayne Roberts 0:c79a1f70c110 9 }
Wayne Roberts 0:c79a1f70c110 10
Wayne Roberts 0:c79a1f70c110 11 SX126x::SX126x(SPI& _spi, PinName _nss, PinName _busy, PinName _dio1)
Wayne Roberts 0:c79a1f70c110 12 : spi(_spi), nss(_nss), busy(_busy), dio1(_dio1)
Wayne Roberts 0:c79a1f70c110 13 {
Wayne Roberts 0:c79a1f70c110 14 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 15 IrqFlags_t irqEnable;
Wayne Roberts 0:c79a1f70c110 16
Wayne Roberts 1:497af0bd9e53 17 nss = 1;
Wayne Roberts 1:497af0bd9e53 18
Wayne Roberts 1:497af0bd9e53 19 dio1.rise(dio1isr);
Wayne Roberts 1:497af0bd9e53 20
Wayne Roberts 1:497af0bd9e53 21
Wayne Roberts 0:c79a1f70c110 22 irqEnable.word = 0;
Wayne Roberts 0:c79a1f70c110 23 irqEnable.bits.TxDone = 1;
Wayne Roberts 0:c79a1f70c110 24 irqEnable.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 25 irqEnable.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 26
Wayne Roberts 0:c79a1f70c110 27 buf[0] = irqEnable.word >> 8; // enable bits
Wayne Roberts 0:c79a1f70c110 28 buf[1] = irqEnable.word; // enable bits
Wayne Roberts 0:c79a1f70c110 29 buf[2] = irqEnable.word >> 8; // dio1
Wayne Roberts 0:c79a1f70c110 30 buf[3] = irqEnable.word; // dio1
Wayne Roberts 0:c79a1f70c110 31 buf[4] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 32 buf[5] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 33 buf[6] = 0; // dio3
Wayne Roberts 0:c79a1f70c110 34 buf[7] = 0; // dio3
Wayne Roberts 2:e6e159c8ab4d 35 xfer(OPCODE_SET_DIO_IRQ_PARAMS, 8, 0, buf);
Wayne Roberts 0:c79a1f70c110 36
Wayne Roberts 0:c79a1f70c110 37 }
Wayne Roberts 0:c79a1f70c110 38
Wayne Roberts 0:c79a1f70c110 39 void SX126x::PrintChipStatus(status_t status)
Wayne Roberts 0:c79a1f70c110 40 {
Wayne Roberts 0:c79a1f70c110 41 printf("%02x cmdStatus:", status.octet);
Wayne Roberts 0:c79a1f70c110 42 switch (status.bits.cmdStatus) {
Wayne Roberts 0:c79a1f70c110 43 case 0: printf("Reserved"); break;
Wayne Roberts 0:c79a1f70c110 44 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 45 case 2: printf("dataAvail"); break;
Wayne Roberts 0:c79a1f70c110 46 case 3: printf("cmdTimeout"); break;
Wayne Roberts 0:c79a1f70c110 47 case 4: printf("cmdError"); break;
Wayne Roberts 0:c79a1f70c110 48 case 5: printf("execFail"); break;
Wayne Roberts 0:c79a1f70c110 49 case 6: printf("cmdTxDone"); break;
Wayne Roberts 0:c79a1f70c110 50 }
Wayne Roberts 0:c79a1f70c110 51 printf(" chipMode:");
Wayne Roberts 0:c79a1f70c110 52 switch (status.bits.chipMode) {
Wayne Roberts 0:c79a1f70c110 53 case 0: printf("Unused"); break;
Wayne Roberts 0:c79a1f70c110 54 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 55 case 2: printf("STBY_RC"); break;
Wayne Roberts 0:c79a1f70c110 56 case 3: printf("STBY_XOSC"); break;
Wayne Roberts 0:c79a1f70c110 57 case 4: printf("FS"); break;
Wayne Roberts 0:c79a1f70c110 58 case 5: printf("RX"); break;
Wayne Roberts 0:c79a1f70c110 59 case 6: printf("TX"); break;
Wayne Roberts 0:c79a1f70c110 60 }
Wayne Roberts 0:c79a1f70c110 61 printf("\r\n");
Wayne Roberts 0:c79a1f70c110 62 }
Wayne Roberts 0:c79a1f70c110 63
Wayne Roberts 2:e6e159c8ab4d 64 extern RawSerial pc;
Wayne Roberts 0:c79a1f70c110 65 void SX126x::service()
Wayne Roberts 0:c79a1f70c110 66 {
Wayne Roberts 0:c79a1f70c110 67 IrqFlags_t irqFlags, clearIrqFlags;
Wayne Roberts 0:c79a1f70c110 68 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 69
Wayne Roberts 2:e6e159c8ab4d 70 if (busy) {
Wayne Roberts 0:c79a1f70c110 71 return;
Wayne Roberts 2:e6e159c8ab4d 72 }
Wayne Roberts 0:c79a1f70c110 73
Wayne Roberts 0:c79a1f70c110 74 while (dio1) {
Wayne Roberts 2:e6e159c8ab4d 75 xfer(OPCODE_GET_IRQ_STATUS, 0, 3, buf);
Wayne Roberts 0:c79a1f70c110 76 irqFlags.word = buf[1] << 8;
Wayne Roberts 0:c79a1f70c110 77 irqFlags.word |= buf[2];
Wayne Roberts 0:c79a1f70c110 78 clearIrqFlags.word = 0;
Wayne Roberts 0:c79a1f70c110 79 if (irqFlags.bits.TxDone) {
Wayne Roberts 0:c79a1f70c110 80 if (txDone)
Wayne Roberts 0:c79a1f70c110 81 txDone.call();
Wayne Roberts 0:c79a1f70c110 82 clearIrqFlags.bits.TxDone = 1;
Wayne Roberts 1:497af0bd9e53 83 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 84 }
Wayne Roberts 0:c79a1f70c110 85 if (irqFlags.bits.RxDone) {
Wayne Roberts 0:c79a1f70c110 86 if (rxDone) {
Wayne Roberts 0:c79a1f70c110 87 uint8_t len;
Wayne Roberts 0:c79a1f70c110 88 float snr, rssi;
Wayne Roberts 0:c79a1f70c110 89 int8_t s;
Wayne Roberts 2:e6e159c8ab4d 90 xfer(OPCODE_GET_RX_BUFFER_STATUS, 0, 3, buf);
Wayne Roberts 0:c79a1f70c110 91 len = buf[1];
Wayne Roberts 2:e6e159c8ab4d 92 ReadBuffer(len, buf[2]);
Wayne Roberts 2:e6e159c8ab4d 93 xfer(OPCODE_GET_PACKET_STATUS, 0, 4, buf);
Wayne Roberts 0:c79a1f70c110 94 rssi = -buf[1] / 2.0; // TODO FSK
Wayne Roberts 0:c79a1f70c110 95 s = buf[2];
Wayne Roberts 0:c79a1f70c110 96 snr = s / 4.0;
Wayne Roberts 0:c79a1f70c110 97 rxDone(len, rssi, snr);
Wayne Roberts 0:c79a1f70c110 98 }
Wayne Roberts 0:c79a1f70c110 99 clearIrqFlags.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 100 }
Wayne Roberts 0:c79a1f70c110 101 if (irqFlags.bits.Timeout) {
Wayne Roberts 1:497af0bd9e53 102 if (chipMode != CHIPMODE_NONE) {
Wayne Roberts 1:497af0bd9e53 103 if (timeout)
Wayne Roberts 1:497af0bd9e53 104 timeout(chipMode == CHIPMODE_TX);
Wayne Roberts 1:497af0bd9e53 105 }
Wayne Roberts 1:497af0bd9e53 106 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 107 clearIrqFlags.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 108 }
Wayne Roberts 0:c79a1f70c110 109
Wayne Roberts 0:c79a1f70c110 110 if (clearIrqFlags.word != 0) {
Wayne Roberts 0:c79a1f70c110 111 buf[0] = clearIrqFlags.word >> 8;
Wayne Roberts 0:c79a1f70c110 112 buf[1] = (uint8_t)clearIrqFlags.word;
Wayne Roberts 2:e6e159c8ab4d 113 xfer(OPCODE_CLEAR_IRQ_STATUS, 2, 0, buf);
Wayne Roberts 0:c79a1f70c110 114 }
Wayne Roberts 0:c79a1f70c110 115
Wayne Roberts 0:c79a1f70c110 116 } // ...while (dio1)
Wayne Roberts 0:c79a1f70c110 117
Wayne Roberts 0:c79a1f70c110 118 } // ..service()
Wayne Roberts 0:c79a1f70c110 119
Wayne Roberts 2:e6e159c8ab4d 120 void SX126x::xfer(uint8_t opcode, uint8_t wlen, uint8_t rlen, uint8_t* ptr)
Wayne Roberts 0:c79a1f70c110 121 {
Wayne Roberts 2:e6e159c8ab4d 122 const uint8_t* stopPtr;
Wayne Roberts 2:e6e159c8ab4d 123 const uint8_t* wstop;
Wayne Roberts 2:e6e159c8ab4d 124 const uint8_t* rstop;
Wayne Roberts 2:e6e159c8ab4d 125 uint8_t nop = 0;
Wayne Roberts 2:e6e159c8ab4d 126
Wayne Roberts 0:c79a1f70c110 127 if (sleeping) {
Wayne Roberts 0:c79a1f70c110 128 nss = 0;
Wayne Roberts 0:c79a1f70c110 129 while (busy)
Wayne Roberts 0:c79a1f70c110 130 ;
Wayne Roberts 0:c79a1f70c110 131 sleeping = false;
Wayne Roberts 0:c79a1f70c110 132 } else {
Wayne Roberts 2:e6e159c8ab4d 133 while (busy)
Wayne Roberts 2:e6e159c8ab4d 134 ;
Wayne Roberts 0:c79a1f70c110 135 nss = 0;
Wayne Roberts 0:c79a1f70c110 136 }
Wayne Roberts 0:c79a1f70c110 137
Wayne Roberts 0:c79a1f70c110 138 spi.write(opcode);
Wayne Roberts 2:e6e159c8ab4d 139
Wayne Roberts 2:e6e159c8ab4d 140 wstop = ptr + wlen;
Wayne Roberts 2:e6e159c8ab4d 141 rstop = ptr + rlen;
Wayne Roberts 2:e6e159c8ab4d 142 if (rlen > wlen)
Wayne Roberts 2:e6e159c8ab4d 143 stopPtr = rstop;
Wayne Roberts 2:e6e159c8ab4d 144 else
Wayne Roberts 2:e6e159c8ab4d 145 stopPtr = wstop;
Wayne Roberts 2:e6e159c8ab4d 146
Wayne Roberts 2:e6e159c8ab4d 147 for (; ptr < stopPtr; ptr++) {
Wayne Roberts 2:e6e159c8ab4d 148 if (ptr < wstop && ptr < rstop)
Wayne Roberts 2:e6e159c8ab4d 149 *ptr = spi.write(*ptr);
Wayne Roberts 2:e6e159c8ab4d 150 else if (ptr < wstop)
Wayne Roberts 2:e6e159c8ab4d 151 spi.write(*ptr);
Wayne Roberts 2:e6e159c8ab4d 152 else
Wayne Roberts 2:e6e159c8ab4d 153 *ptr = spi.write(nop); // n >= write length: send NOP
Wayne Roberts 0:c79a1f70c110 154 }
Wayne Roberts 0:c79a1f70c110 155
Wayne Roberts 0:c79a1f70c110 156 nss = 1;
Wayne Roberts 0:c79a1f70c110 157
Wayne Roberts 0:c79a1f70c110 158 if (opcode == OPCODE_SET_SLEEP)
Wayne Roberts 0:c79a1f70c110 159 sleeping = true;
Wayne Roberts 0:c79a1f70c110 160 }
Wayne Roberts 0:c79a1f70c110 161
Wayne Roberts 0:c79a1f70c110 162 void SX126x::start_tx(uint8_t pktLen)
Wayne Roberts 0:c79a1f70c110 163 {
Wayne Roberts 0:c79a1f70c110 164 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 165
Wayne Roberts 0:c79a1f70c110 166 {
Wayne Roberts 0:c79a1f70c110 167 uint8_t i;
Wayne Roberts 0:c79a1f70c110 168
Wayne Roberts 0:c79a1f70c110 169 while (busy)
Wayne Roberts 0:c79a1f70c110 170 ;
Wayne Roberts 0:c79a1f70c110 171
Wayne Roberts 0:c79a1f70c110 172 nss = 0;
Wayne Roberts 0:c79a1f70c110 173 spi.write(OPCODE_WRITE_BUFFER);
Wayne Roberts 0:c79a1f70c110 174 spi.write(0); // offset
Wayne Roberts 0:c79a1f70c110 175 i = 0;
Wayne Roberts 0:c79a1f70c110 176 for (i = 0; i < pktLen; i++) {
Wayne Roberts 0:c79a1f70c110 177 spi.write(tx_buf[i]);
Wayne Roberts 0:c79a1f70c110 178 }
Wayne Roberts 0:c79a1f70c110 179 nss = 1;
Wayne Roberts 0:c79a1f70c110 180 }
Wayne Roberts 0:c79a1f70c110 181
Wayne Roberts 0:c79a1f70c110 182 buf[0] = 0x40;
Wayne Roberts 0:c79a1f70c110 183 buf[1] = 0x00;
Wayne Roberts 0:c79a1f70c110 184 buf[2] = 0x00;
Wayne Roberts 2:e6e159c8ab4d 185 xfer(OPCODE_SET_TX, 3, 0, buf);
Wayne Roberts 1:497af0bd9e53 186
Wayne Roberts 1:497af0bd9e53 187 chipMode = CHIPMODE_TX;
Wayne Roberts 0:c79a1f70c110 188 }
Wayne Roberts 0:c79a1f70c110 189
Wayne Roberts 0:c79a1f70c110 190 void SX126x::start_rx(unsigned timeout)
Wayne Roberts 0:c79a1f70c110 191 {
Wayne Roberts 0:c79a1f70c110 192 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 193
Wayne Roberts 0:c79a1f70c110 194 buf[0] = timeout >> 16;
Wayne Roberts 0:c79a1f70c110 195 buf[1] = timeout >> 8;
Wayne Roberts 0:c79a1f70c110 196 buf[2] = timeout;
Wayne Roberts 2:e6e159c8ab4d 197 xfer(OPCODE_SET_RX, 3, 0, buf);
Wayne Roberts 1:497af0bd9e53 198
Wayne Roberts 1:497af0bd9e53 199 chipMode = CHIPMODE_RX;
Wayne Roberts 0:c79a1f70c110 200 }
Wayne Roberts 0:c79a1f70c110 201
Wayne Roberts 0:c79a1f70c110 202 uint8_t SX126x::setMHz(float MHz)
Wayne Roberts 0:c79a1f70c110 203 {
Wayne Roberts 0:c79a1f70c110 204 unsigned frf = MHz * MHZ_TO_FRF;
Wayne Roberts 0:c79a1f70c110 205 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 206
Wayne Roberts 0:c79a1f70c110 207 buf[0] = frf >> 24;
Wayne Roberts 0:c79a1f70c110 208 buf[1] = frf >> 16;
Wayne Roberts 0:c79a1f70c110 209 buf[2] = frf >> 8;
Wayne Roberts 0:c79a1f70c110 210 buf[3] = frf;
Wayne Roberts 2:e6e159c8ab4d 211 xfer(OPCODE_SET_RF_FREQUENCY, 4, 0, buf);
Wayne Roberts 0:c79a1f70c110 212 return buf[3];
Wayne Roberts 0:c79a1f70c110 213 }
Wayne Roberts 0:c79a1f70c110 214
Wayne Roberts 2:e6e159c8ab4d 215 float SX126x::getMHz()
Wayne Roberts 2:e6e159c8ab4d 216 {
Wayne Roberts 2:e6e159c8ab4d 217 uint32_t frf = readReg(REG_ADDR_RFFREQ, 4);
Wayne Roberts 2:e6e159c8ab4d 218 return frf / (float)MHZ_TO_FRF;
Wayne Roberts 2:e6e159c8ab4d 219 }
Wayne Roberts 2:e6e159c8ab4d 220
Wayne Roberts 0:c79a1f70c110 221 void SX126x::setPacketType(uint8_t type)
Wayne Roberts 0:c79a1f70c110 222 {
Wayne Roberts 2:e6e159c8ab4d 223 xfer(OPCODE_SET_PACKET_TYPE, 1, 0, &type);
Wayne Roberts 0:c79a1f70c110 224 }
Wayne Roberts 0:c79a1f70c110 225
Wayne Roberts 3:f6f2f8adcd22 226 uint8_t SX126x::getPacketType()
Wayne Roberts 3:f6f2f8adcd22 227 {
Wayne Roberts 3:f6f2f8adcd22 228 uint8_t buf[2];
Wayne Roberts 3:f6f2f8adcd22 229 xfer(OPCODE_GET_PACKET_TYPE, 0, 2, buf);
Wayne Roberts 3:f6f2f8adcd22 230 return buf[1];
Wayne Roberts 3:f6f2f8adcd22 231 }
Wayne Roberts 3:f6f2f8adcd22 232
Wayne Roberts 0:c79a1f70c110 233 void SX126x::SetDIO2AsRfSwitchCtrl(uint8_t en)
Wayne Roberts 0:c79a1f70c110 234 {
Wayne Roberts 2:e6e159c8ab4d 235 xfer(OPCODE_SET_DIO2_AS_RFSWITCH, 1, 0, &en);
Wayne Roberts 0:c79a1f70c110 236 }
Wayne Roberts 0:c79a1f70c110 237
Wayne Roberts 2:e6e159c8ab4d 238 void SX126x::ReadBuffer(uint8_t size, uint8_t offset)
Wayne Roberts 0:c79a1f70c110 239 {
Wayne Roberts 0:c79a1f70c110 240 unsigned i;
Wayne Roberts 0:c79a1f70c110 241 while (busy)
Wayne Roberts 0:c79a1f70c110 242 ;
Wayne Roberts 0:c79a1f70c110 243
Wayne Roberts 0:c79a1f70c110 244 nss = 0;
Wayne Roberts 0:c79a1f70c110 245
Wayne Roberts 0:c79a1f70c110 246 spi.write(OPCODE_READ_BUFFER);
Wayne Roberts 2:e6e159c8ab4d 247 spi.write(offset);
Wayne Roberts 0:c79a1f70c110 248 spi.write(0); // NOP
Wayne Roberts 0:c79a1f70c110 249 i = 0;
Wayne Roberts 0:c79a1f70c110 250 for (i = 0; i < size; i++) {
Wayne Roberts 0:c79a1f70c110 251 rx_buf[i] = spi.write(0);
Wayne Roberts 0:c79a1f70c110 252 }
Wayne Roberts 0:c79a1f70c110 253
Wayne Roberts 0:c79a1f70c110 254 nss = 1;
Wayne Roberts 0:c79a1f70c110 255 }
Wayne Roberts 0:c79a1f70c110 256
Wayne Roberts 0:c79a1f70c110 257 void SX126x::set_tx_dbm(bool is1262, int8_t dbm)
Wayne Roberts 0:c79a1f70c110 258 {
Wayne Roberts 0:c79a1f70c110 259 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 260 // use OCP default
Wayne Roberts 0:c79a1f70c110 261
Wayne Roberts 0:c79a1f70c110 262 buf[3] = 1;
Wayne Roberts 0:c79a1f70c110 263 if (is1262) {
Wayne Roberts 0:c79a1f70c110 264 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 265 buf[1] = 7;
Wayne Roberts 0:c79a1f70c110 266 buf[2] = 0;
Wayne Roberts 0:c79a1f70c110 267
Wayne Roberts 0:c79a1f70c110 268 if (dbm > 22)
Wayne Roberts 0:c79a1f70c110 269 dbm = 22;
Wayne Roberts 0:c79a1f70c110 270 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 271 dbm = -3;
Wayne Roberts 0:c79a1f70c110 272 } else {
Wayne Roberts 0:c79a1f70c110 273 if (dbm == 15)
Wayne Roberts 0:c79a1f70c110 274 buf[0] = 6;
Wayne Roberts 0:c79a1f70c110 275 else
Wayne Roberts 0:c79a1f70c110 276 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 277 buf[1] = 0;
Wayne Roberts 0:c79a1f70c110 278 buf[2] = 1;
Wayne Roberts 0:c79a1f70c110 279
Wayne Roberts 0:c79a1f70c110 280 if (dbm > 14)
Wayne Roberts 0:c79a1f70c110 281 dbm = 14;
Wayne Roberts 0:c79a1f70c110 282 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 283 dbm = -3;
Wayne Roberts 0:c79a1f70c110 284 }
Wayne Roberts 2:e6e159c8ab4d 285 xfer(OPCODE_SET_PA_CONFIG, 4, 0, buf);
Wayne Roberts 0:c79a1f70c110 286
Wayne Roberts 0:c79a1f70c110 287 if (is1262 && dbm > 18) {
Wayne Roberts 0:c79a1f70c110 288 /* OCP is set by chip whenever SetPaConfig() is called */
Wayne Roberts 0:c79a1f70c110 289 writeReg(REG_ADDR_OCP, 0x38, 1);
Wayne Roberts 0:c79a1f70c110 290 }
Wayne Roberts 0:c79a1f70c110 291
Wayne Roberts 0:c79a1f70c110 292 // SetTxParams
Wayne Roberts 0:c79a1f70c110 293 buf[0] = dbm;
Wayne Roberts 0:c79a1f70c110 294 //if (opt == 0) txco
Wayne Roberts 0:c79a1f70c110 295 buf[1] = SET_RAMP_200U;
Wayne Roberts 2:e6e159c8ab4d 296 xfer(OPCODE_SET_TX_PARAMS, 2, 0, buf);
Wayne Roberts 0:c79a1f70c110 297 }
Wayne Roberts 0:c79a1f70c110 298
Wayne Roberts 0:c79a1f70c110 299 void SX126x::writeReg(uint16_t addr, uint32_t data, uint8_t len)
Wayne Roberts 0:c79a1f70c110 300 {
Wayne Roberts 0:c79a1f70c110 301 uint8_t buf[6];
Wayne Roberts 0:c79a1f70c110 302 uint8_t n;
Wayne Roberts 0:c79a1f70c110 303 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 304 buf[1] = (uint8_t)addr;
Wayne Roberts 0:c79a1f70c110 305 for (n = len; n > 0; n--) {
Wayne Roberts 0:c79a1f70c110 306 buf[n+1] = (uint8_t)data;
Wayne Roberts 0:c79a1f70c110 307 data >>= 8;
Wayne Roberts 0:c79a1f70c110 308 }
Wayne Roberts 2:e6e159c8ab4d 309 xfer(OPCODE_WRITE_REGISTER, 2+len, 2+len, buf);
Wayne Roberts 0:c79a1f70c110 310 }
Wayne Roberts 0:c79a1f70c110 311
Wayne Roberts 0:c79a1f70c110 312 void SX126x::setStandby(stby_t stby)
Wayne Roberts 0:c79a1f70c110 313 {
Wayne Roberts 0:c79a1f70c110 314 uint8_t octet = stby;
Wayne Roberts 2:e6e159c8ab4d 315 xfer(OPCODE_SET_STANDBY, 1, 0, &octet);
Wayne Roberts 1:497af0bd9e53 316
Wayne Roberts 1:497af0bd9e53 317 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 318 }
Wayne Roberts 0:c79a1f70c110 319
Wayne Roberts 0:c79a1f70c110 320 void SX126x::setSleep(bool warmStart, bool rtcWakeup)
Wayne Roberts 0:c79a1f70c110 321 {
Wayne Roberts 0:c79a1f70c110 322 sleepConfig_t sc;
Wayne Roberts 0:c79a1f70c110 323
Wayne Roberts 0:c79a1f70c110 324 sc.octet = 0;
Wayne Roberts 0:c79a1f70c110 325 sc.bits.rtcWakeup = rtcWakeup;
Wayne Roberts 0:c79a1f70c110 326 sc.bits.warmStart = warmStart;
Wayne Roberts 2:e6e159c8ab4d 327 xfer(OPCODE_SET_SLEEP, 1, 0, &sc.octet);
Wayne Roberts 1:497af0bd9e53 328
Wayne Roberts 1:497af0bd9e53 329 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 330 }
Wayne Roberts 0:c79a1f70c110 331
Wayne Roberts 0:c79a1f70c110 332 void SX126x::hw_reset(PinName pin)
Wayne Roberts 0:c79a1f70c110 333 {
Wayne Roberts 0:c79a1f70c110 334 DigitalInOut nrst(pin);
Wayne Roberts 0:c79a1f70c110 335 nrst.output();
Wayne Roberts 0:c79a1f70c110 336 nrst = 0;
Wayne Roberts 0:c79a1f70c110 337 wait_us(100);
Wayne Roberts 0:c79a1f70c110 338 nrst = 1;
Wayne Roberts 0:c79a1f70c110 339 nrst.mode(PullUp);
Wayne Roberts 0:c79a1f70c110 340 nrst.input();
Wayne Roberts 0:c79a1f70c110 341
Wayne Roberts 0:c79a1f70c110 342 while (busy)
Wayne Roberts 0:c79a1f70c110 343 ;
Wayne Roberts 0:c79a1f70c110 344 }
Wayne Roberts 0:c79a1f70c110 345
Wayne Roberts 0:c79a1f70c110 346 uint32_t SX126x::readReg(uint16_t addr, uint8_t len)
Wayne Roberts 0:c79a1f70c110 347 {
Wayne Roberts 0:c79a1f70c110 348 uint32_t ret = 0;
Wayne Roberts 0:c79a1f70c110 349 unsigned i;
Wayne Roberts 0:c79a1f70c110 350
Wayne Roberts 0:c79a1f70c110 351 uint8_t buf[7];
Wayne Roberts 0:c79a1f70c110 352 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 353 buf[1] = (uint8_t)addr;
Wayne Roberts 2:e6e159c8ab4d 354 xfer(OPCODE_READ_REGISTER, 2, 3+len, buf);
Wayne Roberts 0:c79a1f70c110 355 for (i = 0; i < len; i++) {
Wayne Roberts 0:c79a1f70c110 356 ret <<= 8;
Wayne Roberts 0:c79a1f70c110 357 ret |= buf[i+3];
Wayne Roberts 0:c79a1f70c110 358 }
Wayne Roberts 0:c79a1f70c110 359 return ret;
Wayne Roberts 0:c79a1f70c110 360 }
Wayne Roberts 0:c79a1f70c110 361