sx1261/2 driver

Dependents:   alarm_slave iq_sx126x sx126x_simple_TX_shield_2020a sx126x_simple_RX_shield_2020a ... more

Driver for SX1261 or SX1262

Committer:
Wayne Roberts
Date:
Tue Aug 21 14:19:26 2018 -0700
Revision:
8:66d3e344d61c
Parent:
5:8b75387af4e0
Child:
10:8905722dd5e6
add CAD function

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Wayne Roberts 1:497af0bd9e53 1 #include "sx12xx.h"
Wayne Roberts 0:c79a1f70c110 2
Wayne Roberts 0:c79a1f70c110 3 Callback<void()> SX126x::dio1_topHalf; // low latency ISR context
Wayne Roberts 0:c79a1f70c110 4
Wayne Roberts 0:c79a1f70c110 5 void SX126x::dio1isr()
Wayne Roberts 0:c79a1f70c110 6 {
Wayne Roberts 0:c79a1f70c110 7 if (dio1_topHalf)
Wayne Roberts 0:c79a1f70c110 8 dio1_topHalf.call();
Wayne Roberts 0:c79a1f70c110 9 }
Wayne Roberts 0:c79a1f70c110 10
Wayne Roberts 0:c79a1f70c110 11 SX126x::SX126x(SPI& _spi, PinName _nss, PinName _busy, PinName _dio1)
Wayne Roberts 0:c79a1f70c110 12 : spi(_spi), nss(_nss), busy(_busy), dio1(_dio1)
Wayne Roberts 0:c79a1f70c110 13 {
Wayne Roberts 0:c79a1f70c110 14 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 15 IrqFlags_t irqEnable;
Wayne Roberts 0:c79a1f70c110 16
Wayne Roberts 1:497af0bd9e53 17 nss = 1;
Wayne Roberts 1:497af0bd9e53 18
Wayne Roberts 1:497af0bd9e53 19 dio1.rise(dio1isr);
Wayne Roberts 1:497af0bd9e53 20
Wayne Roberts 1:497af0bd9e53 21
Wayne Roberts 0:c79a1f70c110 22 irqEnable.word = 0;
Wayne Roberts 0:c79a1f70c110 23 irqEnable.bits.TxDone = 1;
Wayne Roberts 0:c79a1f70c110 24 irqEnable.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 25 irqEnable.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 26
Wayne Roberts 0:c79a1f70c110 27 buf[0] = irqEnable.word >> 8; // enable bits
Wayne Roberts 0:c79a1f70c110 28 buf[1] = irqEnable.word; // enable bits
Wayne Roberts 0:c79a1f70c110 29 buf[2] = irqEnable.word >> 8; // dio1
Wayne Roberts 0:c79a1f70c110 30 buf[3] = irqEnable.word; // dio1
Wayne Roberts 0:c79a1f70c110 31 buf[4] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 32 buf[5] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 33 buf[6] = 0; // dio3
Wayne Roberts 0:c79a1f70c110 34 buf[7] = 0; // dio3
Wayne Roberts 2:e6e159c8ab4d 35 xfer(OPCODE_SET_DIO_IRQ_PARAMS, 8, 0, buf);
Wayne Roberts 0:c79a1f70c110 36
Wayne Roberts 0:c79a1f70c110 37 }
Wayne Roberts 0:c79a1f70c110 38
Wayne Roberts 0:c79a1f70c110 39 void SX126x::PrintChipStatus(status_t status)
Wayne Roberts 0:c79a1f70c110 40 {
Wayne Roberts 0:c79a1f70c110 41 printf("%02x cmdStatus:", status.octet);
Wayne Roberts 0:c79a1f70c110 42 switch (status.bits.cmdStatus) {
Wayne Roberts 0:c79a1f70c110 43 case 0: printf("Reserved"); break;
Wayne Roberts 0:c79a1f70c110 44 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 45 case 2: printf("dataAvail"); break;
Wayne Roberts 0:c79a1f70c110 46 case 3: printf("cmdTimeout"); break;
Wayne Roberts 0:c79a1f70c110 47 case 4: printf("cmdError"); break;
Wayne Roberts 0:c79a1f70c110 48 case 5: printf("execFail"); break;
Wayne Roberts 0:c79a1f70c110 49 case 6: printf("cmdTxDone"); break;
Wayne Roberts 0:c79a1f70c110 50 }
Wayne Roberts 0:c79a1f70c110 51 printf(" chipMode:");
Wayne Roberts 0:c79a1f70c110 52 switch (status.bits.chipMode) {
Wayne Roberts 0:c79a1f70c110 53 case 0: printf("Unused"); break;
Wayne Roberts 0:c79a1f70c110 54 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 55 case 2: printf("STBY_RC"); break;
Wayne Roberts 0:c79a1f70c110 56 case 3: printf("STBY_XOSC"); break;
Wayne Roberts 0:c79a1f70c110 57 case 4: printf("FS"); break;
Wayne Roberts 0:c79a1f70c110 58 case 5: printf("RX"); break;
Wayne Roberts 0:c79a1f70c110 59 case 6: printf("TX"); break;
Wayne Roberts 0:c79a1f70c110 60 }
Wayne Roberts 0:c79a1f70c110 61 printf("\r\n");
Wayne Roberts 0:c79a1f70c110 62 }
Wayne Roberts 0:c79a1f70c110 63
Wayne Roberts 0:c79a1f70c110 64 void SX126x::service()
Wayne Roberts 0:c79a1f70c110 65 {
Wayne Roberts 0:c79a1f70c110 66 IrqFlags_t irqFlags, clearIrqFlags;
Wayne Roberts 0:c79a1f70c110 67 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 68
Wayne Roberts 2:e6e159c8ab4d 69 if (busy) {
Wayne Roberts 0:c79a1f70c110 70 return;
Wayne Roberts 2:e6e159c8ab4d 71 }
Wayne Roberts 0:c79a1f70c110 72
Wayne Roberts 0:c79a1f70c110 73 while (dio1) {
Wayne Roberts 2:e6e159c8ab4d 74 xfer(OPCODE_GET_IRQ_STATUS, 0, 3, buf);
Wayne Roberts 0:c79a1f70c110 75 irqFlags.word = buf[1] << 8;
Wayne Roberts 0:c79a1f70c110 76 irqFlags.word |= buf[2];
Wayne Roberts 0:c79a1f70c110 77 clearIrqFlags.word = 0;
Wayne Roberts 0:c79a1f70c110 78 if (irqFlags.bits.TxDone) {
Wayne Roberts 5:8b75387af4e0 79 chipMode = CHIPMODE_NONE;
Wayne Roberts 5:8b75387af4e0 80 if (chipModeChange)
Wayne Roberts 5:8b75387af4e0 81 chipModeChange.call(); // might change to Rx
Wayne Roberts 0:c79a1f70c110 82 if (txDone)
Wayne Roberts 0:c79a1f70c110 83 txDone.call();
Wayne Roberts 0:c79a1f70c110 84 clearIrqFlags.bits.TxDone = 1;
Wayne Roberts 0:c79a1f70c110 85 }
Wayne Roberts 0:c79a1f70c110 86 if (irqFlags.bits.RxDone) {
Wayne Roberts 0:c79a1f70c110 87 if (rxDone) {
Wayne Roberts 0:c79a1f70c110 88 uint8_t len;
Wayne Roberts 0:c79a1f70c110 89 float snr, rssi;
Wayne Roberts 0:c79a1f70c110 90 int8_t s;
Wayne Roberts 2:e6e159c8ab4d 91 xfer(OPCODE_GET_RX_BUFFER_STATUS, 0, 3, buf);
Wayne Roberts 0:c79a1f70c110 92 len = buf[1];
Wayne Roberts 2:e6e159c8ab4d 93 ReadBuffer(len, buf[2]);
Wayne Roberts 2:e6e159c8ab4d 94 xfer(OPCODE_GET_PACKET_STATUS, 0, 4, buf);
Wayne Roberts 0:c79a1f70c110 95 rssi = -buf[1] / 2.0; // TODO FSK
Wayne Roberts 0:c79a1f70c110 96 s = buf[2];
Wayne Roberts 0:c79a1f70c110 97 snr = s / 4.0;
Wayne Roberts 0:c79a1f70c110 98 rxDone(len, rssi, snr);
Wayne Roberts 0:c79a1f70c110 99 }
Wayne Roberts 0:c79a1f70c110 100 clearIrqFlags.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 101 }
Wayne Roberts 0:c79a1f70c110 102 if (irqFlags.bits.Timeout) {
Wayne Roberts 1:497af0bd9e53 103 if (chipMode != CHIPMODE_NONE) {
Wayne Roberts 1:497af0bd9e53 104 if (timeout)
Wayne Roberts 1:497af0bd9e53 105 timeout(chipMode == CHIPMODE_TX);
Wayne Roberts 1:497af0bd9e53 106 }
Wayne Roberts 1:497af0bd9e53 107 chipMode = CHIPMODE_NONE;
Wayne Roberts 4:b941bceb401d 108 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 109 chipModeChange.call();
Wayne Roberts 0:c79a1f70c110 110 clearIrqFlags.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 111 }
Wayne Roberts 8:66d3e344d61c 112 if (irqFlags.bits.CadDone) {
Wayne Roberts 8:66d3e344d61c 113 if (cadDone)
Wayne Roberts 8:66d3e344d61c 114 cadDone(irqFlags.bits.CadDetected);
Wayne Roberts 8:66d3e344d61c 115
Wayne Roberts 8:66d3e344d61c 116 clearIrqFlags.bits.CadDone = 1;
Wayne Roberts 8:66d3e344d61c 117 clearIrqFlags.bits.CadDetected = irqFlags.bits.CadDetected;
Wayne Roberts 8:66d3e344d61c 118 }
Wayne Roberts 0:c79a1f70c110 119
Wayne Roberts 0:c79a1f70c110 120 if (clearIrqFlags.word != 0) {
Wayne Roberts 0:c79a1f70c110 121 buf[0] = clearIrqFlags.word >> 8;
Wayne Roberts 0:c79a1f70c110 122 buf[1] = (uint8_t)clearIrqFlags.word;
Wayne Roberts 2:e6e159c8ab4d 123 xfer(OPCODE_CLEAR_IRQ_STATUS, 2, 0, buf);
Wayne Roberts 0:c79a1f70c110 124 }
Wayne Roberts 0:c79a1f70c110 125
Wayne Roberts 0:c79a1f70c110 126 } // ...while (dio1)
Wayne Roberts 0:c79a1f70c110 127
Wayne Roberts 0:c79a1f70c110 128 } // ..service()
Wayne Roberts 0:c79a1f70c110 129
Wayne Roberts 2:e6e159c8ab4d 130 void SX126x::xfer(uint8_t opcode, uint8_t wlen, uint8_t rlen, uint8_t* ptr)
Wayne Roberts 0:c79a1f70c110 131 {
Wayne Roberts 2:e6e159c8ab4d 132 const uint8_t* stopPtr;
Wayne Roberts 2:e6e159c8ab4d 133 const uint8_t* wstop;
Wayne Roberts 2:e6e159c8ab4d 134 const uint8_t* rstop;
Wayne Roberts 2:e6e159c8ab4d 135 uint8_t nop = 0;
Wayne Roberts 2:e6e159c8ab4d 136
Wayne Roberts 0:c79a1f70c110 137 if (sleeping) {
Wayne Roberts 0:c79a1f70c110 138 nss = 0;
Wayne Roberts 0:c79a1f70c110 139 while (busy)
Wayne Roberts 0:c79a1f70c110 140 ;
Wayne Roberts 0:c79a1f70c110 141 sleeping = false;
Wayne Roberts 0:c79a1f70c110 142 } else {
Wayne Roberts 2:e6e159c8ab4d 143 while (busy)
Wayne Roberts 2:e6e159c8ab4d 144 ;
Wayne Roberts 0:c79a1f70c110 145 nss = 0;
Wayne Roberts 0:c79a1f70c110 146 }
Wayne Roberts 0:c79a1f70c110 147
Wayne Roberts 0:c79a1f70c110 148 spi.write(opcode);
Wayne Roberts 2:e6e159c8ab4d 149
Wayne Roberts 2:e6e159c8ab4d 150 wstop = ptr + wlen;
Wayne Roberts 2:e6e159c8ab4d 151 rstop = ptr + rlen;
Wayne Roberts 2:e6e159c8ab4d 152 if (rlen > wlen)
Wayne Roberts 2:e6e159c8ab4d 153 stopPtr = rstop;
Wayne Roberts 2:e6e159c8ab4d 154 else
Wayne Roberts 2:e6e159c8ab4d 155 stopPtr = wstop;
Wayne Roberts 2:e6e159c8ab4d 156
Wayne Roberts 2:e6e159c8ab4d 157 for (; ptr < stopPtr; ptr++) {
Wayne Roberts 2:e6e159c8ab4d 158 if (ptr < wstop && ptr < rstop)
Wayne Roberts 2:e6e159c8ab4d 159 *ptr = spi.write(*ptr);
Wayne Roberts 2:e6e159c8ab4d 160 else if (ptr < wstop)
Wayne Roberts 2:e6e159c8ab4d 161 spi.write(*ptr);
Wayne Roberts 2:e6e159c8ab4d 162 else
Wayne Roberts 2:e6e159c8ab4d 163 *ptr = spi.write(nop); // n >= write length: send NOP
Wayne Roberts 0:c79a1f70c110 164 }
Wayne Roberts 0:c79a1f70c110 165
Wayne Roberts 0:c79a1f70c110 166 nss = 1;
Wayne Roberts 0:c79a1f70c110 167
Wayne Roberts 0:c79a1f70c110 168 if (opcode == OPCODE_SET_SLEEP)
Wayne Roberts 0:c79a1f70c110 169 sleeping = true;
Wayne Roberts 0:c79a1f70c110 170 }
Wayne Roberts 0:c79a1f70c110 171
Wayne Roberts 0:c79a1f70c110 172 void SX126x::start_tx(uint8_t pktLen)
Wayne Roberts 0:c79a1f70c110 173 {
Wayne Roberts 0:c79a1f70c110 174 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 175
Wayne Roberts 0:c79a1f70c110 176 {
Wayne Roberts 0:c79a1f70c110 177 uint8_t i;
Wayne Roberts 0:c79a1f70c110 178
Wayne Roberts 0:c79a1f70c110 179 while (busy)
Wayne Roberts 0:c79a1f70c110 180 ;
Wayne Roberts 0:c79a1f70c110 181
Wayne Roberts 0:c79a1f70c110 182 nss = 0;
Wayne Roberts 0:c79a1f70c110 183 spi.write(OPCODE_WRITE_BUFFER);
Wayne Roberts 0:c79a1f70c110 184 spi.write(0); // offset
Wayne Roberts 0:c79a1f70c110 185 i = 0;
Wayne Roberts 0:c79a1f70c110 186 for (i = 0; i < pktLen; i++) {
Wayne Roberts 0:c79a1f70c110 187 spi.write(tx_buf[i]);
Wayne Roberts 0:c79a1f70c110 188 }
Wayne Roberts 0:c79a1f70c110 189 nss = 1;
Wayne Roberts 0:c79a1f70c110 190 }
Wayne Roberts 0:c79a1f70c110 191
Wayne Roberts 0:c79a1f70c110 192 buf[0] = 0x40;
Wayne Roberts 0:c79a1f70c110 193 buf[1] = 0x00;
Wayne Roberts 0:c79a1f70c110 194 buf[2] = 0x00;
Wayne Roberts 2:e6e159c8ab4d 195 xfer(OPCODE_SET_TX, 3, 0, buf);
Wayne Roberts 1:497af0bd9e53 196
Wayne Roberts 1:497af0bd9e53 197 chipMode = CHIPMODE_TX;
Wayne Roberts 4:b941bceb401d 198 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 199 chipModeChange.call();
Wayne Roberts 0:c79a1f70c110 200 }
Wayne Roberts 0:c79a1f70c110 201
Wayne Roberts 0:c79a1f70c110 202 void SX126x::start_rx(unsigned timeout)
Wayne Roberts 0:c79a1f70c110 203 {
Wayne Roberts 0:c79a1f70c110 204 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 205
Wayne Roberts 0:c79a1f70c110 206 buf[0] = timeout >> 16;
Wayne Roberts 0:c79a1f70c110 207 buf[1] = timeout >> 8;
Wayne Roberts 0:c79a1f70c110 208 buf[2] = timeout;
Wayne Roberts 2:e6e159c8ab4d 209 xfer(OPCODE_SET_RX, 3, 0, buf);
Wayne Roberts 1:497af0bd9e53 210
Wayne Roberts 1:497af0bd9e53 211 chipMode = CHIPMODE_RX;
Wayne Roberts 4:b941bceb401d 212 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 213 chipModeChange.call();
Wayne Roberts 0:c79a1f70c110 214 }
Wayne Roberts 0:c79a1f70c110 215
Wayne Roberts 0:c79a1f70c110 216 uint8_t SX126x::setMHz(float MHz)
Wayne Roberts 0:c79a1f70c110 217 {
Wayne Roberts 0:c79a1f70c110 218 unsigned frf = MHz * MHZ_TO_FRF;
Wayne Roberts 0:c79a1f70c110 219 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 220
Wayne Roberts 0:c79a1f70c110 221 buf[0] = frf >> 24;
Wayne Roberts 0:c79a1f70c110 222 buf[1] = frf >> 16;
Wayne Roberts 0:c79a1f70c110 223 buf[2] = frf >> 8;
Wayne Roberts 0:c79a1f70c110 224 buf[3] = frf;
Wayne Roberts 2:e6e159c8ab4d 225 xfer(OPCODE_SET_RF_FREQUENCY, 4, 0, buf);
Wayne Roberts 0:c79a1f70c110 226 return buf[3];
Wayne Roberts 0:c79a1f70c110 227 }
Wayne Roberts 0:c79a1f70c110 228
Wayne Roberts 2:e6e159c8ab4d 229 float SX126x::getMHz()
Wayne Roberts 2:e6e159c8ab4d 230 {
Wayne Roberts 2:e6e159c8ab4d 231 uint32_t frf = readReg(REG_ADDR_RFFREQ, 4);
Wayne Roberts 2:e6e159c8ab4d 232 return frf / (float)MHZ_TO_FRF;
Wayne Roberts 2:e6e159c8ab4d 233 }
Wayne Roberts 2:e6e159c8ab4d 234
Wayne Roberts 0:c79a1f70c110 235 void SX126x::setPacketType(uint8_t type)
Wayne Roberts 0:c79a1f70c110 236 {
Wayne Roberts 2:e6e159c8ab4d 237 xfer(OPCODE_SET_PACKET_TYPE, 1, 0, &type);
Wayne Roberts 0:c79a1f70c110 238 }
Wayne Roberts 0:c79a1f70c110 239
Wayne Roberts 3:f6f2f8adcd22 240 uint8_t SX126x::getPacketType()
Wayne Roberts 3:f6f2f8adcd22 241 {
Wayne Roberts 3:f6f2f8adcd22 242 uint8_t buf[2];
Wayne Roberts 3:f6f2f8adcd22 243 xfer(OPCODE_GET_PACKET_TYPE, 0, 2, buf);
Wayne Roberts 3:f6f2f8adcd22 244 return buf[1];
Wayne Roberts 3:f6f2f8adcd22 245 }
Wayne Roberts 3:f6f2f8adcd22 246
Wayne Roberts 0:c79a1f70c110 247 void SX126x::SetDIO2AsRfSwitchCtrl(uint8_t en)
Wayne Roberts 0:c79a1f70c110 248 {
Wayne Roberts 2:e6e159c8ab4d 249 xfer(OPCODE_SET_DIO2_AS_RFSWITCH, 1, 0, &en);
Wayne Roberts 0:c79a1f70c110 250 }
Wayne Roberts 0:c79a1f70c110 251
Wayne Roberts 2:e6e159c8ab4d 252 void SX126x::ReadBuffer(uint8_t size, uint8_t offset)
Wayne Roberts 0:c79a1f70c110 253 {
Wayne Roberts 0:c79a1f70c110 254 unsigned i;
Wayne Roberts 0:c79a1f70c110 255 while (busy)
Wayne Roberts 0:c79a1f70c110 256 ;
Wayne Roberts 0:c79a1f70c110 257
Wayne Roberts 0:c79a1f70c110 258 nss = 0;
Wayne Roberts 0:c79a1f70c110 259
Wayne Roberts 0:c79a1f70c110 260 spi.write(OPCODE_READ_BUFFER);
Wayne Roberts 2:e6e159c8ab4d 261 spi.write(offset);
Wayne Roberts 0:c79a1f70c110 262 spi.write(0); // NOP
Wayne Roberts 0:c79a1f70c110 263 i = 0;
Wayne Roberts 0:c79a1f70c110 264 for (i = 0; i < size; i++) {
Wayne Roberts 0:c79a1f70c110 265 rx_buf[i] = spi.write(0);
Wayne Roberts 0:c79a1f70c110 266 }
Wayne Roberts 0:c79a1f70c110 267
Wayne Roberts 0:c79a1f70c110 268 nss = 1;
Wayne Roberts 0:c79a1f70c110 269 }
Wayne Roberts 0:c79a1f70c110 270
Wayne Roberts 0:c79a1f70c110 271 void SX126x::set_tx_dbm(bool is1262, int8_t dbm)
Wayne Roberts 0:c79a1f70c110 272 {
Wayne Roberts 0:c79a1f70c110 273 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 274 // use OCP default
Wayne Roberts 0:c79a1f70c110 275
Wayne Roberts 0:c79a1f70c110 276 buf[3] = 1;
Wayne Roberts 0:c79a1f70c110 277 if (is1262) {
Wayne Roberts 0:c79a1f70c110 278 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 279 buf[1] = 7;
Wayne Roberts 0:c79a1f70c110 280 buf[2] = 0;
Wayne Roberts 0:c79a1f70c110 281
Wayne Roberts 0:c79a1f70c110 282 if (dbm > 22)
Wayne Roberts 0:c79a1f70c110 283 dbm = 22;
Wayne Roberts 0:c79a1f70c110 284 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 285 dbm = -3;
Wayne Roberts 0:c79a1f70c110 286 } else {
Wayne Roberts 0:c79a1f70c110 287 if (dbm == 15)
Wayne Roberts 0:c79a1f70c110 288 buf[0] = 6;
Wayne Roberts 0:c79a1f70c110 289 else
Wayne Roberts 0:c79a1f70c110 290 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 291 buf[1] = 0;
Wayne Roberts 0:c79a1f70c110 292 buf[2] = 1;
Wayne Roberts 0:c79a1f70c110 293
Wayne Roberts 0:c79a1f70c110 294 if (dbm > 14)
Wayne Roberts 0:c79a1f70c110 295 dbm = 14;
Wayne Roberts 0:c79a1f70c110 296 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 297 dbm = -3;
Wayne Roberts 0:c79a1f70c110 298 }
Wayne Roberts 2:e6e159c8ab4d 299 xfer(OPCODE_SET_PA_CONFIG, 4, 0, buf);
Wayne Roberts 0:c79a1f70c110 300
Wayne Roberts 0:c79a1f70c110 301 if (is1262 && dbm > 18) {
Wayne Roberts 0:c79a1f70c110 302 /* OCP is set by chip whenever SetPaConfig() is called */
Wayne Roberts 0:c79a1f70c110 303 writeReg(REG_ADDR_OCP, 0x38, 1);
Wayne Roberts 0:c79a1f70c110 304 }
Wayne Roberts 0:c79a1f70c110 305
Wayne Roberts 0:c79a1f70c110 306 // SetTxParams
Wayne Roberts 0:c79a1f70c110 307 buf[0] = dbm;
Wayne Roberts 0:c79a1f70c110 308 //if (opt == 0) txco
Wayne Roberts 0:c79a1f70c110 309 buf[1] = SET_RAMP_200U;
Wayne Roberts 2:e6e159c8ab4d 310 xfer(OPCODE_SET_TX_PARAMS, 2, 0, buf);
Wayne Roberts 0:c79a1f70c110 311 }
Wayne Roberts 0:c79a1f70c110 312
Wayne Roberts 0:c79a1f70c110 313 void SX126x::writeReg(uint16_t addr, uint32_t data, uint8_t len)
Wayne Roberts 0:c79a1f70c110 314 {
Wayne Roberts 0:c79a1f70c110 315 uint8_t buf[6];
Wayne Roberts 0:c79a1f70c110 316 uint8_t n;
Wayne Roberts 0:c79a1f70c110 317 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 318 buf[1] = (uint8_t)addr;
Wayne Roberts 0:c79a1f70c110 319 for (n = len; n > 0; n--) {
Wayne Roberts 0:c79a1f70c110 320 buf[n+1] = (uint8_t)data;
Wayne Roberts 0:c79a1f70c110 321 data >>= 8;
Wayne Roberts 0:c79a1f70c110 322 }
Wayne Roberts 2:e6e159c8ab4d 323 xfer(OPCODE_WRITE_REGISTER, 2+len, 2+len, buf);
Wayne Roberts 0:c79a1f70c110 324 }
Wayne Roberts 0:c79a1f70c110 325
Wayne Roberts 0:c79a1f70c110 326 void SX126x::setStandby(stby_t stby)
Wayne Roberts 0:c79a1f70c110 327 {
Wayne Roberts 0:c79a1f70c110 328 uint8_t octet = stby;
Wayne Roberts 2:e6e159c8ab4d 329 xfer(OPCODE_SET_STANDBY, 1, 0, &octet);
Wayne Roberts 1:497af0bd9e53 330
Wayne Roberts 1:497af0bd9e53 331 chipMode = CHIPMODE_NONE;
Wayne Roberts 4:b941bceb401d 332 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 333 chipModeChange.call();
Wayne Roberts 4:b941bceb401d 334 }
Wayne Roberts 4:b941bceb401d 335
Wayne Roberts 4:b941bceb401d 336 void SX126x::setFS()
Wayne Roberts 4:b941bceb401d 337 {
Wayne Roberts 4:b941bceb401d 338 xfer(OPCODE_SET_FS, 0, 0, NULL);
Wayne Roberts 4:b941bceb401d 339
Wayne Roberts 4:b941bceb401d 340 chipMode = CHIPMODE_NONE;
Wayne Roberts 4:b941bceb401d 341 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 342 chipModeChange.call();
Wayne Roberts 0:c79a1f70c110 343 }
Wayne Roberts 0:c79a1f70c110 344
Wayne Roberts 8:66d3e344d61c 345 void SX126x::setCAD()
Wayne Roberts 8:66d3e344d61c 346 {
Wayne Roberts 8:66d3e344d61c 347 xfer(OPCODE_SET_CAD, 0, 0, NULL);
Wayne Roberts 8:66d3e344d61c 348
Wayne Roberts 8:66d3e344d61c 349 chipMode = CHIPMODE_RX;
Wayne Roberts 8:66d3e344d61c 350 if (chipModeChange)
Wayne Roberts 8:66d3e344d61c 351 chipModeChange.call();
Wayne Roberts 8:66d3e344d61c 352 }
Wayne Roberts 8:66d3e344d61c 353
Wayne Roberts 0:c79a1f70c110 354 void SX126x::setSleep(bool warmStart, bool rtcWakeup)
Wayne Roberts 0:c79a1f70c110 355 {
Wayne Roberts 0:c79a1f70c110 356 sleepConfig_t sc;
Wayne Roberts 0:c79a1f70c110 357
Wayne Roberts 0:c79a1f70c110 358 sc.octet = 0;
Wayne Roberts 0:c79a1f70c110 359 sc.bits.rtcWakeup = rtcWakeup;
Wayne Roberts 0:c79a1f70c110 360 sc.bits.warmStart = warmStart;
Wayne Roberts 2:e6e159c8ab4d 361 xfer(OPCODE_SET_SLEEP, 1, 0, &sc.octet);
Wayne Roberts 1:497af0bd9e53 362
Wayne Roberts 1:497af0bd9e53 363 chipMode = CHIPMODE_NONE;
Wayne Roberts 4:b941bceb401d 364 if (chipModeChange)
Wayne Roberts 4:b941bceb401d 365 chipModeChange.call();
Wayne Roberts 0:c79a1f70c110 366 }
Wayne Roberts 0:c79a1f70c110 367
Wayne Roberts 0:c79a1f70c110 368 void SX126x::hw_reset(PinName pin)
Wayne Roberts 0:c79a1f70c110 369 {
Wayne Roberts 0:c79a1f70c110 370 DigitalInOut nrst(pin);
Wayne Roberts 0:c79a1f70c110 371 nrst.output();
Wayne Roberts 0:c79a1f70c110 372 nrst = 0;
Wayne Roberts 0:c79a1f70c110 373 wait_us(100);
Wayne Roberts 0:c79a1f70c110 374 nrst = 1;
Wayne Roberts 0:c79a1f70c110 375 nrst.mode(PullUp);
Wayne Roberts 0:c79a1f70c110 376 nrst.input();
Wayne Roberts 0:c79a1f70c110 377
Wayne Roberts 0:c79a1f70c110 378 while (busy)
Wayne Roberts 0:c79a1f70c110 379 ;
Wayne Roberts 0:c79a1f70c110 380 }
Wayne Roberts 0:c79a1f70c110 381
Wayne Roberts 0:c79a1f70c110 382 uint32_t SX126x::readReg(uint16_t addr, uint8_t len)
Wayne Roberts 0:c79a1f70c110 383 {
Wayne Roberts 0:c79a1f70c110 384 uint32_t ret = 0;
Wayne Roberts 0:c79a1f70c110 385 unsigned i;
Wayne Roberts 0:c79a1f70c110 386
Wayne Roberts 0:c79a1f70c110 387 uint8_t buf[7];
Wayne Roberts 0:c79a1f70c110 388 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 389 buf[1] = (uint8_t)addr;
Wayne Roberts 2:e6e159c8ab4d 390 xfer(OPCODE_READ_REGISTER, 2, 3+len, buf);
Wayne Roberts 0:c79a1f70c110 391 for (i = 0; i < len; i++) {
Wayne Roberts 0:c79a1f70c110 392 ret <<= 8;
Wayne Roberts 0:c79a1f70c110 393 ret |= buf[i+3];
Wayne Roberts 0:c79a1f70c110 394 }
Wayne Roberts 0:c79a1f70c110 395 return ret;
Wayne Roberts 0:c79a1f70c110 396 }
Wayne Roberts 0:c79a1f70c110 397
Wayne Roberts 5:8b75387af4e0 398 void SX126x::setBufferBase(uint8_t txAddr, uint8_t rxAddr)
Wayne Roberts 5:8b75387af4e0 399 {
Wayne Roberts 5:8b75387af4e0 400 uint8_t buf[2];
Wayne Roberts 5:8b75387af4e0 401
Wayne Roberts 5:8b75387af4e0 402 buf[0] = 0; // TX base address
Wayne Roberts 5:8b75387af4e0 403 buf[1] = 0; // RX base address
Wayne Roberts 5:8b75387af4e0 404 xfer(OPCODE_SET_BUFFER_BASE_ADDR, 2, 0, buf);
Wayne Roberts 5:8b75387af4e0 405 }