wayne roberts / sx126x

sx1261/2 driver

Dependents:   alarm_slave iq_sx126x sx126x_simple_TX_shield_2020a sx126x_simple_RX_shield_2020a ... more

Driver for SX1261 or SX1262

sx126x.cpp@1:497af0bd9e53, 2018-05-22 (annotated)

Committer:
Wayne Roberts
Date:
Tue May 22 14:26:32 2018 -0700
Revision:
1:497af0bd9e53
Parent:
0:c79a1f70c110
Child:
2:e6e159c8ab4d
update to be interchangable with sx127x driver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Wayne Roberts 1:497af0bd9e53 1 #include "sx12xx.h"
Wayne Roberts 0:c79a1f70c110 2
Wayne Roberts 0:c79a1f70c110 3 Callback<void()> SX126x::dio1_topHalf; // low latency ISR context
Wayne Roberts 0:c79a1f70c110 4
Wayne Roberts 0:c79a1f70c110 5 void SX126x::dio1isr()
Wayne Roberts 0:c79a1f70c110 6 {
Wayne Roberts 0:c79a1f70c110 7 if (dio1_topHalf)
Wayne Roberts 0:c79a1f70c110 8 dio1_topHalf.call();
Wayne Roberts 0:c79a1f70c110 9 }
Wayne Roberts 0:c79a1f70c110 10
Wayne Roberts 0:c79a1f70c110 11 SX126x::SX126x(SPI& _spi, PinName _nss, PinName _busy, PinName _dio1)
Wayne Roberts 0:c79a1f70c110 12 : spi(_spi), nss(_nss), busy(_busy), dio1(_dio1)
Wayne Roberts 0:c79a1f70c110 13 {
Wayne Roberts 0:c79a1f70c110 14 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 15 IrqFlags_t irqEnable;
Wayne Roberts 0:c79a1f70c110 16
Wayne Roberts 1:497af0bd9e53 17 nss = 1;
Wayne Roberts 1:497af0bd9e53 18
Wayne Roberts 1:497af0bd9e53 19 dio1.rise(dio1isr);
Wayne Roberts 1:497af0bd9e53 20
Wayne Roberts 1:497af0bd9e53 21
Wayne Roberts 0:c79a1f70c110 22 irqEnable.word = 0;
Wayne Roberts 0:c79a1f70c110 23 irqEnable.bits.TxDone = 1;
Wayne Roberts 0:c79a1f70c110 24 irqEnable.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 25 irqEnable.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 26
Wayne Roberts 0:c79a1f70c110 27 buf[0] = irqEnable.word >> 8; // enable bits
Wayne Roberts 0:c79a1f70c110 28 buf[1] = irqEnable.word; // enable bits
Wayne Roberts 0:c79a1f70c110 29 buf[2] = irqEnable.word >> 8; // dio1
Wayne Roberts 0:c79a1f70c110 30 buf[3] = irqEnable.word; // dio1
Wayne Roberts 0:c79a1f70c110 31 buf[4] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 32 buf[5] = 0; // dio2
Wayne Roberts 0:c79a1f70c110 33 buf[6] = 0; // dio3
Wayne Roberts 0:c79a1f70c110 34 buf[7] = 0; // dio3
Wayne Roberts 0:c79a1f70c110 35 xfer(OPCODE_SET_DIO_IRQ_PARAMS, 8, buf);
Wayne Roberts 0:c79a1f70c110 36
Wayne Roberts 0:c79a1f70c110 37 }
Wayne Roberts 0:c79a1f70c110 38
Wayne Roberts 0:c79a1f70c110 39 void SX126x::PrintChipStatus(status_t status)
Wayne Roberts 0:c79a1f70c110 40 {
Wayne Roberts 0:c79a1f70c110 41 printf("%02x cmdStatus:", status.octet);
Wayne Roberts 0:c79a1f70c110 42 switch (status.bits.cmdStatus) {
Wayne Roberts 0:c79a1f70c110 43 case 0: printf("Reserved"); break;
Wayne Roberts 0:c79a1f70c110 44 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 45 case 2: printf("dataAvail"); break;
Wayne Roberts 0:c79a1f70c110 46 case 3: printf("cmdTimeout"); break;
Wayne Roberts 0:c79a1f70c110 47 case 4: printf("cmdError"); break;
Wayne Roberts 0:c79a1f70c110 48 case 5: printf("execFail"); break;
Wayne Roberts 0:c79a1f70c110 49 case 6: printf("cmdTxDone"); break;
Wayne Roberts 0:c79a1f70c110 50 }
Wayne Roberts 0:c79a1f70c110 51 printf(" chipMode:");
Wayne Roberts 0:c79a1f70c110 52 switch (status.bits.chipMode) {
Wayne Roberts 0:c79a1f70c110 53 case 0: printf("Unused"); break;
Wayne Roberts 0:c79a1f70c110 54 case 1: printf("RFU"); break;
Wayne Roberts 0:c79a1f70c110 55 case 2: printf("STBY_RC"); break;
Wayne Roberts 0:c79a1f70c110 56 case 3: printf("STBY_XOSC"); break;
Wayne Roberts 0:c79a1f70c110 57 case 4: printf("FS"); break;
Wayne Roberts 0:c79a1f70c110 58 case 5: printf("RX"); break;
Wayne Roberts 0:c79a1f70c110 59 case 6: printf("TX"); break;
Wayne Roberts 0:c79a1f70c110 60 }
Wayne Roberts 0:c79a1f70c110 61 printf("\r\n");
Wayne Roberts 0:c79a1f70c110 62 }
Wayne Roberts 0:c79a1f70c110 63
Wayne Roberts 0:c79a1f70c110 64 void SX126x::service()
Wayne Roberts 0:c79a1f70c110 65 {
Wayne Roberts 1:497af0bd9e53 66 //unsigned n = 0;
Wayne Roberts 0:c79a1f70c110 67 IrqFlags_t irqFlags, clearIrqFlags;
Wayne Roberts 0:c79a1f70c110 68 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 69
Wayne Roberts 0:c79a1f70c110 70 if (busy)
Wayne Roberts 0:c79a1f70c110 71 return;
Wayne Roberts 0:c79a1f70c110 72
Wayne Roberts 0:c79a1f70c110 73 while (dio1) {
Wayne Roberts 0:c79a1f70c110 74 xfer(OPCODE_GET_IRQ_STATUS, 3, buf);
Wayne Roberts 0:c79a1f70c110 75 irqFlags.word = buf[1] << 8;
Wayne Roberts 0:c79a1f70c110 76 irqFlags.word |= buf[2];
Wayne Roberts 0:c79a1f70c110 77 clearIrqFlags.word = 0;
Wayne Roberts 0:c79a1f70c110 78 if (irqFlags.bits.TxDone) {
Wayne Roberts 0:c79a1f70c110 79 if (txDone)
Wayne Roberts 0:c79a1f70c110 80 txDone.call();
Wayne Roberts 0:c79a1f70c110 81 clearIrqFlags.bits.TxDone = 1;
Wayne Roberts 1:497af0bd9e53 82 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 83 }
Wayne Roberts 0:c79a1f70c110 84 if (irqFlags.bits.RxDone) {
Wayne Roberts 0:c79a1f70c110 85 if (rxDone) {
Wayne Roberts 0:c79a1f70c110 86 uint8_t len;
Wayne Roberts 0:c79a1f70c110 87 float snr, rssi;
Wayne Roberts 0:c79a1f70c110 88 int8_t s;
Wayne Roberts 0:c79a1f70c110 89 xfer(OPCODE_GET_RX_BUFFER_STATUS, 3, buf);
Wayne Roberts 0:c79a1f70c110 90 len = buf[1];
Wayne Roberts 0:c79a1f70c110 91 ReadBuffer(len);
Wayne Roberts 0:c79a1f70c110 92 xfer(OPCODE_GET_PACKET_STATUS, 4, buf);
Wayne Roberts 0:c79a1f70c110 93 rssi = -buf[1] / 2.0; // TODO FSK
Wayne Roberts 0:c79a1f70c110 94 s = buf[2];
Wayne Roberts 0:c79a1f70c110 95 snr = s / 4.0;
Wayne Roberts 0:c79a1f70c110 96 rxDone(len, rssi, snr);
Wayne Roberts 0:c79a1f70c110 97 }
Wayne Roberts 0:c79a1f70c110 98 clearIrqFlags.bits.RxDone = 1;
Wayne Roberts 0:c79a1f70c110 99 }
Wayne Roberts 0:c79a1f70c110 100 if (irqFlags.bits.Timeout) {
Wayne Roberts 1:497af0bd9e53 101 if (chipMode != CHIPMODE_NONE) {
Wayne Roberts 1:497af0bd9e53 102 if (timeout)
Wayne Roberts 1:497af0bd9e53 103 timeout(chipMode == CHIPMODE_TX);
Wayne Roberts 1:497af0bd9e53 104 }
Wayne Roberts 1:497af0bd9e53 105 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 106 clearIrqFlags.bits.Timeout = 1;
Wayne Roberts 0:c79a1f70c110 107 }
Wayne Roberts 0:c79a1f70c110 108
Wayne Roberts 0:c79a1f70c110 109 if (clearIrqFlags.word != 0) {
Wayne Roberts 0:c79a1f70c110 110 buf[0] = clearIrqFlags.word >> 8;
Wayne Roberts 0:c79a1f70c110 111 buf[1] = (uint8_t)clearIrqFlags.word;
Wayne Roberts 0:c79a1f70c110 112 xfer(OPCODE_CLEAR_IRQ_STATUS, 2, buf);
Wayne Roberts 0:c79a1f70c110 113 }
Wayne Roberts 0:c79a1f70c110 114
Wayne Roberts 0:c79a1f70c110 115 } // ...while (dio1)
Wayne Roberts 0:c79a1f70c110 116
Wayne Roberts 0:c79a1f70c110 117 } // ..service()
Wayne Roberts 0:c79a1f70c110 118
Wayne Roberts 0:c79a1f70c110 119 void SX126x::xfer(uint8_t opcode, uint8_t len, uint8_t* ptr)
Wayne Roberts 0:c79a1f70c110 120 {
Wayne Roberts 0:c79a1f70c110 121 if (sleeping) {
Wayne Roberts 0:c79a1f70c110 122 nss = 0;
Wayne Roberts 0:c79a1f70c110 123 while (busy)
Wayne Roberts 0:c79a1f70c110 124 ;
Wayne Roberts 0:c79a1f70c110 125 sleeping = false;
Wayne Roberts 0:c79a1f70c110 126 } else {
Wayne Roberts 1:497af0bd9e53 127 //unsigned n = 0;
Wayne Roberts 1:497af0bd9e53 128 while (busy) {
Wayne Roberts 1:497af0bd9e53 129 /*wait_us(0.002);
Wayne Roberts 1:497af0bd9e53 130 if (++n > 200) {
Wayne Roberts 1:497af0bd9e53 131 return -1;
Wayne Roberts 1:497af0bd9e53 132 }*/
Wayne Roberts 1:497af0bd9e53 133 }
Wayne Roberts 0:c79a1f70c110 134 nss = 0;
Wayne Roberts 0:c79a1f70c110 135 }
Wayne Roberts 0:c79a1f70c110 136
Wayne Roberts 0:c79a1f70c110 137 spi.write(opcode);
Wayne Roberts 0:c79a1f70c110 138 while (len > 0) {
Wayne Roberts 0:c79a1f70c110 139 *ptr = spi.write(*ptr);
Wayne Roberts 0:c79a1f70c110 140 len--;
Wayne Roberts 0:c79a1f70c110 141 ptr++;
Wayne Roberts 0:c79a1f70c110 142 }
Wayne Roberts 0:c79a1f70c110 143
Wayne Roberts 0:c79a1f70c110 144 nss = 1;
Wayne Roberts 0:c79a1f70c110 145
Wayne Roberts 0:c79a1f70c110 146 if (opcode == OPCODE_SET_SLEEP)
Wayne Roberts 0:c79a1f70c110 147 sleeping = true;
Wayne Roberts 0:c79a1f70c110 148 }
Wayne Roberts 0:c79a1f70c110 149
Wayne Roberts 0:c79a1f70c110 150 void SX126x::start_tx(uint8_t pktLen)
Wayne Roberts 0:c79a1f70c110 151 {
Wayne Roberts 0:c79a1f70c110 152 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 153
Wayne Roberts 0:c79a1f70c110 154 {
Wayne Roberts 0:c79a1f70c110 155 uint8_t i;
Wayne Roberts 0:c79a1f70c110 156
Wayne Roberts 0:c79a1f70c110 157 while (busy)
Wayne Roberts 0:c79a1f70c110 158 ;
Wayne Roberts 0:c79a1f70c110 159
Wayne Roberts 0:c79a1f70c110 160 nss = 0;
Wayne Roberts 0:c79a1f70c110 161 spi.write(OPCODE_WRITE_BUFFER);
Wayne Roberts 0:c79a1f70c110 162 spi.write(0); // offset
Wayne Roberts 0:c79a1f70c110 163 i = 0;
Wayne Roberts 0:c79a1f70c110 164 for (i = 0; i < pktLen; i++) {
Wayne Roberts 0:c79a1f70c110 165 spi.write(tx_buf[i]);
Wayne Roberts 0:c79a1f70c110 166 }
Wayne Roberts 0:c79a1f70c110 167 nss = 1;
Wayne Roberts 0:c79a1f70c110 168 }
Wayne Roberts 0:c79a1f70c110 169
Wayne Roberts 0:c79a1f70c110 170 buf[0] = 0x40;
Wayne Roberts 0:c79a1f70c110 171 buf[1] = 0x00;
Wayne Roberts 0:c79a1f70c110 172 buf[2] = 0x00;
Wayne Roberts 0:c79a1f70c110 173 xfer(OPCODE_SET_TX, 3, buf);
Wayne Roberts 1:497af0bd9e53 174
Wayne Roberts 1:497af0bd9e53 175 chipMode = CHIPMODE_TX;
Wayne Roberts 0:c79a1f70c110 176 }
Wayne Roberts 0:c79a1f70c110 177
Wayne Roberts 0:c79a1f70c110 178 void SX126x::start_rx(unsigned timeout)
Wayne Roberts 0:c79a1f70c110 179 {
Wayne Roberts 0:c79a1f70c110 180 uint8_t buf[8];
Wayne Roberts 0:c79a1f70c110 181
Wayne Roberts 0:c79a1f70c110 182 buf[0] = timeout >> 16;
Wayne Roberts 0:c79a1f70c110 183 buf[1] = timeout >> 8;
Wayne Roberts 0:c79a1f70c110 184 buf[2] = timeout;
Wayne Roberts 0:c79a1f70c110 185 xfer(OPCODE_SET_RX, 3, buf);
Wayne Roberts 1:497af0bd9e53 186
Wayne Roberts 1:497af0bd9e53 187 chipMode = CHIPMODE_RX;
Wayne Roberts 0:c79a1f70c110 188 }
Wayne Roberts 0:c79a1f70c110 189
Wayne Roberts 0:c79a1f70c110 190 #define MHZ_TO_FRF 1048576 // = (1<<25) / Fxtal_MHz
Wayne Roberts 0:c79a1f70c110 191 uint8_t SX126x::setMHz(float MHz)
Wayne Roberts 0:c79a1f70c110 192 {
Wayne Roberts 0:c79a1f70c110 193 unsigned frf = MHz * MHZ_TO_FRF;
Wayne Roberts 0:c79a1f70c110 194 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 195
Wayne Roberts 0:c79a1f70c110 196 buf[0] = frf >> 24;
Wayne Roberts 0:c79a1f70c110 197 buf[1] = frf >> 16;
Wayne Roberts 0:c79a1f70c110 198 buf[2] = frf >> 8;
Wayne Roberts 0:c79a1f70c110 199 buf[3] = frf;
Wayne Roberts 0:c79a1f70c110 200 xfer(OPCODE_SET_RF_FREQUENCY, 4, buf);
Wayne Roberts 0:c79a1f70c110 201 return buf[3];
Wayne Roberts 0:c79a1f70c110 202 }
Wayne Roberts 0:c79a1f70c110 203
Wayne Roberts 0:c79a1f70c110 204 void SX126x::setPacketType(uint8_t type)
Wayne Roberts 0:c79a1f70c110 205 {
Wayne Roberts 0:c79a1f70c110 206 xfer(OPCODE_SET_PACKET_TYPE, 1, &type);
Wayne Roberts 0:c79a1f70c110 207 }
Wayne Roberts 0:c79a1f70c110 208
Wayne Roberts 0:c79a1f70c110 209 void SX126x::SetDIO2AsRfSwitchCtrl(uint8_t en)
Wayne Roberts 0:c79a1f70c110 210 {
Wayne Roberts 0:c79a1f70c110 211 xfer(OPCODE_SET_DIO2_AS_RFSWITCH, 1, &en);
Wayne Roberts 0:c79a1f70c110 212 }
Wayne Roberts 0:c79a1f70c110 213
Wayne Roberts 0:c79a1f70c110 214 void SX126x::ReadBuffer(uint8_t size)
Wayne Roberts 0:c79a1f70c110 215 {
Wayne Roberts 0:c79a1f70c110 216 unsigned i;
Wayne Roberts 0:c79a1f70c110 217 while (busy)
Wayne Roberts 0:c79a1f70c110 218 ;
Wayne Roberts 0:c79a1f70c110 219
Wayne Roberts 0:c79a1f70c110 220 nss = 0;
Wayne Roberts 0:c79a1f70c110 221
Wayne Roberts 0:c79a1f70c110 222 spi.write(OPCODE_READ_BUFFER);
Wayne Roberts 0:c79a1f70c110 223 spi.write(0); // offset
Wayne Roberts 0:c79a1f70c110 224 spi.write(0); // NOP
Wayne Roberts 0:c79a1f70c110 225 i = 0;
Wayne Roberts 0:c79a1f70c110 226 for (i = 0; i < size; i++) {
Wayne Roberts 0:c79a1f70c110 227 rx_buf[i] = spi.write(0);
Wayne Roberts 0:c79a1f70c110 228 }
Wayne Roberts 0:c79a1f70c110 229
Wayne Roberts 0:c79a1f70c110 230 nss = 1;
Wayne Roberts 0:c79a1f70c110 231 }
Wayne Roberts 0:c79a1f70c110 232
Wayne Roberts 0:c79a1f70c110 233 void SX126x::set_tx_dbm(bool is1262, int8_t dbm)
Wayne Roberts 0:c79a1f70c110 234 {
Wayne Roberts 0:c79a1f70c110 235 uint8_t buf[4];
Wayne Roberts 0:c79a1f70c110 236 // use OCP default
Wayne Roberts 0:c79a1f70c110 237
Wayne Roberts 0:c79a1f70c110 238 buf[3] = 1;
Wayne Roberts 0:c79a1f70c110 239 if (is1262) {
Wayne Roberts 0:c79a1f70c110 240 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 241 buf[1] = 7;
Wayne Roberts 0:c79a1f70c110 242 buf[2] = 0;
Wayne Roberts 0:c79a1f70c110 243
Wayne Roberts 0:c79a1f70c110 244 if (dbm > 22)
Wayne Roberts 0:c79a1f70c110 245 dbm = 22;
Wayne Roberts 0:c79a1f70c110 246 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 247 dbm = -3;
Wayne Roberts 0:c79a1f70c110 248 } else {
Wayne Roberts 0:c79a1f70c110 249 if (dbm == 15)
Wayne Roberts 0:c79a1f70c110 250 buf[0] = 6;
Wayne Roberts 0:c79a1f70c110 251 else
Wayne Roberts 0:c79a1f70c110 252 buf[0] = 4;
Wayne Roberts 0:c79a1f70c110 253 buf[1] = 0;
Wayne Roberts 0:c79a1f70c110 254 buf[2] = 1;
Wayne Roberts 0:c79a1f70c110 255
Wayne Roberts 0:c79a1f70c110 256 if (dbm > 14)
Wayne Roberts 0:c79a1f70c110 257 dbm = 14;
Wayne Roberts 0:c79a1f70c110 258 else if (dbm < -3)
Wayne Roberts 0:c79a1f70c110 259 dbm = -3;
Wayne Roberts 0:c79a1f70c110 260 }
Wayne Roberts 0:c79a1f70c110 261 xfer(OPCODE_SET_PA_CONFIG, 4, buf);
Wayne Roberts 0:c79a1f70c110 262
Wayne Roberts 0:c79a1f70c110 263 if (is1262 && dbm > 18) {
Wayne Roberts 0:c79a1f70c110 264 /* OCP is set by chip whenever SetPaConfig() is called */
Wayne Roberts 0:c79a1f70c110 265 writeReg(REG_ADDR_OCP, 0x38, 1);
Wayne Roberts 0:c79a1f70c110 266 }
Wayne Roberts 0:c79a1f70c110 267
Wayne Roberts 0:c79a1f70c110 268 // SetTxParams
Wayne Roberts 0:c79a1f70c110 269 buf[0] = dbm;
Wayne Roberts 0:c79a1f70c110 270 //if (opt == 0) txco
Wayne Roberts 0:c79a1f70c110 271 buf[1] = SET_RAMP_200U;
Wayne Roberts 0:c79a1f70c110 272 xfer(OPCODE_SET_TX_PARAMS, 2, buf);
Wayne Roberts 0:c79a1f70c110 273 }
Wayne Roberts 0:c79a1f70c110 274
Wayne Roberts 0:c79a1f70c110 275 void SX126x::writeReg(uint16_t addr, uint32_t data, uint8_t len)
Wayne Roberts 0:c79a1f70c110 276 {
Wayne Roberts 0:c79a1f70c110 277 uint8_t buf[6];
Wayne Roberts 0:c79a1f70c110 278 uint8_t n;
Wayne Roberts 0:c79a1f70c110 279 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 280 buf[1] = (uint8_t)addr;
Wayne Roberts 0:c79a1f70c110 281 for (n = len; n > 0; n--) {
Wayne Roberts 0:c79a1f70c110 282 buf[n+1] = (uint8_t)data;
Wayne Roberts 0:c79a1f70c110 283 data >>= 8;
Wayne Roberts 0:c79a1f70c110 284 }
Wayne Roberts 0:c79a1f70c110 285 xfer(OPCODE_WRITE_REGISTER, 2+len, buf);
Wayne Roberts 0:c79a1f70c110 286 }
Wayne Roberts 0:c79a1f70c110 287
Wayne Roberts 0:c79a1f70c110 288 void SX126x::setStandby(stby_t stby)
Wayne Roberts 0:c79a1f70c110 289 {
Wayne Roberts 0:c79a1f70c110 290 uint8_t octet = stby;
Wayne Roberts 0:c79a1f70c110 291 xfer(OPCODE_SET_STANDBY, 1, &octet);
Wayne Roberts 1:497af0bd9e53 292
Wayne Roberts 1:497af0bd9e53 293 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 294 }
Wayne Roberts 0:c79a1f70c110 295
Wayne Roberts 0:c79a1f70c110 296 void SX126x::setSleep(bool warmStart, bool rtcWakeup)
Wayne Roberts 0:c79a1f70c110 297 {
Wayne Roberts 0:c79a1f70c110 298 sleepConfig_t sc;
Wayne Roberts 0:c79a1f70c110 299
Wayne Roberts 0:c79a1f70c110 300 sc.octet = 0;
Wayne Roberts 0:c79a1f70c110 301 sc.bits.rtcWakeup = rtcWakeup;
Wayne Roberts 0:c79a1f70c110 302 sc.bits.warmStart = warmStart;
Wayne Roberts 0:c79a1f70c110 303 xfer(OPCODE_SET_SLEEP, 1, &sc.octet);
Wayne Roberts 1:497af0bd9e53 304
Wayne Roberts 1:497af0bd9e53 305 chipMode = CHIPMODE_NONE;
Wayne Roberts 0:c79a1f70c110 306 }
Wayne Roberts 0:c79a1f70c110 307
Wayne Roberts 0:c79a1f70c110 308 void SX126x::hw_reset(PinName pin)
Wayne Roberts 0:c79a1f70c110 309 {
Wayne Roberts 0:c79a1f70c110 310 DigitalInOut nrst(pin);
Wayne Roberts 0:c79a1f70c110 311 nrst.output();
Wayne Roberts 0:c79a1f70c110 312 nrst = 0;
Wayne Roberts 0:c79a1f70c110 313 wait_us(100);
Wayne Roberts 0:c79a1f70c110 314 nrst = 1;
Wayne Roberts 0:c79a1f70c110 315 nrst.mode(PullUp);
Wayne Roberts 0:c79a1f70c110 316 nrst.input();
Wayne Roberts 0:c79a1f70c110 317
Wayne Roberts 0:c79a1f70c110 318 while (busy)
Wayne Roberts 0:c79a1f70c110 319 ;
Wayne Roberts 0:c79a1f70c110 320 }
Wayne Roberts 0:c79a1f70c110 321
Wayne Roberts 0:c79a1f70c110 322 uint32_t SX126x::readReg(uint16_t addr, uint8_t len)
Wayne Roberts 0:c79a1f70c110 323 {
Wayne Roberts 0:c79a1f70c110 324 uint32_t ret = 0;
Wayne Roberts 0:c79a1f70c110 325 unsigned i;
Wayne Roberts 0:c79a1f70c110 326
Wayne Roberts 0:c79a1f70c110 327 uint8_t buf[7];
Wayne Roberts 0:c79a1f70c110 328 buf[0] = addr >> 8;
Wayne Roberts 0:c79a1f70c110 329 buf[1] = (uint8_t)addr;
Wayne Roberts 0:c79a1f70c110 330 xfer(OPCODE_READ_REGISTER, 3+len, buf);
Wayne Roberts 0:c79a1f70c110 331 for (i = 0; i < len; i++) {
Wayne Roberts 0:c79a1f70c110 332 ret <<= 8;
Wayne Roberts 0:c79a1f70c110 333 ret |= buf[i+3];
Wayne Roberts 0:c79a1f70c110 334 }
Wayne Roberts 0:c79a1f70c110 335 return ret;
Wayne Roberts 0:c79a1f70c110 336 }
Wayne Roberts 0:c79a1f70c110 337