sx9500 driver

Dependents:   Senet NAMote scpi_sx127x NAMote72_Utility scpi_sx127x_firstTest

Committer:
dudmuck
Date:
Wed Mar 18 00:57:23 2015 +0000
Revision:
0:d46a1b9267a3
Child:
1:aa30dc96dc77
sx9500 driver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 0:d46a1b9267a3 1 #include "sx9500.h"
dudmuck 0:d46a1b9267a3 2
dudmuck 0:d46a1b9267a3 3 #define SX9500_I2C_ADDRESS 0x50 //0x28
dudmuck 0:d46a1b9267a3 4
dudmuck 0:d46a1b9267a3 5 SX9500::SX9500(I2C& r, PinName en_pin) : m_i2c(r), m_txen(en_pin)
dudmuck 0:d46a1b9267a3 6 {
dudmuck 0:d46a1b9267a3 7 }
dudmuck 0:d46a1b9267a3 8
dudmuck 0:d46a1b9267a3 9 SX9500::~SX9500()
dudmuck 0:d46a1b9267a3 10 {
dudmuck 0:d46a1b9267a3 11 }
dudmuck 0:d46a1b9267a3 12
dudmuck 0:d46a1b9267a3 13 void SX9500::reset()
dudmuck 0:d46a1b9267a3 14 {
dudmuck 0:d46a1b9267a3 15 write(SX9500_REG_RESET, SX9500_RESET_CMD);
dudmuck 0:d46a1b9267a3 16 }
dudmuck 0:d46a1b9267a3 17
dudmuck 0:d46a1b9267a3 18 uint16_t SX9500::get_sensor()
dudmuck 0:d46a1b9267a3 19 {
dudmuck 0:d46a1b9267a3 20 //uint16_t offset;
dudmuck 0:d46a1b9267a3 21 uint8_t status;
dudmuck 0:d46a1b9267a3 22 uint8_t buf[2];
dudmuck 0:d46a1b9267a3 23
dudmuck 0:d46a1b9267a3 24 m_txen = 1;
dudmuck 0:d46a1b9267a3 25
dudmuck 0:d46a1b9267a3 26 write(SX9500_REG_IRQMSK, 0x10);
dudmuck 0:d46a1b9267a3 27 write(SX9500_REG_IRQSRC, 0x10);
dudmuck 0:d46a1b9267a3 28
dudmuck 0:d46a1b9267a3 29 do {
dudmuck 0:d46a1b9267a3 30 status = read_single(SX9500_REG_IRQSRC);
dudmuck 0:d46a1b9267a3 31 } while (!(status & 0x10));
dudmuck 0:d46a1b9267a3 32
dudmuck 0:d46a1b9267a3 33 read(SX9500_REG_OFFSETMSB, buf, 2);
dudmuck 0:d46a1b9267a3 34 /*printf("MSB:%x\n", read_single(SX9500_REG_OFFSETMSB));
dudmuck 0:d46a1b9267a3 35 printf("LSB:%x\n", read_single(SX9500_REG_OFFSETLSB));*/
dudmuck 0:d46a1b9267a3 36 return (buf[0] << 8) + buf[1];
dudmuck 0:d46a1b9267a3 37 }
dudmuck 0:d46a1b9267a3 38
dudmuck 0:d46a1b9267a3 39 void SX9500::write(uint8_t addr, uint8_t data)
dudmuck 0:d46a1b9267a3 40 {
dudmuck 0:d46a1b9267a3 41 uint8_t cmd[2];
dudmuck 0:d46a1b9267a3 42
dudmuck 0:d46a1b9267a3 43 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 44 cmd[1] = data;
dudmuck 0:d46a1b9267a3 45
dudmuck 0:d46a1b9267a3 46 if (m_i2c.write(SX9500_I2C_ADDRESS, (char *)cmd, 2))
dudmuck 0:d46a1b9267a3 47 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 48 }
dudmuck 0:d46a1b9267a3 49
dudmuck 0:d46a1b9267a3 50 void SX9500::read(uint8_t addr, uint8_t *dst_buf, int length)
dudmuck 0:d46a1b9267a3 51 {
dudmuck 0:d46a1b9267a3 52 char cmd[2];
dudmuck 0:d46a1b9267a3 53
dudmuck 0:d46a1b9267a3 54 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 55 if (m_i2c.write(SX9500_I2C_ADDRESS, cmd, 1, true))
dudmuck 0:d46a1b9267a3 56 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 57 if (m_i2c.read(SX9500_I2C_ADDRESS, (char *)dst_buf, length))
dudmuck 0:d46a1b9267a3 58 printf("SX9500 read-fail\n");
dudmuck 0:d46a1b9267a3 59 }
dudmuck 0:d46a1b9267a3 60
dudmuck 0:d46a1b9267a3 61 uint8_t SX9500::read_single(uint8_t addr)
dudmuck 0:d46a1b9267a3 62 {
dudmuck 0:d46a1b9267a3 63 char cmd[2];
dudmuck 0:d46a1b9267a3 64
dudmuck 0:d46a1b9267a3 65 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 66 if (m_i2c.write(SX9500_I2C_ADDRESS, cmd, 1, true))
dudmuck 0:d46a1b9267a3 67 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 68 if (m_i2c.read(SX9500_I2C_ADDRESS, cmd, 1))
dudmuck 0:d46a1b9267a3 69 printf("SX9500 read-fail\n");
dudmuck 0:d46a1b9267a3 70
dudmuck 0:d46a1b9267a3 71 return cmd[0];
dudmuck 0:d46a1b9267a3 72 }
dudmuck 0:d46a1b9267a3 73
dudmuck 0:d46a1b9267a3 74 void SX9500::standby(void)
dudmuck 0:d46a1b9267a3 75 {
dudmuck 0:d46a1b9267a3 76 m_txen = 0;
dudmuck 0:d46a1b9267a3 77 write(SX9500_REG_PROXCTRL0, 0); // turn off all sensor pins
dudmuck 0:d46a1b9267a3 78 }
dudmuck 0:d46a1b9267a3 79