wayne roberts / lib_sx9500

sx9500 driver

Dependents:   Senet NAMote scpi_sx127x NAMote72_Utility scpi_sx127x_firstTest

sx9500.cpp@1:aa30dc96dc77, 2015-05-08 (annotated)

Committer:
dudmuck
Date:
Fri May 08 01:32:54 2015 +0000
Revision:
1:aa30dc96dc77
Parent:
0:d46a1b9267a3 
added interrupt handling

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 0:d46a1b9267a3 1 #include "sx9500.h"
dudmuck 0:d46a1b9267a3 2
dudmuck 0:d46a1b9267a3 3 #define SX9500_I2C_ADDRESS 0x50 //0x28
dudmuck 0:d46a1b9267a3 4
dudmuck 1:aa30dc96dc77 5
dudmuck 1:aa30dc96dc77 6 SX9500::SX9500(I2C& r, PinName en_pin, PinName nirq_pin) : m_i2c(r), m_txen(en_pin), m_nirq(nirq_pin)
dudmuck 0:d46a1b9267a3 7 {
dudmuck 1:aa30dc96dc77 8 m_nirq.mode(PullUp); // no pullup on board?
dudmuck 1:aa30dc96dc77 9 RegProxCtrl0.octet = read_single(SX9500_REG_PROXCTRL0);
dudmuck 0:d46a1b9267a3 10 }
dudmuck 0:d46a1b9267a3 11
dudmuck 0:d46a1b9267a3 12 SX9500::~SX9500()
dudmuck 0:d46a1b9267a3 13 {
dudmuck 0:d46a1b9267a3 14 }
dudmuck 0:d46a1b9267a3 15
dudmuck 0:d46a1b9267a3 16 void SX9500::reset()
dudmuck 0:d46a1b9267a3 17 {
dudmuck 0:d46a1b9267a3 18 write(SX9500_REG_RESET, SX9500_RESET_CMD);
dudmuck 0:d46a1b9267a3 19 }
dudmuck 0:d46a1b9267a3 20
dudmuck 1:aa30dc96dc77 21 void SX9500::print_sensor(char CSn)
dudmuck 0:d46a1b9267a3 22 {
dudmuck 0:d46a1b9267a3 23 uint8_t buf[2];
dudmuck 1:aa30dc96dc77 24
dudmuck 1:aa30dc96dc77 25 write(SX9500_REG_SENSORSEL, CSn);
dudmuck 1:aa30dc96dc77 26
dudmuck 1:aa30dc96dc77 27 read(SX9500_REG_USEMSB, buf, 2);
dudmuck 1:aa30dc96dc77 28 printf("%d useful:0x%02x%02x\r\n", CSn, buf[0], buf[1]);
dudmuck 1:aa30dc96dc77 29
dudmuck 1:aa30dc96dc77 30 read(SX9500_REG_AVGMSB, buf, 2);
dudmuck 1:aa30dc96dc77 31 printf("%d avg:0x%02x%02x\r\n", CSn, buf[0], buf[1]);
dudmuck 1:aa30dc96dc77 32
dudmuck 1:aa30dc96dc77 33 read(SX9500_REG_DIFFMSB, buf, 2);
dudmuck 1:aa30dc96dc77 34 printf("%d diff:0x%02x%02x\r\n", CSn, buf[0], buf[1]);
dudmuck 0:d46a1b9267a3 35 }
dudmuck 0:d46a1b9267a3 36
dudmuck 0:d46a1b9267a3 37 void SX9500::write(uint8_t addr, uint8_t data)
dudmuck 0:d46a1b9267a3 38 {
dudmuck 0:d46a1b9267a3 39 uint8_t cmd[2];
dudmuck 0:d46a1b9267a3 40
dudmuck 0:d46a1b9267a3 41 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 42 cmd[1] = data;
dudmuck 0:d46a1b9267a3 43
dudmuck 0:d46a1b9267a3 44 if (m_i2c.write(SX9500_I2C_ADDRESS, (char *)cmd, 2))
dudmuck 0:d46a1b9267a3 45 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 46 }
dudmuck 0:d46a1b9267a3 47
dudmuck 0:d46a1b9267a3 48 void SX9500::read(uint8_t addr, uint8_t *dst_buf, int length)
dudmuck 0:d46a1b9267a3 49 {
dudmuck 0:d46a1b9267a3 50 char cmd[2];
dudmuck 0:d46a1b9267a3 51
dudmuck 0:d46a1b9267a3 52 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 53 if (m_i2c.write(SX9500_I2C_ADDRESS, cmd, 1, true))
dudmuck 0:d46a1b9267a3 54 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 55 if (m_i2c.read(SX9500_I2C_ADDRESS, (char *)dst_buf, length))
dudmuck 0:d46a1b9267a3 56 printf("SX9500 read-fail\n");
dudmuck 0:d46a1b9267a3 57 }
dudmuck 0:d46a1b9267a3 58
dudmuck 0:d46a1b9267a3 59 uint8_t SX9500::read_single(uint8_t addr)
dudmuck 0:d46a1b9267a3 60 {
dudmuck 0:d46a1b9267a3 61 char cmd[2];
dudmuck 0:d46a1b9267a3 62
dudmuck 0:d46a1b9267a3 63 cmd[0] = addr;
dudmuck 0:d46a1b9267a3 64 if (m_i2c.write(SX9500_I2C_ADDRESS, cmd, 1, true))
dudmuck 0:d46a1b9267a3 65 printf("SX9500 write-fail\n");
dudmuck 0:d46a1b9267a3 66 if (m_i2c.read(SX9500_I2C_ADDRESS, cmd, 1))
dudmuck 0:d46a1b9267a3 67 printf("SX9500 read-fail\n");
dudmuck 0:d46a1b9267a3 68
dudmuck 0:d46a1b9267a3 69 return cmd[0];
dudmuck 0:d46a1b9267a3 70 }
dudmuck 1:aa30dc96dc77 71
dudmuck 1:aa30dc96dc77 72 bool SX9500::get_active()
dudmuck 0:d46a1b9267a3 73 {
dudmuck 1:aa30dc96dc77 74 if (m_txen.read())
dudmuck 1:aa30dc96dc77 75 return true;
dudmuck 1:aa30dc96dc77 76 else
dudmuck 1:aa30dc96dc77 77 return false;
dudmuck 1:aa30dc96dc77 78 }
dudmuck 1:aa30dc96dc77 79
dudmuck 1:aa30dc96dc77 80 void SX9500::set_active(bool en)
dudmuck 1:aa30dc96dc77 81 {
dudmuck 1:aa30dc96dc77 82 if (en) {
dudmuck 1:aa30dc96dc77 83 m_txen = 1;
dudmuck 1:aa30dc96dc77 84 } else {
dudmuck 1:aa30dc96dc77 85 /* lowest power (non)operation */
dudmuck 1:aa30dc96dc77 86 m_txen = 0;
dudmuck 1:aa30dc96dc77 87 write(SX9500_REG_PROXCTRL0, 0); // turn off all sensor pins
dudmuck 1:aa30dc96dc77 88 }
dudmuck 0:d46a1b9267a3 89 }
dudmuck 0:d46a1b9267a3 90
dudmuck 1:aa30dc96dc77 91 void SX9500::service()
dudmuck 1:aa30dc96dc77 92 {
dudmuck 1:aa30dc96dc77 93 if (m_nirq.read())
dudmuck 1:aa30dc96dc77 94 return;
dudmuck 1:aa30dc96dc77 95
dudmuck 1:aa30dc96dc77 96 RegIrqSrc.octet = read_single(SX9500_REG_IRQSRC);
dudmuck 1:aa30dc96dc77 97 printf("95irq:");
dudmuck 1:aa30dc96dc77 98 if (RegIrqSrc.bits.conv_done) {
dudmuck 1:aa30dc96dc77 99 printf("conv_done:\r\n");
dudmuck 1:aa30dc96dc77 100 print_sensor(0);
dudmuck 1:aa30dc96dc77 101 print_sensor(1);
dudmuck 1:aa30dc96dc77 102 }
dudmuck 1:aa30dc96dc77 103 if (RegIrqSrc.bits.comp_done) {
dudmuck 1:aa30dc96dc77 104 printf("comp_done ");
dudmuck 1:aa30dc96dc77 105 }
dudmuck 1:aa30dc96dc77 106 if (RegIrqSrc.bits.far || RegIrqSrc.bits.close) {
dudmuck 1:aa30dc96dc77 107 RegStat_t stat;
dudmuck 1:aa30dc96dc77 108 printf("stat ");
dudmuck 1:aa30dc96dc77 109 stat.octet = read_single(SX9500_REG_STAT);
dudmuck 1:aa30dc96dc77 110 if (stat.bits.proxstat0)
dudmuck 1:aa30dc96dc77 111 printf("cs0 ");
dudmuck 1:aa30dc96dc77 112 if (stat.bits.proxstat1)
dudmuck 1:aa30dc96dc77 113 printf("cs1 ");
dudmuck 1:aa30dc96dc77 114 }
dudmuck 1:aa30dc96dc77 115
dudmuck 1:aa30dc96dc77 116 if (RegIrqSrc.bits.reset) {
dudmuck 1:aa30dc96dc77 117 printf("reset ");
dudmuck 1:aa30dc96dc77 118 }
dudmuck 1:aa30dc96dc77 119
dudmuck 1:aa30dc96dc77 120 printf("\r\n");
dudmuck 1:aa30dc96dc77 121 }
dudmuck 1:aa30dc96dc77 122