mma8451q driver
Dependents: nRF51822_DataLogger_PowerImpulseCounter scpi_sx127x NAMote72_Utility scpi_sx127x_firstTest
mma8451q.h
00001 #include "mbed.h" 00002 00003 /* Xtrinsic accelerometer */ 00004 00005 /* 00006 * MMA8451 Registers 00007 */ 00008 #define MMA8451_STATUS 0x00 00009 #define MMA8451_OUT_X_MSB 0x01 00010 #define MMA8451_SYSMOD 0x0b // 00011 #define MMA8451_INT_SOURCE 0x0c // 00012 #define MMA8451_ID 0x0d 00013 #define MMA8451_PL_STATUS 0x10 00014 #define MMA8451_PL_CFG 0x11 00015 #define MMA8451_PL_COUNT 0x12 // orientation debounce 00016 #define MMA8451_PL_BF_ZCOMP 0x13 00017 #define MMA8451_PL_THS_REG 0x14 00018 #define MMA8451_FF_MT_SRC 0x16 00019 #define MMA8451_TRANSIENT_CFG 0x1d // transient enable 00020 #define MMA8451_TRANSIENT_SRC 0x1e // transient read/clear interrupt 00021 #define MMA8451_TRANSIENT_THS 0x1f // transient threshold 00022 #define MMA8451_TRANSIENT_COUNT 0x20 // transient debounce 00023 #define MMA8451_PULSE_SRC 0x22 00024 #define MMA8451_CTRL_REG1 0x2a 00025 #define MMA8451_CTRL_REG2 0x2b 00026 #define MMA8451_CTRL_REG3 0x2c // interrupt control 00027 #define MMA8451_CTRL_REG4 0x2d // interrupt enable 00028 #define MMA8451_CTRL_REG5 0x2e // interrupt pin selection 00029 00030 typedef union { 00031 struct { 00032 int16_t x; 00033 int16_t y; 00034 int16_t z; 00035 } v; 00036 uint8_t octets[6]; 00037 } mma_out_t; 00038 00039 typedef union { 00040 struct { // at 0x0c 00041 uint8_t SRC_DRDY : 1; // 0 00042 uint8_t reserved1 : 1; // 1 00043 uint8_t SRC_FF_MT : 1; // 2 00044 uint8_t SRC_PULSE : 1; // 3 00045 uint8_t SRC_LNDPRT : 1; // 4 00046 uint8_t SRC_TRANS : 1; // 5 00047 uint8_t reserved6 : 1; // 6 00048 uint8_t SRC_ASLP : 1; // 7 00049 } bits; 00050 uint8_t octet; 00051 } mma_int_source_t; 00052 00053 typedef union { 00054 struct { // at 0x10 00055 uint8_t BAFRO : 1; // 0 0=front, 1=back 00056 uint8_t LAPO : 2; // 1,2 up, down, right, left 00057 uint8_t res : 3; // 3,4,5 00058 uint8_t LO : 1; // 6 Z-tilt lockout 00059 uint8_t NEWLP : 1; // 7 1 = BAFRO or LO has changed 00060 } bits; 00061 uint8_t octet; 00062 } mma_pl_status_t; 00063 00064 typedef union { 00065 struct { // at 0x1d 00066 uint8_t HPF_BYP : 1; // 0 00067 uint8_t XTEFE : 1; // 1 00068 uint8_t YTEFE : 1; // 2 00069 uint8_t ZTEFE : 1; // 3 00070 uint8_t ELE : 1; // 4 00071 uint8_t pad : 3; // 5,6,7 00072 } bits; 00073 uint8_t octet; 00074 } transient_cfg_t; 00075 00076 typedef union { 00077 struct { // at 0x1e 00078 uint8_t X_Trans_Pol : 1; // 0 00079 uint8_t XTRANSE : 1; // 1 00080 uint8_t Y_Trans_Pol : 1; // 2 00081 uint8_t YTRANSE : 1; // 3 00082 uint8_t Z_Trans_Pol : 1; // 4 00083 uint8_t ZTRANSE : 1; // 5 00084 uint8_t EA : 1; // 6 00085 uint8_t pad : 1; // 7 00086 } bits; 00087 uint8_t octet; 00088 } transient_src_t; 00089 00090 typedef union { 00091 struct { // at 0x2a 00092 uint8_t ACTIVE : 1; // 0 00093 uint8_t F_READ : 1; // 1 00094 uint8_t LNOISE : 1; // 2 00095 uint8_t DR : 3; // 3,4,5 00096 uint8_t ASLP_RATE : 2; // 6,7 00097 } bits; 00098 uint8_t octet; 00099 } ctrl_reg1_t; 00100 00101 typedef union { 00102 struct { // at 0x2d 00103 uint8_t INT_EN_DRDY : 1; // 0 00104 uint8_t reserved1 : 1; // 1 00105 uint8_t INT_EN_FF_MT : 1; // 2 00106 uint8_t INT_EN_PULSE : 1; // 3 00107 uint8_t INT_EN_LNDPRT : 1; // 4 00108 uint8_t INT_EN_TRANS : 1; // 5 00109 uint8_t reserved6 : 1; // 6 00110 uint8_t INT_EN_ASLP : 1; // 7 00111 } bits; 00112 uint8_t octet; 00113 } ctrl_reg4_t; 00114 00115 typedef union { 00116 struct { // at 0x2e 00117 uint8_t INT_CFG_DRDY : 1; // 0 00118 uint8_t reserved1 : 1; // 1 00119 uint8_t INT_CFG_FF_MT : 1; // 2 00120 uint8_t INT_CFG_PULSE : 1; // 3 00121 uint8_t INT_CFG_LNDPRT : 1; // 4 00122 uint8_t INT_CFG_TRANS : 1; // 5 00123 uint8_t reserved6 : 1; // 6 00124 uint8_t INT_CFG_ASLP : 1; // 7 00125 } bits; 00126 uint8_t octet; 00127 } ctrl_reg5_t; 00128 00129 class MMA8451Q { 00130 public: 00131 MMA8451Q(I2C& r, DigitalIn& int_pin); 00132 ~MMA8451Q(); 00133 void print_regs(void); 00134 void set_active(char); 00135 bool get_active(void); 00136 00137 uint8_t read_single(uint8_t addr); 00138 void read(uint8_t addr, uint8_t *dst_buf, int length); 00139 void write(uint8_t addr, uint8_t data); 00140 void transient_detect(void); 00141 void orient_detect(void); 00142 uint8_t service(void); // returns 0 if no interrupt occurred 00143 00144 bool verbose; // print interrupt event 00145 mma_out_t out; 00146 transient_cfg_t transient_cfg; 00147 ctrl_reg1_t ctrl_reg1; 00148 ctrl_reg4_t ctrl_reg4; 00149 ctrl_reg5_t ctrl_reg5; 00150 00151 private: 00152 I2C& m_i2c; 00153 DigitalIn& m_int_pin; 00154 }; 00155
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