wayne roberts / Mbed OS i2c_lora_slave

operate LoRa radio over I2C

Dependencies:   TimeoutAbs lib_i2c_slave_block sx12xx_hal

radio chip selection

Radio chip driver is not included, allowing choice of radio device.
If you're using SX1272 or SX1276, then import sx127x driver into your program.
if you're using SX1261 or SX1262, then import sx126x driver into your program.
if you're using SX1280, then import sx1280 driver into your program.
If you're using NAmote72 or Murata discovery, then you must import only sx127x driver.

This project is used as slave device with i2c_lora_master on raspberry pi. This i2c_lora_slave offloads the real-time requirements onto microcontroller. Also permits multiple slave radio devices connected to master. Radio MAC layer exists on I2C master, along with application layer.

If beacon operation is enabled, I2C functions which access radio chip are blocked while beacon is loaded and transmitted.
See lib_i2c_slave_block for wiring connections.

device_sx126x.cpp@0:9eb5b8bf9f7b, 2019-02-08 (annotated)

Committer:
Wayne Roberts
Date:
Fri Feb 08 11:58:09 2019 -0800
Revision:
0:9eb5b8bf9f7b
first commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Wayne Roberts 0:9eb5b8bf9f7b 1 #include "radio_device.h"
Wayne Roberts 0:9eb5b8bf9f7b 2 #ifdef SX126x_H
Wayne Roberts 0:9eb5b8bf9f7b 3 void get_opmode()
Wayne Roberts 0:9eb5b8bf9f7b 4 {
Wayne Roberts 0:9eb5b8bf9f7b 5 status_t status;
Wayne Roberts 0:9eb5b8bf9f7b 6 Radio::radio.xfer(OPCODE_GET_STATUS, 0, 1, &status.octet);
Wayne Roberts 0:9eb5b8bf9f7b 7
Wayne Roberts 0:9eb5b8bf9f7b 8 switch (status.bits.chipMode) {
Wayne Roberts 0:9eb5b8bf9f7b 9 case 2: // STBY_RC
Wayne Roberts 0:9eb5b8bf9f7b 10 case 3: // STBY_XOSC
Wayne Roberts 0:9eb5b8bf9f7b 11 irq.buf[1] = OPMODE_STANDBY;
Wayne Roberts 0:9eb5b8bf9f7b 12 break;
Wayne Roberts 0:9eb5b8bf9f7b 13 case 4: // FS
Wayne Roberts 0:9eb5b8bf9f7b 14 irq.buf[1] = OPMODE_FS;
Wayne Roberts 0:9eb5b8bf9f7b 15 break;
Wayne Roberts 0:9eb5b8bf9f7b 16 case 5: // RX
Wayne Roberts 0:9eb5b8bf9f7b 17 irq.buf[1] = OPMODE_RX;
Wayne Roberts 0:9eb5b8bf9f7b 18 break;
Wayne Roberts 0:9eb5b8bf9f7b 19 case 6: // TX
Wayne Roberts 0:9eb5b8bf9f7b 20 irq.buf[1] = OPMODE_TX;
Wayne Roberts 0:9eb5b8bf9f7b 21 break;
Wayne Roberts 0:9eb5b8bf9f7b 22 default:
Wayne Roberts 0:9eb5b8bf9f7b 23 irq.buf[1] = OPMODE_FAIL;
Wayne Roberts 0:9eb5b8bf9f7b 24 break;
Wayne Roberts 0:9eb5b8bf9f7b 25 }
Wayne Roberts 0:9eb5b8bf9f7b 26
Wayne Roberts 0:9eb5b8bf9f7b 27 irq.fields.flags.irq_type = IRQ_TYPE_OPMODE;
Wayne Roberts 0:9eb5b8bf9f7b 28 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 29 }
Wayne Roberts 0:9eb5b8bf9f7b 30
Wayne Roberts 0:9eb5b8bf9f7b 31 void get_lora_packet()
Wayne Roberts 0:9eb5b8bf9f7b 32 {
Wayne Roberts 0:9eb5b8bf9f7b 33 loraConfig1_t conf1;
Wayne Roberts 0:9eb5b8bf9f7b 34 loraConfig2_t conf2;
Wayne Roberts 0:9eb5b8bf9f7b 35 //LoRaPacketConfig(unsigned preambleLen, bool fixLen, bool crcOn, bool invIQ)
Wayne Roberts 0:9eb5b8bf9f7b 36 uint32_t val = Radio::radio.readReg(REG_ADDR_LORA_PREAMBLE_SYMBNB, 2);
Wayne Roberts 0:9eb5b8bf9f7b 37 irq.buf[1] = val & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 38 val >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 39 irq.buf[2] = val & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 40
Wayne Roberts 0:9eb5b8bf9f7b 41 conf1.octet = Radio::radio.readReg(REG_ADDR_LORA_CONFIG1, 1);
Wayne Roberts 0:9eb5b8bf9f7b 42 irq.buf[3] = conf1.bits.implicit_header;
Wayne Roberts 0:9eb5b8bf9f7b 43 irq.buf[4] = conf1.bits.rx_invert_iq;
Wayne Roberts 0:9eb5b8bf9f7b 44
Wayne Roberts 0:9eb5b8bf9f7b 45 conf2.octet = Radio::radio.readReg(REG_ADDR_LORA_CONFIG2, 1);
Wayne Roberts 0:9eb5b8bf9f7b 46 irq.buf[5] = conf2.bits.tx_payload_crc16_en;
Wayne Roberts 0:9eb5b8bf9f7b 47
Wayne Roberts 0:9eb5b8bf9f7b 48 irq.fields.flags.irq_type = IRQ_TYPE_LORA_PKT;
Wayne Roberts 0:9eb5b8bf9f7b 49 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 50 }
Wayne Roberts 0:9eb5b8bf9f7b 51
Wayne Roberts 0:9eb5b8bf9f7b 52 const uint8_t loraBWs[] = {
Wayne Roberts 0:9eb5b8bf9f7b 53 LORA_BW_7, LORA_BW_10, LORA_BW_15,
Wayne Roberts 0:9eb5b8bf9f7b 54 LORA_BW_20, LORA_BW_31, LORA_BW_41,
Wayne Roberts 0:9eb5b8bf9f7b 55 LORA_BW_62, LORA_BW_125, LORA_BW_250,
Wayne Roberts 0:9eb5b8bf9f7b 56 LORA_BW_500
Wayne Roberts 0:9eb5b8bf9f7b 57 };
Wayne Roberts 0:9eb5b8bf9f7b 58
Wayne Roberts 0:9eb5b8bf9f7b 59 void get_lora_modem()
Wayne Roberts 0:9eb5b8bf9f7b 60 {
Wayne Roberts 0:9eb5b8bf9f7b 61 uint16_t khz = 0;
Wayne Roberts 0:9eb5b8bf9f7b 62 loraConfig1_t conf1;
Wayne Roberts 0:9eb5b8bf9f7b 63 loraConfig0_t conf0;
Wayne Roberts 0:9eb5b8bf9f7b 64 conf0.octet = Radio::radio.readReg(REG_ADDR_LORA_CONFIG0, 1);
Wayne Roberts 0:9eb5b8bf9f7b 65
Wayne Roberts 0:9eb5b8bf9f7b 66 switch (conf0.bits.modem_bw) {
Wayne Roberts 0:9eb5b8bf9f7b 67 case LORA_BW_7: khz = 8; break; // 7.81 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 68 case LORA_BW_10: khz = 10; break; // 10.42 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 69 case LORA_BW_15: khz = 16; break; // 15.63 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 70 case LORA_BW_20: khz = 21; break; // 20.83 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 71 case LORA_BW_31: khz = 31; break; // 31.25 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 72 case LORA_BW_41: khz = 42; break; // 41.67 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 73 case LORA_BW_62: khz = 63; break; // 62.50 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 74 case LORA_BW_125: khz = 125; break; // 125 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 75 case LORA_BW_250: khz = 250; break; // 250 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 76 case LORA_BW_500: khz = 500; break; // 500 kHz real
Wayne Roberts 0:9eb5b8bf9f7b 77 }
Wayne Roberts 0:9eb5b8bf9f7b 78
Wayne Roberts 0:9eb5b8bf9f7b 79 irq.buf[1] = khz & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 80 khz >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 81 irq.buf[2] = khz & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 82
Wayne Roberts 0:9eb5b8bf9f7b 83 //LoRaModemConfig(unsigned KHz, unsigned sf, unsigned cr)
Wayne Roberts 0:9eb5b8bf9f7b 84 irq.buf[3] = conf0.bits.modem_sf;
Wayne Roberts 0:9eb5b8bf9f7b 85
Wayne Roberts 0:9eb5b8bf9f7b 86 conf1.octet = Radio::radio.readReg(REG_ADDR_LORA_CONFIG1, 1);
Wayne Roberts 0:9eb5b8bf9f7b 87 irq.buf[4] = conf1.bits.tx_coding_rate;
Wayne Roberts 0:9eb5b8bf9f7b 88
Wayne Roberts 0:9eb5b8bf9f7b 89 irq.fields.flags.irq_type = IRQ_TYPE_LORA_MODEM;
Wayne Roberts 0:9eb5b8bf9f7b 90 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 91 }
Wayne Roberts 0:9eb5b8bf9f7b 92
Wayne Roberts 0:9eb5b8bf9f7b 93 void get_tx_dbm()
Wayne Roberts 0:9eb5b8bf9f7b 94 {
Wayne Roberts 0:9eb5b8bf9f7b 95 int8_t dbm;
Wayne Roberts 0:9eb5b8bf9f7b 96 PwrCtrl_t PwrCtrl;
Wayne Roberts 0:9eb5b8bf9f7b 97 PaCtrl1b_t PaCtrl1b;
Wayne Roberts 0:9eb5b8bf9f7b 98 unsigned v = Radio::radio.readReg(REG_ADDR_ANACTRL16, 1);
Wayne Roberts 0:9eb5b8bf9f7b 99
Wayne Roberts 0:9eb5b8bf9f7b 100 if (v & 0x10) {
Wayne Roberts 0:9eb5b8bf9f7b 101 dbm = PA_OFF_DBM;
Wayne Roberts 0:9eb5b8bf9f7b 102 goto dbmDone;
Wayne Roberts 0:9eb5b8bf9f7b 103 }
Wayne Roberts 0:9eb5b8bf9f7b 104
Wayne Roberts 0:9eb5b8bf9f7b 105 PwrCtrl.octet = Radio::radio.readReg(REG_ADDR_PWR_CTRL, 1);
Wayne Roberts 0:9eb5b8bf9f7b 106
Wayne Roberts 0:9eb5b8bf9f7b 107 PaCtrl1b.octet = Radio::radio.readReg(REG_ADDR_PA_CTRL1B, 1);
Wayne Roberts 0:9eb5b8bf9f7b 108 // PaCtrl1b.bits.tx_mode_bat --- deviceSel
Wayne Roberts 0:9eb5b8bf9f7b 109
Wayne Roberts 0:9eb5b8bf9f7b 110 if (PaCtrl1b.bits.tx_mode_bat)
Wayne Roberts 0:9eb5b8bf9f7b 111 dbm = PwrCtrl.bits.tx_pwr - 17;
Wayne Roberts 0:9eb5b8bf9f7b 112 else
Wayne Roberts 0:9eb5b8bf9f7b 113 dbm = PwrCtrl.bits.tx_pwr - 9;
Wayne Roberts 0:9eb5b8bf9f7b 114
Wayne Roberts 0:9eb5b8bf9f7b 115 dbmDone:
Wayne Roberts 0:9eb5b8bf9f7b 116 irq.buf[1] = dbm;
Wayne Roberts 0:9eb5b8bf9f7b 117 irq.fields.flags.irq_type = IRQ_TYPE_TXDBM;
Wayne Roberts 0:9eb5b8bf9f7b 118 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 119 }
Wayne Roberts 0:9eb5b8bf9f7b 120
Wayne Roberts 0:9eb5b8bf9f7b 121 void get_fsk_sync()
Wayne Roberts 0:9eb5b8bf9f7b 122 {
Wayne Roberts 0:9eb5b8bf9f7b 123 unsigned idx = 1;
Wayne Roberts 0:9eb5b8bf9f7b 124 unsigned addr = REG_ADDR_SYNCADDR;
Wayne Roberts 0:9eb5b8bf9f7b 125 uint8_t swl_bits = Radio::radio.readReg(REG_ADDR_FSK_SYNC_LEN, 1);
Wayne Roberts 0:9eb5b8bf9f7b 126 if (swl_bits & 7) {
Wayne Roberts 0:9eb5b8bf9f7b 127 swl_bits |= 7;
Wayne Roberts 0:9eb5b8bf9f7b 128 swl_bits++;
Wayne Roberts 0:9eb5b8bf9f7b 129 }
Wayne Roberts 0:9eb5b8bf9f7b 130 irq.buf[idx++] = swl_bits >> 3;
Wayne Roberts 0:9eb5b8bf9f7b 131
Wayne Roberts 0:9eb5b8bf9f7b 132 while (swl_bits > 0) {
Wayne Roberts 0:9eb5b8bf9f7b 133 irq.buf[idx++] = Radio::radio.readReg(addr++, 1);
Wayne Roberts 0:9eb5b8bf9f7b 134 swl_bits -= 8;
Wayne Roberts 0:9eb5b8bf9f7b 135 }
Wayne Roberts 0:9eb5b8bf9f7b 136
Wayne Roberts 0:9eb5b8bf9f7b 137 irq.fields.flags.irq_type = IRQ_TYPE_FSK_SYNC;
Wayne Roberts 0:9eb5b8bf9f7b 138 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 139 }
Wayne Roberts 0:9eb5b8bf9f7b 140
Wayne Roberts 0:9eb5b8bf9f7b 141 void get_fsk_modem()
Wayne Roberts 0:9eb5b8bf9f7b 142 {
Wayne Roberts 0:9eb5b8bf9f7b 143 uint32_t u32;
Wayne Roberts 0:9eb5b8bf9f7b 144 bwSel_t bwSel;
Wayne Roberts 0:9eb5b8bf9f7b 145 // GFSKModemConfig(unsigned bps, unsigned bwKHz, unsigned fdev_hz)
Wayne Roberts 0:9eb5b8bf9f7b 146
Wayne Roberts 0:9eb5b8bf9f7b 147 unsigned d = Radio::radio.readReg(REG_ADDR_BITRATE, 3);
Wayne Roberts 0:9eb5b8bf9f7b 148 float f = d / 32.0;
Wayne Roberts 0:9eb5b8bf9f7b 149
Wayne Roberts 0:9eb5b8bf9f7b 150 u32 = XTAL_FREQ_HZ / f;
Wayne Roberts 0:9eb5b8bf9f7b 151 irq.buf[1] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 152 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 153 irq.buf[2] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 154 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 155 irq.buf[3] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 156 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 157 irq.buf[4] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 158
Wayne Roberts 0:9eb5b8bf9f7b 159 bwSel.octet = Radio::radio.readReg(REG_ADDR_BWSEL, 1);
Wayne Roberts 0:9eb5b8bf9f7b 160 switch (bwSel.octet) {
Wayne Roberts 0:9eb5b8bf9f7b 161 case GFSK_RX_BW_4800: u32 = 4800; break;
Wayne Roberts 0:9eb5b8bf9f7b 162 case GFSK_RX_BW_5800: u32 = 5800; break;
Wayne Roberts 0:9eb5b8bf9f7b 163 case GFSK_RX_BW_7300: u32 = 7300; break;
Wayne Roberts 0:9eb5b8bf9f7b 164 case GFSK_RX_BW_9700: u32 = 9700; break;
Wayne Roberts 0:9eb5b8bf9f7b 165 case GFSK_RX_BW_11700: u32 = 11700; break;
Wayne Roberts 0:9eb5b8bf9f7b 166 case GFSK_RX_BW_14600: u32 = 14600; break;
Wayne Roberts 0:9eb5b8bf9f7b 167 case GFSK_RX_BW_19500: u32 = 19500; break;
Wayne Roberts 0:9eb5b8bf9f7b 168 case GFSK_RX_BW_23400: u32 = 23400; break;
Wayne Roberts 0:9eb5b8bf9f7b 169 case GFSK_RX_BW_29300: u32 = 29300; break;
Wayne Roberts 0:9eb5b8bf9f7b 170 case GFSK_RX_BW_39000: u32 = 39000; break;
Wayne Roberts 0:9eb5b8bf9f7b 171 case GFSK_RX_BW_46900: u32 = 46900; break;
Wayne Roberts 0:9eb5b8bf9f7b 172 case GFSK_RX_BW_58600: u32 = 58600; break;
Wayne Roberts 0:9eb5b8bf9f7b 173 case GFSK_RX_BW_78200: u32 = 78200; break;
Wayne Roberts 0:9eb5b8bf9f7b 174 case GFSK_RX_BW_93800: u32 = 93800; break;
Wayne Roberts 0:9eb5b8bf9f7b 175 case GFSK_RX_BW_117300: u32 = 117300; break;
Wayne Roberts 0:9eb5b8bf9f7b 176 case GFSK_RX_BW_156200: u32 = 156200; break;
Wayne Roberts 0:9eb5b8bf9f7b 177 case GFSK_RX_BW_187200: u32 = 187200; break;
Wayne Roberts 0:9eb5b8bf9f7b 178 case GFSK_RX_BW_234300: u32 = 234300; break;
Wayne Roberts 0:9eb5b8bf9f7b 179 case GFSK_RX_BW_312000: u32 = 312000; break;
Wayne Roberts 0:9eb5b8bf9f7b 180 case GFSK_RX_BW_373600: u32 = 373600; break;
Wayne Roberts 0:9eb5b8bf9f7b 181 case GFSK_RX_BW_467000: u32 = 467000; break;
Wayne Roberts 0:9eb5b8bf9f7b 182 }
Wayne Roberts 0:9eb5b8bf9f7b 183
Wayne Roberts 0:9eb5b8bf9f7b 184 irq.buf[5] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 185 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 186 irq.buf[6] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 187
Wayne Roberts 0:9eb5b8bf9f7b 188 d = Radio::radio.readReg(REG_ADDR_FREQDEV, 3);
Wayne Roberts 0:9eb5b8bf9f7b 189 u32 = d * FREQ_STEP;
Wayne Roberts 0:9eb5b8bf9f7b 190 irq.buf[7] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 191 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 192 irq.buf[8] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 193 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 194 irq.buf[9] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 195 u32 >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 196 irq.buf[10] = u32 & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 197
Wayne Roberts 0:9eb5b8bf9f7b 198 irq.fields.flags.irq_type = IRQ_TYPE_FSK_MODEM;
Wayne Roberts 0:9eb5b8bf9f7b 199 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 200 }
Wayne Roberts 0:9eb5b8bf9f7b 201
Wayne Roberts 0:9eb5b8bf9f7b 202 void get_fsk_packet()
Wayne Roberts 0:9eb5b8bf9f7b 203 {
Wayne Roberts 0:9eb5b8bf9f7b 204 pktCtrl0_t pktCtrl0;
Wayne Roberts 0:9eb5b8bf9f7b 205 pktCtrl2_t pktCtrl2;
Wayne Roberts 0:9eb5b8bf9f7b 206 // GFSKPacketConfig(unsigned preambleLen, bool fixLen, bool crcOn)
Wayne Roberts 0:9eb5b8bf9f7b 207 unsigned pl = Radio::radio.readReg(REG_ADDR_FSK_PREAMBLE_TXLEN , 2);
Wayne Roberts 0:9eb5b8bf9f7b 208 irq.buf[1] = pl & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 209 pl >>= 8;
Wayne Roberts 0:9eb5b8bf9f7b 210 irq.buf[2] = pl & 0xff;
Wayne Roberts 0:9eb5b8bf9f7b 211
Wayne Roberts 0:9eb5b8bf9f7b 212 pktCtrl0.octet = Radio::radio.readReg(REG_ADDR_FSK_PKTCTRL0, 1);
Wayne Roberts 0:9eb5b8bf9f7b 213 irq.buf[3] = pktCtrl0.bits.pkt_len_format; // true = fixed
Wayne Roberts 0:9eb5b8bf9f7b 214
Wayne Roberts 0:9eb5b8bf9f7b 215 pktCtrl2.octet = Radio::radio.readReg(REG_ADDR_FSK_PKTCTRL2, 1);
Wayne Roberts 0:9eb5b8bf9f7b 216 switch (pktCtrl2.octet & 0x7) { // param8
Wayne Roberts 0:9eb5b8bf9f7b 217 case GFSK_CRC_OFF: irq.buf[4] = 0;
Wayne Roberts 0:9eb5b8bf9f7b 218 case GFSK_CRC_1_BYTE: irq.buf[4] = 1;
Wayne Roberts 0:9eb5b8bf9f7b 219 case GFSK_CRC_2_BYTE: irq.buf[4] = 2;
Wayne Roberts 0:9eb5b8bf9f7b 220 case GFSK_CRC_1_BYTE_INV: irq.buf[4] = 3;
Wayne Roberts 0:9eb5b8bf9f7b 221 case GFSK_CRC_2_BYTE_INV: irq.buf[4] = 4;
Wayne Roberts 0:9eb5b8bf9f7b 222 default: irq.buf[4] = 5;
Wayne Roberts 0:9eb5b8bf9f7b 223 }
Wayne Roberts 0:9eb5b8bf9f7b 224
Wayne Roberts 0:9eb5b8bf9f7b 225 irq.fields.flags.irq_type = IRQ_TYPE_FSK_PKT;
Wayne Roberts 0:9eb5b8bf9f7b 226 irqOutPin = 1;
Wayne Roberts 0:9eb5b8bf9f7b 227 }
Wayne Roberts 0:9eb5b8bf9f7b 228
Wayne Roberts 0:9eb5b8bf9f7b 229 void radio_reset()
Wayne Roberts 0:9eb5b8bf9f7b 230 {
Wayne Roberts 0:9eb5b8bf9f7b 231 #ifdef TARGET_FF_ARDUINO
Wayne Roberts 0:9eb5b8bf9f7b 232 #define PINNAME_NRST A0
Wayne Roberts 0:9eb5b8bf9f7b 233 Radio::radio.hw_reset(PINNAME_NRST);
Wayne Roberts 0:9eb5b8bf9f7b 234 #else
Wayne Roberts 0:9eb5b8bf9f7b 235 #error reset_pin
Wayne Roberts 0:9eb5b8bf9f7b 236 #endif
Wayne Roberts 0:9eb5b8bf9f7b 237 }
Wayne Roberts 0:9eb5b8bf9f7b 238
Wayne Roberts 0:9eb5b8bf9f7b 239 void radio_device_init()
Wayne Roberts 0:9eb5b8bf9f7b 240 {
Wayne Roberts 0:9eb5b8bf9f7b 241 }
Wayne Roberts 0:9eb5b8bf9f7b 242
Wayne Roberts 0:9eb5b8bf9f7b 243 #endif /* ..SX126x_H */