UART console application for testing SX1272/SX1276

Dependencies:   SX127x

/media/uploads/dudmuck/lora.png

This is a UART console test application for using SX127x library driver for SX1272/SX1276 radio transceivers. Serial console is provided at 57600bps. Refer to Serial Communication with a PC for information about using the serial port with your PC.

Using this command interface, you can exercise the functionality of radio chip without needing specialized software application for your PC.

Commands which can be used include ? to list available commands, or . to query status from radio chip, for example. The serial console allows you to configure the radio chip, such as setting spreading factor, bandwidth, operating frequency, etc.

A simple chat application is provided to try communications between two boards. The SX127x library object is instantiated with pin assignments generic arduino headers, but can be easily reassigned for any mbed board.

The same driver library can operate for both SX1272 and SX1276. Upon starting, the driver auto-detects whether SX1272 or SX1276 transceiver chip is connected by attempting to change the LowFrequencyModeOn bit in RegOpMode register. If this bit can be changed, then the radio device is SX1276. This bit is not implemented in SX1272. A few of the radio driver functions select behavior based on this detection. The differences between these two devices is small, from a software perspective.

Using with SX1276MB1xAS Shield

This component plugs into any board with arduino uno headers.

There are two different version of this shield. European version (MAS), and North American (LAS). The LAS shield uses PA_BOOST transmit pin to permit +20dBm power. The MAS version uses RFO transmit pin in Europe. This software reads RF switch pin (A4 pin) pulling resistor to determine which type of shield is installed.


Using with your own production board

This software is useful for validating RF performance your own LoRa board design, because only two external pins needs to be provided to PC (UART TX/RX). You can select an mbed platform which matches the CPU on your own board. If the memory size doesnt match exactly, you can export the program to an offline toolchain and edit the target type or linker file there.

Transmitter Test Guidelines

FSK mode is used for transmitter testing, because an unmodulated carrier can be sent, permitting easy measurement of TX power and frequency error.

commands used for transmitter testing:

  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • L to toggle the radio chip into FSK mode.
  • fdev0 to configure TX frequency deviation to zero, to put the transmitted carrier on the center frequency.
  • pas to select which TX pin is connected to antenna matching (RFO vs PA_BOOST).
  • op<dBm> to configure TX power.
  • If you desire to test higher power PA_BOOST, use ocp<mA>
  • w 01 03 put radio chip into transmit mode (skips writing to FIFO). This will cause radio to transmit preamble, because the FIFO is empty in TX mode. Since Fdev is zero, an unmodulated carrier is sent.
  • Spectrum analyzer can now be used to to observe TX power, harmonics, power consumption, or frequency error.
  • stby to end transmission, or use h to reset radio chip to default condition.
  • Use period . command at any time to review current radio configuration.

LoRa transmitter testing

  • use L command to toggle radio into LoRa, if necessary.
  • Normally the tx command is used to manually send single packets.
  • txc will toggle TxContinuousMode in LoRa modem to send continuous modulated transmission.
  • Useful for checking adjacent channel power.
  • enter txc again to end transmission.

Receiver Test Guidelines

FSK mode is used for receiver sensitivity testing, allowing the use of a BERT signal generator (such as R/S SMIQ03B). Using this method provides real-time indication of receiver sensitivity, useful for tuning and impedance matching. The radio chip outputs DCLK and DATA digital signals which are connected back to BERT signal generator.

commands used for receiver testing:

  • L to toggle the radio chip into FSK mode.
  • datam to toggle FSK modem into continuous mode. This disables packet engine and gives direct access to demodulator.
  • configure DIO1 pin to DCLK function, and DIO2 pin to DATA function:
    • dio command to list current DIO pin asignments
    • d1 to cycle DIO1 function until Dclk is selected
    • d2 for DIO2, only Data function is available in FSK continuous mode
  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • rx to start receiver
  • stby to disable receiver

Full command list

Arguments shown in square brackets [] indicate required. <> are optional, where leaving off the argument usually causes a read of the item, and providing the value causes a write operation. You should always have the radio chip datasheet on-hand when using these commands.

Hitting <enter> key by itself will repeat last command.
<Ctrl-C> will cancel an operation in progress.

command list: common commands (both LoRa and FSK)

commanddescription
. (period)print current radio status
?list available commands
Ltoggle active radio modem (LoRa vs FSK)
hhardware reset, put radio into default power-on condition
frf<MHz>get/set RF operating frequency
rxstart radio receiver (any received packets are printed onto your serial terminal)
rssiread instantaneous RSSI (level read at the time command is issued)
tx<%d>transmit test packet. Packet length value can be provided as argument, or uses last value if not provided
payl<%d>get/set payload length
bw<KHz>get/set bandwidth. In LoRa mode, both receive and transmit bandwidth are changed. For FSK, only receive bandwidth is affected. bwa accesses AFC bandwidth in FSK
pastoggle RFO / PA_BOOST transmit pin output selection
op<dBm>get/set TX output power. Value is provided in dBm. Special case is value of 20dBm (on PA_BOOST), which causes increase in TX DAC voltage
ocp<mA>get/set TX current limit, in milliamps. Necessary adjustment when +20dBm is used
dioshow DIO pin assignments
d<0-5>change DIO pin assignment, the pin number is given as arguement. Each pin has up to 4 possible functions
pres<%d>set preamble length. LoRa: number of symbols. FSK: number of bytes
crcontoggle crcOn
lnabcycle LNA-boost setting (receiver performance adjustment)
Rread all radio registers (use only while reading chip datasheet)
r[%x]read single radio register (use only while reading chip datasheet)
w[%x %x]write single radio register (use only while reading chip datasheet)
pllbwchange PLL bandwidth
stbyset chip mode to standby
sleepset chip mode to sleep
fstxset chip mode to fstx
fsrxset chip mode to fsrx
Eiger range test commandsdescription
pid<%d>get set ID number in range test payload
pertx<%d>start Eiger PER transmit. The count of packets to send is provided as arguement
perrxstart Eiger PER receive
txpd<%d>get/set tx delay between PER packets transmitted

command list: LoRa modem commands

LoRa commandLoRa description
iqinvtoggle RX IQ invert
cintoggle TX IQ invert
lhp<%d>(RX) get/set hop period
sync<%x>get/set sync (post-preamble gap, single byte)
cr<1-4>get/set codingRate
lhmtoggle explicit/implicit (explicit mode sends payload length with each packet)
sf<%d>get/set spreadingFactor (SF7 to SF12)
ldrtoggle LowDataRateOptimize (changes payload encoding, for long packets)
txctoggle TxContinuousMode
rxt<%d>get/set SymbTimeout
rxsstart RX_SINGLE (receives only for SymbTimeout symbols)
cad<%d num tries>run channel activity detection

command list: FSK modem commands

FSK commandFSK description
c<%d>get/set test cases. Several FSK bitrates/bandwidths pre-configured to give optimal performance.
fdev<kHz>(TX) get/set frequency deviation
mods(TX) increment modulation shaping
par(TX) increment paRamp
datamtoggle DataMode (packet/continuous)
fifottoggle TxStartCondition (FifoThreshold level vs FifoNotEmpty)
br<%f kbps>get/set bitrate
dcfincrement DcFree (manchester / whitening)
pktftoggle PacketFormat fixed/variable length
syncontoggle SyncOn (frame sync, SFD enable)
bitsynctoggle BitSyncOn (continuous mode only)
syncw<hex bytes>get/set syncword. Sync bytes are provided by hex octects separated by spaces.
fei(RX) read FEI
rxt(RX) increment RxTrigger (RX start on rssi vs. preamble detect)
rssit<-dBm>(RX) get/set rssi threshold (trigger level for RSSI interrupt)
rssis<%d>(RX) get/set rssi smoothing
rssio<%d>(RX) get/set rssi offset
agcauto(RX) toggle AgcAutoOn (true = LNA gain set automatically)
afcauto(RX) toggle AfcAutoOn
ac(RX) AfcClear
ar(RX) increment AutoRestartRxMode
alc(RX) toggle AfcAutoClearOn (only if AfcAutoOn is set)
prep(RX) toggle PreamblePolarity (0xAA vs 0x55)
pde(RX) toggle PreambleDetectorOn
pds<%d>(RX) get/set PreambleDetectorSize
pdt<%d>(RX) get/set PreambleDetectorTol
mp(RX) toggle MapPreambleDetect (DIO function RSSI vs PreambleDetect)
thr<%d>get/set FifoThreshold (triggers FifoLevel interrupt)
polltoggle poll_irq_en. Radio events read from DIO pins vs polling of IrqFlags register
Eempty out FIFO
clkoutincrement ClkOut divider
ookenter OOK mode
ooktincrement OokThreshType
ooksincrement OokPeakTheshStep
sqlch<%d>get/set OokFixedThresh
Committer:
dudmuck
Date:
Thu Jul 28 00:58:55 2016 +0000
Revision:
18:9530d682fd9a
Parent:
16:b9d36c60f2d3
Child:
19:be8a8b0e7320
command menu items moved to array for better organization

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 1:1cd0afbed23c 1 #include "sx127x_lora.h"
dudmuck 1:1cd0afbed23c 2 #include "sx127x_fsk.h"
dudmuck 18:9530d682fd9a 3 //#include "kermit.h"
dudmuck 0:be215de91a68 4
dudmuck 13:c73caaee93a5 5 //#define FSK_PER
dudmuck 10:d9bb2ce57f05 6 //#define START_EIGER_RX
dudmuck 10:d9bb2ce57f05 7 //#define START_EIGER_TX
dudmuck 10:d9bb2ce57f05 8
dudmuck 10:d9bb2ce57f05 9 DigitalOut led1(LED1);
dudmuck 0:be215de91a68 10 Serial pc(USBTX, USBRX);
dudmuck 0:be215de91a68 11
dudmuck 0:be215de91a68 12 uint8_t tx_cnt;
dudmuck 0:be215de91a68 13 char pcbuf[64];
dudmuck 5:360069ec9953 14 int pcbuf_len;
dudmuck 0:be215de91a68 15
dudmuck 0:be215de91a68 16 typedef enum {
dudmuck 0:be215de91a68 17 APP_NONE = 0,
dudmuck 0:be215de91a68 18 APP_CHAT
dudmuck 0:be215de91a68 19 } app_e;
dudmuck 0:be215de91a68 20
dudmuck 0:be215de91a68 21 app_e app = APP_NONE;
dudmuck 0:be215de91a68 22
dudmuck 18:9530d682fd9a 23 #define FSK_LARGE_PKT_THRESHOLD 0x3f
dudmuck 7:c3c54f222ced 24
dudmuck 18:9530d682fd9a 25 bool ook_test_en;
dudmuck 18:9530d682fd9a 26 bool poll_irq_en;
dudmuck 1:1cd0afbed23c 27
dudmuck 8:227605e4a760 28 /***************************** eiger per: *************************************************/
dudmuck 8:227605e4a760 29
dudmuck 18:9530d682fd9a 30 uint32_t num_cads;
dudmuck 18:9530d682fd9a 31 bool cadper_enable;
dudmuck 8:227605e4a760 32 bool per_en;
dudmuck 8:227605e4a760 33 float per_tx_delay = 0.1;
dudmuck 8:227605e4a760 34 int per_id;
dudmuck 18:9530d682fd9a 35 uint32_t PacketTxCnt, PacketTxCntEnd;
dudmuck 8:227605e4a760 36 uint32_t PacketPerOkCnt;
dudmuck 8:227605e4a760 37 int PacketRxSequencePrev;
dudmuck 8:227605e4a760 38 uint32_t PacketPerKoCnt;
dudmuck 8:227605e4a760 39 uint32_t PacketNormalCnt;
dudmuck 8:227605e4a760 40 Timeout per_timeout;
dudmuck 8:227605e4a760 41
dudmuck 18:9530d682fd9a 42
dudmuck 18:9530d682fd9a 43
dudmuck 0:be215de91a68 44 /******************************************************************************/
dudmuck 9:2f13a9ef27b4 45 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 9:2f13a9ef27b4 46 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 9:2f13a9ef27b4 47 SX127x radio(LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1);
dudmuck 9:2f13a9ef27b4 48
dudmuck 9:2f13a9ef27b4 49 DigitalOut txctl(LORA_TXCTL);
dudmuck 9:2f13a9ef27b4 50 DigitalOut rxctl(LORA_RXCTL);
dudmuck 9:2f13a9ef27b4 51
dudmuck 9:2f13a9ef27b4 52 void rfsw_callback()
dudmuck 9:2f13a9ef27b4 53 {
dudmuck 9:2f13a9ef27b4 54 /* SKY13350 */
dudmuck 9:2f13a9ef27b4 55 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission
dudmuck 9:2f13a9ef27b4 56 txctl = 1;
dudmuck 9:2f13a9ef27b4 57 rxctl = 0;
dudmuck 9:2f13a9ef27b4 58 } else { // reception:
dudmuck 9:2f13a9ef27b4 59 txctl = 0;
dudmuck 9:2f13a9ef27b4 60 rxctl = 1;
dudmuck 9:2f13a9ef27b4 61 }
dudmuck 9:2f13a9ef27b4 62 }
dudmuck 9:2f13a9ef27b4 63
dudmuck 15:c69b942685ea 64 #define FSK_RSSI_OFFSET 0
dudmuck 15:c69b942685ea 65 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 66
dudmuck 9:2f13a9ef27b4 67 #else /********************* ...mDot **********************/
dudmuck 0:be215de91a68 68
dudmuck 5:360069ec9953 69 // pin: 3 8 1 7 10 12 5
dudmuck 5:360069ec9953 70 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 6:fe16f96ee335 71 SX127x radio(D11, D12, D13, D10, A0, D2, D3); // sx1276 arduino shield
dudmuck 0:be215de91a68 72
dudmuck 15:c69b942685ea 73 // for SX1276 arduino shield:
dudmuck 7:c3c54f222ced 74 #ifdef TARGET_LPC11U6X
dudmuck 15:c69b942685ea 75 //DigitalOut rfsw(P0_23);
dudmuck 15:c69b942685ea 76 DigitalInOut rfsw(P0_23);
dudmuck 7:c3c54f222ced 77 #else
dudmuck 15:c69b942685ea 78 //DigitalOut rfsw(A4);
dudmuck 15:c69b942685ea 79 DigitalInOut rfsw(A4);
dudmuck 7:c3c54f222ced 80 #endif
dudmuck 6:fe16f96ee335 81
dudmuck 14:c57ea544dc18 82 DigitalIn dio2(D4);
dudmuck 14:c57ea544dc18 83
dudmuck 6:fe16f96ee335 84 void rfsw_callback()
dudmuck 6:fe16f96ee335 85 {
dudmuck 6:fe16f96ee335 86 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER)
dudmuck 6:fe16f96ee335 87 rfsw = 1;
dudmuck 6:fe16f96ee335 88 else
dudmuck 6:fe16f96ee335 89 rfsw = 0;
dudmuck 6:fe16f96ee335 90 }
dudmuck 6:fe16f96ee335 91
dudmuck 15:c69b942685ea 92 #define FSK_RSSI_OFFSET 5
dudmuck 15:c69b942685ea 93 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 94
dudmuck 15:c69b942685ea 95 typedef enum {
dudmuck 15:c69b942685ea 96 SHIELD_TYPE_NONE = 0,
dudmuck 15:c69b942685ea 97 SHIELD_TYPE_LAS,
dudmuck 15:c69b942685ea 98 SHIELD_TYPE_MAS,
dudmuck 15:c69b942685ea 99 } shield_type_e;
dudmuck 15:c69b942685ea 100 shield_type_e shield_type;
dudmuck 15:c69b942685ea 101
dudmuck 9:2f13a9ef27b4 102 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 9:2f13a9ef27b4 103
dudmuck 9:2f13a9ef27b4 104 SX127x_fsk fsk(radio);
dudmuck 9:2f13a9ef27b4 105 SX127x_lora lora(radio);
dudmuck 18:9530d682fd9a 106 //Kermit kermit(lora);
dudmuck 9:2f13a9ef27b4 107
dudmuck 0:be215de91a68 108 void printLoraIrqs_(bool clear)
dudmuck 0:be215de91a68 109 {
dudmuck 0:be215de91a68 110 //in radio class -- RegIrqFlags_t RegIrqFlags;
dudmuck 0:be215de91a68 111
dudmuck 0:be215de91a68 112 //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 113 printf("\r\nIrqFlags:");
dudmuck 1:1cd0afbed23c 114 if (lora.RegIrqFlags.bits.CadDetected)
dudmuck 0:be215de91a68 115 printf("CadDetected ");
dudmuck 1:1cd0afbed23c 116 if (lora.RegIrqFlags.bits.FhssChangeChannel) {
dudmuck 0:be215de91a68 117 //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 1:1cd0afbed23c 118 printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 0:be215de91a68 119 }
dudmuck 1:1cd0afbed23c 120 if (lora.RegIrqFlags.bits.CadDone)
dudmuck 0:be215de91a68 121 printf("CadDone ");
dudmuck 1:1cd0afbed23c 122 if (lora.RegIrqFlags.bits.TxDone)
dudmuck 0:be215de91a68 123 printf("TxDone ");
dudmuck 1:1cd0afbed23c 124 if (lora.RegIrqFlags.bits.ValidHeader)
dudmuck 0:be215de91a68 125 printf("ValidHeader ");
dudmuck 1:1cd0afbed23c 126 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 0:be215de91a68 127 printf("PayloadCrcError ");
dudmuck 1:1cd0afbed23c 128 if (lora.RegIrqFlags.bits.RxDone)
dudmuck 0:be215de91a68 129 printf("RxDone ");
dudmuck 1:1cd0afbed23c 130 if (lora.RegIrqFlags.bits.RxTimeout)
dudmuck 0:be215de91a68 131 printf("RxTimeout ");
dudmuck 0:be215de91a68 132
dudmuck 0:be215de91a68 133 printf("\r\n");
dudmuck 0:be215de91a68 134
dudmuck 0:be215de91a68 135 if (clear)
dudmuck 1:1cd0afbed23c 136 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 0:be215de91a68 137
dudmuck 0:be215de91a68 138 }
dudmuck 0:be215de91a68 139
dudmuck 1:1cd0afbed23c 140 void lora_printCodingRate(bool from_rx)
dudmuck 0:be215de91a68 141 {
dudmuck 1:1cd0afbed23c 142 uint8_t d = lora.getCodingRate(from_rx);
dudmuck 0:be215de91a68 143 printf("CodingRate:");
dudmuck 0:be215de91a68 144 switch (d) {
dudmuck 0:be215de91a68 145 case 1: printf("4/5 "); break;
dudmuck 0:be215de91a68 146 case 2: printf("4/6 "); break;
dudmuck 0:be215de91a68 147 case 3: printf("4/7 "); break;
dudmuck 0:be215de91a68 148 case 4: printf("4/8 "); break;
dudmuck 0:be215de91a68 149 default:
dudmuck 0:be215de91a68 150 printf("%d ", d);
dudmuck 0:be215de91a68 151 break;
dudmuck 0:be215de91a68 152 }
dudmuck 0:be215de91a68 153 }
dudmuck 0:be215de91a68 154
dudmuck 1:1cd0afbed23c 155 void lora_printHeaderMode()
dudmuck 0:be215de91a68 156 {
dudmuck 1:1cd0afbed23c 157 if (lora.getHeaderMode())
dudmuck 0:be215de91a68 158 printf("implicit ");
dudmuck 0:be215de91a68 159 else
dudmuck 0:be215de91a68 160 printf("explicit ");
dudmuck 0:be215de91a68 161 }
dudmuck 0:be215de91a68 162
dudmuck 1:1cd0afbed23c 163 void lora_printBw()
dudmuck 0:be215de91a68 164 {
dudmuck 1:1cd0afbed23c 165 uint8_t bw = lora.getBw();
dudmuck 0:be215de91a68 166
dudmuck 0:be215de91a68 167 printf("Bw:");
dudmuck 0:be215de91a68 168 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 169 switch (lora.RegModemConfig.sx1276bits.Bw) {
dudmuck 0:be215de91a68 170 case 0: printf("7.8KHz "); break;
dudmuck 0:be215de91a68 171 case 1: printf("10.4KHz "); break;
dudmuck 0:be215de91a68 172 case 2: printf("15.6KHz "); break;
dudmuck 0:be215de91a68 173 case 3: printf("20.8KHz "); break;
dudmuck 0:be215de91a68 174 case 4: printf("31.25KHz "); break;
dudmuck 0:be215de91a68 175 case 5: printf("41.7KHz "); break;
dudmuck 0:be215de91a68 176 case 6: printf("62.5KHz "); break;
dudmuck 0:be215de91a68 177 case 7: printf("125KHz "); break;
dudmuck 0:be215de91a68 178 case 8: printf("250KHz "); break;
dudmuck 0:be215de91a68 179 case 9: printf("500KHz "); break;
dudmuck 1:1cd0afbed23c 180 default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break;
dudmuck 0:be215de91a68 181 }
dudmuck 0:be215de91a68 182 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 183 switch (lora.RegModemConfig.sx1272bits.Bw) {
dudmuck 0:be215de91a68 184 case 0: printf("125KHz "); break;
dudmuck 0:be215de91a68 185 case 1: printf("250KHz "); break;
dudmuck 0:be215de91a68 186 case 2: printf("500KHz "); break;
dudmuck 0:be215de91a68 187 case 3: printf("11b "); break;
dudmuck 0:be215de91a68 188 }
dudmuck 0:be215de91a68 189 }
dudmuck 0:be215de91a68 190 }
dudmuck 0:be215de91a68 191
dudmuck 1:1cd0afbed23c 192 void lora_printAllBw()
dudmuck 0:be215de91a68 193 {
dudmuck 0:be215de91a68 194 int i, s;
dudmuck 0:be215de91a68 195
dudmuck 0:be215de91a68 196 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 197 s = lora.RegModemConfig.sx1276bits.Bw;
dudmuck 0:be215de91a68 198 for (i = 0; i < 10; i++ ) {
dudmuck 1:1cd0afbed23c 199 lora.RegModemConfig.sx1276bits.Bw = i;
dudmuck 0:be215de91a68 200 printf("%d ", i);
dudmuck 1:1cd0afbed23c 201 lora_printBw();
dudmuck 0:be215de91a68 202 printf("\r\n");
dudmuck 0:be215de91a68 203 }
dudmuck 1:1cd0afbed23c 204 lora.RegModemConfig.sx1276bits.Bw = s;
dudmuck 0:be215de91a68 205 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 206 s = lora.RegModemConfig.sx1272bits.Bw;
dudmuck 0:be215de91a68 207 for (i = 0; i < 3; i++ ) {
dudmuck 1:1cd0afbed23c 208 lora.RegModemConfig.sx1272bits.Bw = i;
dudmuck 0:be215de91a68 209 printf("%d ", i);
dudmuck 1:1cd0afbed23c 210 lora_printBw();
dudmuck 0:be215de91a68 211 printf("\r\n");
dudmuck 0:be215de91a68 212 }
dudmuck 1:1cd0afbed23c 213 lora.RegModemConfig.sx1272bits.Bw = s;
dudmuck 0:be215de91a68 214 }
dudmuck 0:be215de91a68 215 }
dudmuck 0:be215de91a68 216
dudmuck 1:1cd0afbed23c 217 void lora_printSf()
dudmuck 0:be215de91a68 218 {
dudmuck 0:be215de91a68 219 // spreading factor same between sx127[26]
dudmuck 1:1cd0afbed23c 220 printf("sf:%d ", lora.getSf());
dudmuck 0:be215de91a68 221 }
dudmuck 0:be215de91a68 222
dudmuck 1:1cd0afbed23c 223 void lora_printRxPayloadCrcOn()
dudmuck 0:be215de91a68 224 {
dudmuck 1:1cd0afbed23c 225 bool on = lora.getRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 226 printf("RxPayloadCrcOn:%d = ", on);
dudmuck 18:9530d682fd9a 227 if (lora.getHeaderMode())
dudmuck 18:9530d682fd9a 228 printf("Rx/"); // implicit mode
dudmuck 18:9530d682fd9a 229
dudmuck 0:be215de91a68 230 if (on)
dudmuck 18:9530d682fd9a 231 printf("Tx CRC Enabled\r\n");
dudmuck 0:be215de91a68 232 else
dudmuck 18:9530d682fd9a 233 printf("Tx CRC disabled\r\n");
dudmuck 0:be215de91a68 234 }
dudmuck 0:be215de91a68 235
dudmuck 1:1cd0afbed23c 236 void lora_printTxContinuousMode()
dudmuck 0:be215de91a68 237 {
dudmuck 1:1cd0afbed23c 238 printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276
dudmuck 0:be215de91a68 239 }
dudmuck 0:be215de91a68 240
dudmuck 1:1cd0afbed23c 241 void lora_printAgcAutoOn()
dudmuck 0:be215de91a68 242 {
dudmuck 1:1cd0afbed23c 243 printf("AgcAutoOn:%d", lora.getAgcAutoOn());
dudmuck 0:be215de91a68 244 }
dudmuck 0:be215de91a68 245
dudmuck 1:1cd0afbed23c 246 void lora_print_dio()
dudmuck 0:be215de91a68 247 {
dudmuck 1:1cd0afbed23c 248 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 0:be215de91a68 249 printf("DIO5:");
dudmuck 0:be215de91a68 250 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 0:be215de91a68 251 case 0: printf("ModeReady"); break;
dudmuck 0:be215de91a68 252 case 1: printf("ClkOut"); break;
dudmuck 0:be215de91a68 253 case 2: printf("ClkOut"); break;
dudmuck 0:be215de91a68 254 }
dudmuck 0:be215de91a68 255 printf(" DIO4:");
dudmuck 0:be215de91a68 256 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 0:be215de91a68 257 case 0: printf("CadDetected"); break;
dudmuck 0:be215de91a68 258 case 1: printf("PllLock"); break;
dudmuck 0:be215de91a68 259 case 2: printf("PllLock"); break;
dudmuck 0:be215de91a68 260 }
dudmuck 0:be215de91a68 261 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 0:be215de91a68 262 printf(" DIO3:");
dudmuck 0:be215de91a68 263 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 0:be215de91a68 264 case 0: printf("CadDone"); break;
dudmuck 0:be215de91a68 265 case 1: printf("ValidHeader"); break;
dudmuck 0:be215de91a68 266 case 2: printf("PayloadCrcError"); break;
dudmuck 0:be215de91a68 267 }
dudmuck 0:be215de91a68 268 printf(" DIO2:");
dudmuck 0:be215de91a68 269 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 0:be215de91a68 270 case 0:
dudmuck 0:be215de91a68 271 case 1:
dudmuck 0:be215de91a68 272 case 2:
dudmuck 0:be215de91a68 273 printf("FhssChangeChannel");
dudmuck 0:be215de91a68 274 break;
dudmuck 0:be215de91a68 275 }
dudmuck 0:be215de91a68 276 printf(" DIO1:");
dudmuck 0:be215de91a68 277 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 0:be215de91a68 278 case 0: printf("RxTimeout"); break;
dudmuck 0:be215de91a68 279 case 1: printf("FhssChangeChannel"); break;
dudmuck 0:be215de91a68 280 case 2: printf("CadDetected"); break;
dudmuck 0:be215de91a68 281 }
dudmuck 0:be215de91a68 282 printf(" DIO0:");
dudmuck 0:be215de91a68 283 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 0:be215de91a68 284 case 0: printf("RxDone"); break;
dudmuck 0:be215de91a68 285 case 1: printf("TxDone"); break;
dudmuck 0:be215de91a68 286 case 2: printf("CadDone"); break;
dudmuck 0:be215de91a68 287 }
dudmuck 0:be215de91a68 288
dudmuck 0:be215de91a68 289 printf("\r\n");
dudmuck 0:be215de91a68 290 }
dudmuck 0:be215de91a68 291
dudmuck 1:1cd0afbed23c 292 void fsk_print_dio()
dudmuck 1:1cd0afbed23c 293 {
dudmuck 1:1cd0afbed23c 294 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 1:1cd0afbed23c 295
dudmuck 2:c6b23a43a9d9 296 printf("DIO5:");
dudmuck 1:1cd0afbed23c 297 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 1:1cd0afbed23c 298 case 0: printf("ClkOut"); break;
dudmuck 1:1cd0afbed23c 299 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 300 case 2:
dudmuck 1:1cd0afbed23c 301 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 1:1cd0afbed23c 302 printf("data");
dudmuck 1:1cd0afbed23c 303 else {
dudmuck 1:1cd0afbed23c 304 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 305 printf("preamble");
dudmuck 1:1cd0afbed23c 306 else
dudmuck 1:1cd0afbed23c 307 printf("rssi");
dudmuck 1:1cd0afbed23c 308 }
dudmuck 1:1cd0afbed23c 309 break;
dudmuck 1:1cd0afbed23c 310 case 3: printf("ModeReady"); break;
dudmuck 1:1cd0afbed23c 311 }
dudmuck 1:1cd0afbed23c 312
dudmuck 2:c6b23a43a9d9 313 printf(" DIO4:");
dudmuck 1:1cd0afbed23c 314 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 1:1cd0afbed23c 315 case 0: printf("temp/eol"); break;
dudmuck 1:1cd0afbed23c 316 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 317 case 2: printf("TimeOut"); break;
dudmuck 1:1cd0afbed23c 318 case 3:
dudmuck 1:1cd0afbed23c 319 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 320 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 321 printf("preamble");
dudmuck 1:1cd0afbed23c 322 else
dudmuck 1:1cd0afbed23c 323 printf("rssi");
dudmuck 1:1cd0afbed23c 324 } else
dudmuck 1:1cd0afbed23c 325 printf("ModeReady");
dudmuck 1:1cd0afbed23c 326 break;
dudmuck 1:1cd0afbed23c 327 }
dudmuck 1:1cd0afbed23c 328
dudmuck 1:1cd0afbed23c 329 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 1:1cd0afbed23c 330
dudmuck 2:c6b23a43a9d9 331 printf(" DIO3:");
dudmuck 1:1cd0afbed23c 332 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 1:1cd0afbed23c 333 case 0: printf("Timeout"); break;
dudmuck 1:1cd0afbed23c 334 case 1:
dudmuck 1:1cd0afbed23c 335 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 336 printf("preamble");
dudmuck 1:1cd0afbed23c 337 else
dudmuck 1:1cd0afbed23c 338 printf("rssi");
dudmuck 1:1cd0afbed23c 339 break;
dudmuck 1:1cd0afbed23c 340 case 2: printf("?automode_status?"); break;
dudmuck 1:1cd0afbed23c 341 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 342 }
dudmuck 1:1cd0afbed23c 343
dudmuck 2:c6b23a43a9d9 344 printf(" DIO2:");
dudmuck 1:1cd0afbed23c 345 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 346 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 1:1cd0afbed23c 347 case 0: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 348 case 1: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 349 case 2: printf("FifoFull/rx-timeout"); break;
dudmuck 1:1cd0afbed23c 350 case 3: printf("FifoFull/rx-syncadrs"); break;
dudmuck 1:1cd0afbed23c 351 }
dudmuck 1:1cd0afbed23c 352 } else {
dudmuck 1:1cd0afbed23c 353 printf("Data");
dudmuck 1:1cd0afbed23c 354 }
dudmuck 1:1cd0afbed23c 355
dudmuck 2:c6b23a43a9d9 356 printf(" DIO1:");
dudmuck 1:1cd0afbed23c 357 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 358 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 359 case 0: printf("FifoThresh"); break;
dudmuck 1:1cd0afbed23c 360 case 1: printf("FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 361 case 2: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 362 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 363 }
dudmuck 1:1cd0afbed23c 364 } else {
dudmuck 1:1cd0afbed23c 365 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 366 case 0: printf("Dclk"); break;
dudmuck 1:1cd0afbed23c 367 case 1:
dudmuck 1:1cd0afbed23c 368 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 369 printf("preamble");
dudmuck 1:1cd0afbed23c 370 else
dudmuck 1:1cd0afbed23c 371 printf("rssi");
dudmuck 1:1cd0afbed23c 372 break;
dudmuck 1:1cd0afbed23c 373 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 374 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 375 }
dudmuck 1:1cd0afbed23c 376 }
dudmuck 1:1cd0afbed23c 377
dudmuck 2:c6b23a43a9d9 378 printf(" DIO0:");
dudmuck 1:1cd0afbed23c 379 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 380 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 381 case 0: printf("PayloadReady/PacketSent"); break;
dudmuck 1:1cd0afbed23c 382 case 1: printf("CrcOk"); break;
dudmuck 1:1cd0afbed23c 383 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 384 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 385 }
dudmuck 1:1cd0afbed23c 386 } else {
dudmuck 1:1cd0afbed23c 387 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 388 case 0: printf("SyncAdrs/TxReady"); break;
dudmuck 1:1cd0afbed23c 389 case 1:
dudmuck 1:1cd0afbed23c 390 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 391 printf("preamble");
dudmuck 1:1cd0afbed23c 392 else
dudmuck 1:1cd0afbed23c 393 printf("rssi");
dudmuck 1:1cd0afbed23c 394 break;
dudmuck 1:1cd0afbed23c 395 case 2: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 396 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 397 }
dudmuck 1:1cd0afbed23c 398 }
dudmuck 1:1cd0afbed23c 399 printf("\r\n");
dudmuck 1:1cd0afbed23c 400 }
dudmuck 1:1cd0afbed23c 401
dudmuck 0:be215de91a68 402 void lora_print_status()
dudmuck 15:c69b942685ea 403 {
dudmuck 0:be215de91a68 404 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 405 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 0:be215de91a68 406 printf("FSK\r\n");
dudmuck 0:be215de91a68 407 return;
dudmuck 0:be215de91a68 408 }
dudmuck 0:be215de91a68 409
dudmuck 1:1cd0afbed23c 410 lora_print_dio();
dudmuck 0:be215de91a68 411 printf("LoRa ");
dudmuck 0:be215de91a68 412
dudmuck 0:be215de91a68 413 // printing LoRa registers at 0x0d -> 0x3f
dudmuck 0:be215de91a68 414
dudmuck 1:1cd0afbed23c 415 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 1:1cd0afbed23c 416 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 0:be215de91a68 417
dudmuck 1:1cd0afbed23c 418 lora_printCodingRate(false); // false: transmitted coding rate
dudmuck 1:1cd0afbed23c 419 lora_printHeaderMode();
dudmuck 1:1cd0afbed23c 420 lora_printBw();
dudmuck 1:1cd0afbed23c 421 lora_printSf();
dudmuck 1:1cd0afbed23c 422 lora_printRxPayloadCrcOn();
dudmuck 0:be215de91a68 423 // RegModemStat
dudmuck 0:be215de91a68 424 printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT));
dudmuck 0:be215de91a68 425
dudmuck 0:be215de91a68 426 // fifo ptrs:
dudmuck 1:1cd0afbed23c 427 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 1:1cd0afbed23c 428 lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH);
dudmuck 0:be215de91a68 429 printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x",
dudmuck 0:be215de91a68 430 radio.read_reg(REG_LR_FIFOADDRPTR),
dudmuck 0:be215de91a68 431 radio.read_reg(REG_LR_FIFOTXBASEADDR),
dudmuck 0:be215de91a68 432 radio.read_reg(REG_LR_FIFORXBASEADDR),
dudmuck 1:1cd0afbed23c 433 lora.RegPayloadLength,
dudmuck 1:1cd0afbed23c 434 lora.RegRxMaxPayloadLength
dudmuck 0:be215de91a68 435 );
dudmuck 0:be215de91a68 436
dudmuck 1:1cd0afbed23c 437 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 438 printLoraIrqs_(false);
dudmuck 0:be215de91a68 439
dudmuck 1:1cd0afbed23c 440 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 1:1cd0afbed23c 441 if (lora.RegHopPeriod != 0) {
dudmuck 1:1cd0afbed23c 442 printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 0:be215de91a68 443 }
dudmuck 0:be215de91a68 444
dudmuck 18:9530d682fd9a 445 printf("SymbTimeout:%d ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff);
dudmuck 0:be215de91a68 446
dudmuck 1:1cd0afbed23c 447 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 4:7a9007dfc0e5 448 printf("PreambleLength:%d ", lora.RegPreamble);
dudmuck 0:be215de91a68 449
dudmuck 0:be215de91a68 450 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) {
dudmuck 15:c69b942685ea 451 printf("rssi:%ddBm ", lora.get_current_rssi());
dudmuck 0:be215de91a68 452 }
dudmuck 0:be215de91a68 453
dudmuck 1:1cd0afbed23c 454 lora_printTxContinuousMode();
dudmuck 0:be215de91a68 455
dudmuck 0:be215de91a68 456 printf("\r\n");
dudmuck 1:1cd0afbed23c 457 lora_printAgcAutoOn();
dudmuck 0:be215de91a68 458 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 459 printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 460 }
dudmuck 0:be215de91a68 461
dudmuck 0:be215de91a68 462 printf("\r\nHeaderCount:%d PacketCount:%d, ",
dudmuck 0:be215de91a68 463 radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB));
dudmuck 0:be215de91a68 464
dudmuck 0:be215de91a68 465 printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD));
dudmuck 1:1cd0afbed23c 466 lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31);
dudmuck 1:1cd0afbed23c 467 printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb);
dudmuck 0:be215de91a68 468
dudmuck 0:be215de91a68 469 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 470 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 6:fe16f96ee335 471 printf("LowDataRateOptimize:%d ", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 472 } else if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 473 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 6:fe16f96ee335 474 printf("LowDataRateOptimize:%d ", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 475 }
dudmuck 0:be215de91a68 476
dudmuck 6:fe16f96ee335 477 printf(" invert: rx=%d tx=%d\r\n", lora.RegTest33.bits.invert_i_q, !lora.RegTest33.bits.chirp_invert_tx);
dudmuck 6:fe16f96ee335 478
dudmuck 0:be215de91a68 479 printf("\r\n");
dudmuck 0:be215de91a68 480 //printf("A %02x\r\n", radio.RegModemConfig2.octet);
dudmuck 0:be215de91a68 481 }
dudmuck 0:be215de91a68 482
dudmuck 1:1cd0afbed23c 483 uint16_t
dudmuck 1:1cd0afbed23c 484 fsk_get_PayloadLength(void)
dudmuck 1:1cd0afbed23c 485 {
dudmuck 1:1cd0afbed23c 486 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 487
dudmuck 1:1cd0afbed23c 488 return fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 1:1cd0afbed23c 489 }
dudmuck 1:1cd0afbed23c 490
dudmuck 1:1cd0afbed23c 491 void fsk_printAddressFiltering()
dudmuck 1:1cd0afbed23c 492 {
dudmuck 1:1cd0afbed23c 493 uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs;
dudmuck 1:1cd0afbed23c 494
dudmuck 1:1cd0afbed23c 495 printf(" AddressFiltering:");
dudmuck 1:1cd0afbed23c 496 switch (fsk.RegPktConfig1.bits.AddressFiltering) {
dudmuck 1:1cd0afbed23c 497 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 498 case 1: // NodeAddress
dudmuck 1:1cd0afbed23c 499 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 6:fe16f96ee335 500 printf("NodeAdrs:%02x\r\n", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 501 break;
dudmuck 1:1cd0afbed23c 502 case 2: // NodeAddress & BroadcastAddress
dudmuck 1:1cd0afbed23c 503 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 1:1cd0afbed23c 504 printf("NodeAdrs:%02x ", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 505 FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS);
dudmuck 6:fe16f96ee335 506 printf("BroadcastAdrs:%02x\r\n", FSKRegBroadcastAdrs );
dudmuck 1:1cd0afbed23c 507 break;
dudmuck 1:1cd0afbed23c 508 default:
dudmuck 1:1cd0afbed23c 509 printf("%d", fsk.RegPktConfig1.bits.AddressFiltering);
dudmuck 1:1cd0afbed23c 510 break;
dudmuck 1:1cd0afbed23c 511 }
dudmuck 1:1cd0afbed23c 512 }
dudmuck 1:1cd0afbed23c 513
dudmuck 1:1cd0afbed23c 514 void fsk_print_IrqFlags2()
dudmuck 1:1cd0afbed23c 515 {
dudmuck 2:c6b23a43a9d9 516 RegIrqFlags2_t RegIrqFlags2;
dudmuck 1:1cd0afbed23c 517
dudmuck 1:1cd0afbed23c 518 printf("IrqFlags2: ");
dudmuck 2:c6b23a43a9d9 519 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:c6b23a43a9d9 520 if (RegIrqFlags2.bits.FifoFull)
dudmuck 1:1cd0afbed23c 521 printf("FifoFull ");
dudmuck 2:c6b23a43a9d9 522 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 1:1cd0afbed23c 523 printf("FifoEmpty ");
dudmuck 2:c6b23a43a9d9 524 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 1:1cd0afbed23c 525 printf("FifoLevel ");
dudmuck 2:c6b23a43a9d9 526 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 1:1cd0afbed23c 527 printf("FifoOverrun ");
dudmuck 2:c6b23a43a9d9 528 if (RegIrqFlags2.bits.PacketSent)
dudmuck 1:1cd0afbed23c 529 printf("PacketSent ");
dudmuck 2:c6b23a43a9d9 530 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 1:1cd0afbed23c 531 printf("PayloadReady ");
dudmuck 2:c6b23a43a9d9 532 if (RegIrqFlags2.bits.CrcOk)
dudmuck 1:1cd0afbed23c 533 printf("CrcOk ");
dudmuck 2:c6b23a43a9d9 534 if (RegIrqFlags2.bits.LowBat)
dudmuck 1:1cd0afbed23c 535 printf("LowBat ");
dudmuck 2:c6b23a43a9d9 536 printf("\r\n");
dudmuck 1:1cd0afbed23c 537 }
dudmuck 1:1cd0afbed23c 538
dudmuck 1:1cd0afbed23c 539 void
dudmuck 1:1cd0afbed23c 540 fsk_print_status()
dudmuck 1:1cd0afbed23c 541 {
dudmuck 1:1cd0afbed23c 542 //uint16_t s;
dudmuck 2:c6b23a43a9d9 543 RegIrqFlags1_t RegIrqFlags1;
dudmuck 1:1cd0afbed23c 544
dudmuck 1:1cd0afbed23c 545 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 1:1cd0afbed23c 546 printf("LoRa\r\n");
dudmuck 1:1cd0afbed23c 547 return;
dudmuck 1:1cd0afbed23c 548 }
dudmuck 1:1cd0afbed23c 549
dudmuck 1:1cd0afbed23c 550 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 1:1cd0afbed23c 551 printf("FSK ");
dudmuck 1:1cd0afbed23c 552 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 1:1cd0afbed23c 553 case 1: printf("BT1.0 "); break;
dudmuck 1:1cd0afbed23c 554 case 2: printf("BT0.5 "); break;
dudmuck 1:1cd0afbed23c 555 case 3: printf("BT0.3 "); break;
dudmuck 1:1cd0afbed23c 556 }
dudmuck 1:1cd0afbed23c 557 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 1:1cd0afbed23c 558 printf("OOK ");
dudmuck 18:9530d682fd9a 559 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 18:9530d682fd9a 560 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 561 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 562 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 563 }
dudmuck 1:1cd0afbed23c 564 }
dudmuck 1:1cd0afbed23c 565
dudmuck 3:ab386fa756cc 566 printf("%dbps fdev:%dHz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 1:1cd0afbed23c 567
dudmuck 1:1cd0afbed23c 568 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 569
dudmuck 1:1cd0afbed23c 570 fsk_print_dio();
dudmuck 1:1cd0afbed23c 571
dudmuck 1:1cd0afbed23c 572 printf("rxbw:%dHz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 1:1cd0afbed23c 573 printf("afcbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW));
dudmuck 1:1cd0afbed23c 574
dudmuck 1:1cd0afbed23c 575 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 1:1cd0afbed23c 576 printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1));
dudmuck 1:1cd0afbed23c 577
dudmuck 1:1cd0afbed23c 578
dudmuck 1:1cd0afbed23c 579 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 1:1cd0afbed23c 580
dudmuck 1:1cd0afbed23c 581 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 582 uint16_t len;
dudmuck 1:1cd0afbed23c 583 /* packet mode */
dudmuck 1:1cd0afbed23c 584 len = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 585 printf("packet RegPayloadLength:0x%03x ", len);
dudmuck 1:1cd0afbed23c 586
dudmuck 1:1cd0afbed23c 587 if (fsk.RegPktConfig2.bits.BeaconOn)
dudmuck 1:1cd0afbed23c 588 printf("BeaconOn ");
dudmuck 1:1cd0afbed23c 589
dudmuck 1:1cd0afbed23c 590 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 1:1cd0afbed23c 591 printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 1:1cd0afbed23c 592 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 1:1cd0afbed23c 593 printf("!FifoEmpty");
dudmuck 1:1cd0afbed23c 594 else
dudmuck 1:1cd0afbed23c 595 printf("FifoLevel");
dudmuck 1:1cd0afbed23c 596
dudmuck 1:1cd0afbed23c 597 printf("\r\nAutoRestartRxMode:");
dudmuck 1:1cd0afbed23c 598 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 1:1cd0afbed23c 599 case 0: printf("off "); break;
dudmuck 1:1cd0afbed23c 600 case 1: printf("no-pll-wait "); break;
dudmuck 1:1cd0afbed23c 601 case 2: printf("pll-wait "); break;
dudmuck 1:1cd0afbed23c 602 case 3: printf("3 "); break;
dudmuck 1:1cd0afbed23c 603 }
dudmuck 1:1cd0afbed23c 604 //...todo
dudmuck 1:1cd0afbed23c 605
dudmuck 1:1cd0afbed23c 606 printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 1:1cd0afbed23c 607
dudmuck 1:1cd0afbed23c 608 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 1:1cd0afbed23c 609 if (fsk.RegOokPeak.bits.barker_en)
dudmuck 1:1cd0afbed23c 610 printf("barker ");
dudmuck 1:1cd0afbed23c 611 if (!fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 1:1cd0afbed23c 612 printf("BitSyncOff ");
dudmuck 1:1cd0afbed23c 613 //...todo
dudmuck 1:1cd0afbed23c 614
dudmuck 1:1cd0afbed23c 615 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 1:1cd0afbed23c 616 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 1:1cd0afbed23c 617 printf("variable");
dudmuck 1:1cd0afbed23c 618 else
dudmuck 1:1cd0afbed23c 619 printf("fixed");
dudmuck 1:1cd0afbed23c 620 printf("-length\r\ncrc");
dudmuck 1:1cd0afbed23c 621 if (fsk.RegPktConfig1.bits.CrcOn) {
dudmuck 1:1cd0afbed23c 622 printf("On");
dudmuck 1:1cd0afbed23c 623 } else
dudmuck 1:1cd0afbed23c 624 printf("Off");
dudmuck 1:1cd0afbed23c 625 printf(" crctype:");
dudmuck 1:1cd0afbed23c 626 if (fsk.RegPktConfig1.bits.CrCWhiteningType)
dudmuck 1:1cd0afbed23c 627 printf("IBM");
dudmuck 1:1cd0afbed23c 628 else
dudmuck 1:1cd0afbed23c 629 printf("CCITT");
dudmuck 1:1cd0afbed23c 630 printf(" dcFree:");
dudmuck 1:1cd0afbed23c 631 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 1:1cd0afbed23c 632 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 633 case 1: printf("Manchester "); break;
dudmuck 1:1cd0afbed23c 634 case 2: printf("Whitening "); break;
dudmuck 1:1cd0afbed23c 635 case 3: printf("reserved "); break;
dudmuck 1:1cd0afbed23c 636 }
dudmuck 1:1cd0afbed23c 637 fsk_printAddressFiltering();
dudmuck 1:1cd0afbed23c 638
dudmuck 1:1cd0afbed23c 639 printf("\r\n");
dudmuck 1:1cd0afbed23c 640 fsk_print_IrqFlags2();
dudmuck 1:1cd0afbed23c 641 } else {
dudmuck 1:1cd0afbed23c 642 /* continuous mode */
dudmuck 1:1cd0afbed23c 643 printf("continuous ");
dudmuck 1:1cd0afbed23c 644 }
dudmuck 1:1cd0afbed23c 645
dudmuck 1:1cd0afbed23c 646 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 1:1cd0afbed23c 647 printf("PreambleDetect:");
dudmuck 1:1cd0afbed23c 648 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) {
dudmuck 1:1cd0afbed23c 649 printf("size=%d,tol=%d ",
dudmuck 1:1cd0afbed23c 650 fsk.RegPreambleDetect.bits.PreambleDetectorSize,
dudmuck 1:1cd0afbed23c 651 fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 1:1cd0afbed23c 652 } else
dudmuck 1:1cd0afbed23c 653 printf("Off ");
dudmuck 1:1cd0afbed23c 654
dudmuck 18:9530d682fd9a 655 if (fsk.RegSyncConfig.bits.SyncOn) {
dudmuck 18:9530d682fd9a 656 printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 657 printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1));
dudmuck 18:9530d682fd9a 658 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2));
dudmuck 18:9530d682fd9a 659 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3));
dudmuck 18:9530d682fd9a 660 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4));
dudmuck 18:9530d682fd9a 661 } else
dudmuck 18:9530d682fd9a 662 printf("Sync Off");
dudmuck 1:1cd0afbed23c 663 printf("\r\n"); // end sync config
dudmuck 1:1cd0afbed23c 664
dudmuck 1:1cd0afbed23c 665 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 1:1cd0afbed23c 666 printf("afcAutoClear:");
dudmuck 1:1cd0afbed23c 667 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 1:1cd0afbed23c 668 printf("On");
dudmuck 1:1cd0afbed23c 669 else
dudmuck 1:1cd0afbed23c 670 printf("OFF");
dudmuck 1:1cd0afbed23c 671 printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 1:1cd0afbed23c 672
dudmuck 1:1cd0afbed23c 673 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 1:1cd0afbed23c 674
dudmuck 1:1cd0afbed23c 675 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 1:1cd0afbed23c 676 printf("RxTrigger:");
dudmuck 1:1cd0afbed23c 677 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 1:1cd0afbed23c 678 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 679 case 1: printf("rssi "); break;
dudmuck 1:1cd0afbed23c 680 case 6: printf("preamble "); break;
dudmuck 1:1cd0afbed23c 681 case 7: printf("both "); break;
dudmuck 1:1cd0afbed23c 682 default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break;
dudmuck 1:1cd0afbed23c 683 }
dudmuck 1:1cd0afbed23c 684 printf("AfcAuto:");
dudmuck 1:1cd0afbed23c 685 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 1:1cd0afbed23c 686 printf("On ");
dudmuck 1:1cd0afbed23c 687 else
dudmuck 1:1cd0afbed23c 688 printf("OFF ");
dudmuck 15:c69b942685ea 689
dudmuck 15:c69b942685ea 690 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 1:1cd0afbed23c 691 if (!fsk.RegRxConfig.bits.AgcAutoOn) {
dudmuck 1:1cd0afbed23c 692 printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain);
dudmuck 1:1cd0afbed23c 693 }
dudmuck 15:c69b942685ea 694 printf("LnaBoostHF:%d ", radio.RegLna.bits.LnaBoostHF);
dudmuck 1:1cd0afbed23c 695
dudmuck 1:1cd0afbed23c 696 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 697 if (fsk.RegTimerResol.bits.hlm_started)
dudmuck 1:1cd0afbed23c 698 printf("hlm_started ");
dudmuck 1:1cd0afbed23c 699 else
dudmuck 1:1cd0afbed23c 700 printf("hlm_stopped ");
dudmuck 1:1cd0afbed23c 701
dudmuck 1:1cd0afbed23c 702 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 703 printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 704
dudmuck 1:1cd0afbed23c 705 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 1:1cd0afbed23c 706 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER ||
dudmuck 1:1cd0afbed23c 707 radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX)
dudmuck 1:1cd0afbed23c 708 {
dudmuck 1:1cd0afbed23c 709 printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 1:1cd0afbed23c 710 }
dudmuck 1:1cd0afbed23c 711
dudmuck 1:1cd0afbed23c 712 fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1);
dudmuck 1:1cd0afbed23c 713 printf("\r\nsequencer: ");
dudmuck 1:1cd0afbed23c 714 printf("FromStart:");
dudmuck 1:1cd0afbed23c 715 switch (fsk.RegSeqConfig1.bits.FromStart) {
dudmuck 1:1cd0afbed23c 716 case 0:
dudmuck 1:1cd0afbed23c 717 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 718 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 719 printf("idle");
dudmuck 1:1cd0afbed23c 720 else
dudmuck 1:1cd0afbed23c 721 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 722 break;
dudmuck 1:1cd0afbed23c 723 case 1: printf("rx"); break;
dudmuck 1:1cd0afbed23c 724 case 2: printf("tx"); break;
dudmuck 1:1cd0afbed23c 725 case 3: printf("tx on fifolevel"); break;
dudmuck 1:1cd0afbed23c 726 }
dudmuck 1:1cd0afbed23c 727 printf(" lowPowerSelection:");
dudmuck 1:1cd0afbed23c 728 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 729 printf("idle");
dudmuck 1:1cd0afbed23c 730 else
dudmuck 1:1cd0afbed23c 731 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 732 if (fsk.RegSeqConfig1.bits.FromStart != 0 &&
dudmuck 1:1cd0afbed23c 733 fsk.RegSeqConfig1.bits.LowPowerSelection != 0)
dudmuck 1:1cd0afbed23c 734 { // if sequencer enabled:
dudmuck 1:1cd0afbed23c 735 printf("\r\nsequencer: IdleMode:");
dudmuck 1:1cd0afbed23c 736 if (fsk.RegSeqConfig1.bits.IdleMode)
dudmuck 1:1cd0afbed23c 737 printf("Sleep");
dudmuck 1:1cd0afbed23c 738 else
dudmuck 1:1cd0afbed23c 739 printf("standby");
dudmuck 1:1cd0afbed23c 740 printf("\r\nsequencer: FromIdle to:");
dudmuck 1:1cd0afbed23c 741 if (fsk.RegSeqConfig1.bits.FromIdle)
dudmuck 1:1cd0afbed23c 742 printf("rx");
dudmuck 1:1cd0afbed23c 743 else
dudmuck 1:1cd0afbed23c 744 printf("tx");
dudmuck 1:1cd0afbed23c 745 printf("\r\nsequencer: FromTransmit to:");
dudmuck 1:1cd0afbed23c 746 if (fsk.RegSeqConfig1.bits.FromTransmit)
dudmuck 1:1cd0afbed23c 747 printf("rx-on-PacketSent");
dudmuck 1:1cd0afbed23c 748 else {
dudmuck 1:1cd0afbed23c 749 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 750 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 751 printf("idle");
dudmuck 1:1cd0afbed23c 752 else
dudmuck 1:1cd0afbed23c 753 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 754 printf("-on-PacketSent");
dudmuck 1:1cd0afbed23c 755 }
dudmuck 1:1cd0afbed23c 756 fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2);
dudmuck 1:1cd0afbed23c 757 printf("\r\nsequencer: FromReceive:");
dudmuck 1:1cd0afbed23c 758 switch (fsk.RegSeqConfig2.bits.FromReceive) {
dudmuck 1:1cd0afbed23c 759 case 1: printf("PacketRecevied on PayloadReady"); break;
dudmuck 1:1cd0afbed23c 760 case 2:
dudmuck 1:1cd0afbed23c 761 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 762 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 763 printf("idle");
dudmuck 1:1cd0afbed23c 764 else
dudmuck 1:1cd0afbed23c 765 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 766 printf("-on-payloadReady");
dudmuck 1:1cd0afbed23c 767 break;
dudmuck 1:1cd0afbed23c 768 case 3: printf("PacketRecevied-on-CrcOk"); break;
dudmuck 1:1cd0afbed23c 769 case 4: printf("SequencerOff-on-Rssi"); break;
dudmuck 1:1cd0afbed23c 770 case 5: printf("SequencerOff-on-SyncAddress"); break;
dudmuck 1:1cd0afbed23c 771 case 6: printf("SequencerOff-PreambleDetect"); break;
dudmuck 1:1cd0afbed23c 772 default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break;
dudmuck 1:1cd0afbed23c 773 }
dudmuck 1:1cd0afbed23c 774 printf("\r\nsequencer: FromRxTimeout:");
dudmuck 1:1cd0afbed23c 775 switch (fsk.RegSeqConfig2.bits.FromRxTimeout) {
dudmuck 1:1cd0afbed23c 776 case 0: printf("rx"); break;
dudmuck 1:1cd0afbed23c 777 case 1: printf("tx"); break;
dudmuck 1:1cd0afbed23c 778 case 2:
dudmuck 1:1cd0afbed23c 779 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 780 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 781 printf("idle");
dudmuck 1:1cd0afbed23c 782 else
dudmuck 1:1cd0afbed23c 783 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 784 break;
dudmuck 1:1cd0afbed23c 785 case 3: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 786 }
dudmuck 1:1cd0afbed23c 787 printf("\r\nsequencer: FromPacketReceived to:");
dudmuck 1:1cd0afbed23c 788 switch (fsk.RegSeqConfig2.bits.FromPacketReceived) {
dudmuck 1:1cd0afbed23c 789 case 0: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 790 case 1: printf("tx on FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 791 case 2:
dudmuck 1:1cd0afbed23c 792 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 793 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 794 printf("idle");
dudmuck 1:1cd0afbed23c 795 else
dudmuck 1:1cd0afbed23c 796 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 797 break;
dudmuck 1:1cd0afbed23c 798 case 3: printf("rx via fs"); break;
dudmuck 1:1cd0afbed23c 799 case 4: printf("rx"); break;
dudmuck 1:1cd0afbed23c 800 }
dudmuck 1:1cd0afbed23c 801
dudmuck 1:1cd0afbed23c 802 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 803 printf("\r\nsequencer: timer1:");
dudmuck 1:1cd0afbed23c 804 switch (fsk.RegTimerResol.bits.timer1_resol) {
dudmuck 1:1cd0afbed23c 805 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 806 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break;
dudmuck 1:1cd0afbed23c 807 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 808 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 809 }
dudmuck 1:1cd0afbed23c 810
dudmuck 1:1cd0afbed23c 811 printf(" timer2:");
dudmuck 1:1cd0afbed23c 812 switch (fsk.RegTimerResol.bits.timer2_resol) {
dudmuck 1:1cd0afbed23c 813 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 814 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break;
dudmuck 1:1cd0afbed23c 815 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 816 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 817 }
dudmuck 1:1cd0afbed23c 818 } // ..if sequencer enabled
dudmuck 1:1cd0afbed23c 819
dudmuck 1:1cd0afbed23c 820 printf("\r\nIrqFlags1:");
dudmuck 2:c6b23a43a9d9 821 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 2:c6b23a43a9d9 822 if (RegIrqFlags1.bits.ModeReady)
dudmuck 1:1cd0afbed23c 823 printf("ModeReady ");
dudmuck 2:c6b23a43a9d9 824 if (RegIrqFlags1.bits.RxReady)
dudmuck 1:1cd0afbed23c 825 printf("RxReady ");
dudmuck 2:c6b23a43a9d9 826 if (RegIrqFlags1.bits.TxReady)
dudmuck 1:1cd0afbed23c 827 printf("TxReady ");
dudmuck 2:c6b23a43a9d9 828 if (RegIrqFlags1.bits.PllLock)
dudmuck 1:1cd0afbed23c 829 printf("PllLock ");
dudmuck 2:c6b23a43a9d9 830 if (RegIrqFlags1.bits.Rssi)
dudmuck 1:1cd0afbed23c 831 printf("Rssi ");
dudmuck 2:c6b23a43a9d9 832 if (RegIrqFlags1.bits.Timeout)
dudmuck 1:1cd0afbed23c 833 printf("Timeout ");
dudmuck 2:c6b23a43a9d9 834 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 1:1cd0afbed23c 835 printf("PreambleDetect ");
dudmuck 2:c6b23a43a9d9 836 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 1:1cd0afbed23c 837 printf("SyncAddressMatch ");
dudmuck 1:1cd0afbed23c 838
dudmuck 1:1cd0afbed23c 839 printf("\r\n");
dudmuck 1:1cd0afbed23c 840
dudmuck 1:1cd0afbed23c 841 /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format:
dudmuck 1:1cd0afbed23c 842 s = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 843 if (s > FSK_LARGE_PKT_THRESHOLD)
dudmuck 1:1cd0afbed23c 844 flags.fifo_flow_ctl = 1;
dudmuck 1:1cd0afbed23c 845 else
dudmuck 1:1cd0afbed23c 846 flags.fifo_flow_ctl = 0;
dudmuck 1:1cd0afbed23c 847 }*/
dudmuck 1:1cd0afbed23c 848
dudmuck 1:1cd0afbed23c 849 fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL);
dudmuck 1:1cd0afbed23c 850 if (fsk.RegImageCal.bits.TempMonitorOff) {
dudmuck 1:1cd0afbed23c 851 printf("TempMonitorOff[\r0m\n");
dudmuck 1:1cd0afbed23c 852 } else {
dudmuck 1:1cd0afbed23c 853 printf("TempThreshold:");
dudmuck 1:1cd0afbed23c 854 switch (fsk.RegImageCal.bits.TempThreshold) {
dudmuck 1:1cd0afbed23c 855 case 0: printf("5C"); break;
dudmuck 1:1cd0afbed23c 856 case 1: printf("10C"); break;
dudmuck 1:1cd0afbed23c 857 case 2: printf("15C"); break;
dudmuck 1:1cd0afbed23c 858 case 3: printf("20C"); break;
dudmuck 1:1cd0afbed23c 859 }
dudmuck 1:1cd0afbed23c 860 printf("\r\n");
dudmuck 1:1cd0afbed23c 861 }
dudmuck 1:1cd0afbed23c 862 if (fsk.RegImageCal.bits.ImageCalRunning)
dudmuck 1:1cd0afbed23c 863 printf("ImageCalRunning[\r0m\n");
dudmuck 1:1cd0afbed23c 864
dudmuck 1:1cd0afbed23c 865 /* printf("flags.fifo_flow_ctl:%d pktidx:%d rx_pktlen:%d", flags.fifo_flow_ctl, pktidx, rx_pktlen);
dudmuck 6:fe16f96ee335 866 printf("\r\n");
dudmuck 1:1cd0afbed23c 867
dudmuck 6:fe16f96ee335 868 //printf("DIO0_PIN:%d\r\n", digitalRead(DIO0_PIN));
dudmuck 6:fe16f96ee335 869 printf("pkt_buf_len=%d remaining=%d\r\n", pk*/
dudmuck 1:1cd0afbed23c 870 }
dudmuck 1:1cd0afbed23c 871
dudmuck 0:be215de91a68 872 void printOpMode()
dudmuck 0:be215de91a68 873 {
dudmuck 0:be215de91a68 874 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 875 switch (radio.RegOpMode.bits.Mode) {
dudmuck 0:be215de91a68 876 case RF_OPMODE_SLEEP: printf("sleep"); break;
dudmuck 0:be215de91a68 877 case RF_OPMODE_STANDBY: printf("stby"); break;
dudmuck 0:be215de91a68 878 case RF_OPMODE_SYNTHESIZER_TX: printf("fstx"); break;
dudmuck 0:be215de91a68 879 case RF_OPMODE_TRANSMITTER: printf("tx"); break;
dudmuck 0:be215de91a68 880 case RF_OPMODE_SYNTHESIZER_RX: printf("fsrx"); break;
dudmuck 0:be215de91a68 881 case RF_OPMODE_RECEIVER: printf("rx"); break;
dudmuck 0:be215de91a68 882 case 6:
dudmuck 0:be215de91a68 883 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 884 printf("rxs");
dudmuck 0:be215de91a68 885 else
dudmuck 0:be215de91a68 886 printf("-6-");
dudmuck 0:be215de91a68 887 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 888 case 7:
dudmuck 0:be215de91a68 889 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 890 printf("cad");
dudmuck 0:be215de91a68 891 else
dudmuck 0:be215de91a68 892 printf("-7-");
dudmuck 0:be215de91a68 893 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 894 }
dudmuck 0:be215de91a68 895 }
dudmuck 0:be215de91a68 896
dudmuck 0:be215de91a68 897 void
dudmuck 0:be215de91a68 898 printPa()
dudmuck 0:be215de91a68 899 {
dudmuck 0:be215de91a68 900 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 0:be215de91a68 901 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 0:be215de91a68 902 float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 903 printf(" PABOOST OutputPower=%.1fdBm", output_dBm);
dudmuck 0:be215de91a68 904 } else {
dudmuck 0:be215de91a68 905 float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8;
dudmuck 0:be215de91a68 906 float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 907 printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm);
dudmuck 0:be215de91a68 908 }
dudmuck 0:be215de91a68 909 }
dudmuck 0:be215de91a68 910
dudmuck 0:be215de91a68 911 void /* things always present, whether lora or fsk */
dudmuck 0:be215de91a68 912 common_print_status()
dudmuck 0:be215de91a68 913 {
dudmuck 0:be215de91a68 914 printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz());
dudmuck 0:be215de91a68 915 printOpMode();
dudmuck 0:be215de91a68 916
dudmuck 0:be215de91a68 917 printPa();
dudmuck 0:be215de91a68 918
dudmuck 0:be215de91a68 919 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 0:be215de91a68 920 if (radio.RegOcp.bits.OcpOn) {
dudmuck 0:be215de91a68 921 int imax = 0;
dudmuck 0:be215de91a68 922 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 0:be215de91a68 923 imax = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 924 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 0:be215de91a68 925 imax = -30 + (10 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 926 else
dudmuck 0:be215de91a68 927 imax = 240;
dudmuck 0:be215de91a68 928 printf(" OcpOn %dmA ", imax);
dudmuck 0:be215de91a68 929 } else
dudmuck 0:be215de91a68 930 printf(" OcpOFF ");
dudmuck 0:be215de91a68 931
dudmuck 0:be215de91a68 932 printf("\r\n");
dudmuck 8:227605e4a760 933
dudmuck 8:227605e4a760 934 if (per_en) {
dudmuck 18:9530d682fd9a 935 if (cadper_enable) {
dudmuck 18:9530d682fd9a 936 printf("cadper %d, ", num_cads);
dudmuck 18:9530d682fd9a 937 }
dudmuck 8:227605e4a760 938 printf("per_tx_delay:%f\r\n", per_tx_delay);
dudmuck 8:227605e4a760 939 printf("PER device ID:%d\r\n", per_id);
dudmuck 8:227605e4a760 940 }
dudmuck 18:9530d682fd9a 941
dudmuck 18:9530d682fd9a 942 if (poll_irq_en)
dudmuck 18:9530d682fd9a 943 printf("poll_irq_en\r\n");
dudmuck 0:be215de91a68 944
dudmuck 0:be215de91a68 945 }
dudmuck 0:be215de91a68 946
dudmuck 0:be215de91a68 947 void print_rx_buf(int len)
dudmuck 0:be215de91a68 948 {
dudmuck 0:be215de91a68 949 int i;
dudmuck 0:be215de91a68 950
dudmuck 0:be215de91a68 951 printf("000:");
dudmuck 0:be215de91a68 952 for (i = 0; i < len; i++) {
dudmuck 0:be215de91a68 953 //printf("(%d)%02x ", i % 16, rx_buf[i]);
dudmuck 0:be215de91a68 954 printf("%02x ", radio.rx_buf[i]);
dudmuck 0:be215de91a68 955 if (i % 16 == 15 && i != len-1)
dudmuck 0:be215de91a68 956 printf("\r\n%03d:", i+1);
dudmuck 0:be215de91a68 957
dudmuck 0:be215de91a68 958 }
dudmuck 0:be215de91a68 959 printf("\r\n");
dudmuck 0:be215de91a68 960 }
dudmuck 0:be215de91a68 961
dudmuck 7:c3c54f222ced 962 void print_rx_verbose(uint8_t dlen)
dudmuck 7:c3c54f222ced 963 {
dudmuck 7:c3c54f222ced 964 float dbm;
dudmuck 7:c3c54f222ced 965 printLoraIrqs_(false);
dudmuck 7:c3c54f222ced 966 if (lora.RegHopPeriod > 0) {
dudmuck 7:c3c54f222ced 967 lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 7:c3c54f222ced 968 printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 7:c3c54f222ced 969 }
dudmuck 7:c3c54f222ced 970 printf("%dHz ", lora.get_freq_error_Hz());
dudmuck 7:c3c54f222ced 971 lora_printCodingRate(true); // true: of received packet
dudmuck 7:c3c54f222ced 972 dbm = lora.get_pkt_rssi();
dudmuck 7:c3c54f222ced 973 printf(" crc%s %.1fdB %.1fdBm\r\n",
dudmuck 7:c3c54f222ced 974 lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF",
dudmuck 7:c3c54f222ced 975 lora.RegPktSnrValue / 4.0,
dudmuck 7:c3c54f222ced 976 dbm
dudmuck 7:c3c54f222ced 977 );
dudmuck 7:c3c54f222ced 978 print_rx_buf(dlen);
dudmuck 18:9530d682fd9a 979 }
dudmuck 7:c3c54f222ced 980
dudmuck 18:9530d682fd9a 981 void set_per_en(bool en)
dudmuck 18:9530d682fd9a 982 {
dudmuck 18:9530d682fd9a 983 if (en) {
dudmuck 18:9530d682fd9a 984 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 985 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 986 lora.RegModemConfig.sx1272bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 987 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 988 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 989 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 990 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 991 }
dudmuck 18:9530d682fd9a 992 lora.RegPayloadLength = 9;
dudmuck 18:9530d682fd9a 993 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 994 radio.RegDioMapping1.bits.Dio3Mapping = 1; // to ValidHeader
dudmuck 18:9530d682fd9a 995 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 996 } else { // fsk..
dudmuck 18:9530d682fd9a 997 //fsk_tx_length = 9;
dudmuck 7:c3c54f222ced 998 }
dudmuck 18:9530d682fd9a 999 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 1000 //PacketRxSequence = 0;
dudmuck 18:9530d682fd9a 1001 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1002 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1003 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1004 } // ..if (per_en)
dudmuck 18:9530d682fd9a 1005 else {
dudmuck 18:9530d682fd9a 1006 per_timeout.detach();
dudmuck 18:9530d682fd9a 1007 }
dudmuck 18:9530d682fd9a 1008
dudmuck 18:9530d682fd9a 1009 per_en = en;
dudmuck 18:9530d682fd9a 1010 }
dudmuck 7:c3c54f222ced 1011
dudmuck 8:227605e4a760 1012 void per_cb()
dudmuck 8:227605e4a760 1013 {
dudmuck 8:227605e4a760 1014 int i;
dudmuck 8:227605e4a760 1015
dudmuck 8:227605e4a760 1016 PacketTxCnt++;
dudmuck 8:227605e4a760 1017
dudmuck 8:227605e4a760 1018 radio.tx_buf[0] = per_id;
dudmuck 8:227605e4a760 1019 radio.tx_buf[1] = PacketTxCnt >> 24;
dudmuck 8:227605e4a760 1020 radio.tx_buf[2] = PacketTxCnt >> 16;
dudmuck 8:227605e4a760 1021 radio.tx_buf[3] = PacketTxCnt >> 8;
dudmuck 8:227605e4a760 1022 radio.tx_buf[4] = PacketTxCnt;
dudmuck 8:227605e4a760 1023 radio.tx_buf[5] = 'P';
dudmuck 8:227605e4a760 1024 radio.tx_buf[6] = 'E';
dudmuck 8:227605e4a760 1025 radio.tx_buf[7] = 'R';
dudmuck 8:227605e4a760 1026 radio.tx_buf[8] = 0;
dudmuck 8:227605e4a760 1027 for (i = 0; i < 8; i++)
dudmuck 8:227605e4a760 1028 radio.tx_buf[8] += radio.tx_buf[i];
dudmuck 8:227605e4a760 1029
dudmuck 13:c73caaee93a5 1030 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 13:c73caaee93a5 1031 lora.start_tx(lora.RegPayloadLength);
dudmuck 13:c73caaee93a5 1032 } else {
dudmuck 13:c73caaee93a5 1033 fsk.start_tx(9);
dudmuck 13:c73caaee93a5 1034 }
dudmuck 10:d9bb2ce57f05 1035
dudmuck 10:d9bb2ce57f05 1036 led1 = !led1.read();
dudmuck 18:9530d682fd9a 1037
dudmuck 18:9530d682fd9a 1038 if (PacketTxCnt == PacketTxCntEnd) {
dudmuck 18:9530d682fd9a 1039 set_per_en(false);
dudmuck 18:9530d682fd9a 1040 return;
dudmuck 18:9530d682fd9a 1041 }
dudmuck 8:227605e4a760 1042 }
dudmuck 8:227605e4a760 1043
dudmuck 13:c73caaee93a5 1044 int per_parse_rx(uint8_t len)
dudmuck 13:c73caaee93a5 1045 {
dudmuck 13:c73caaee93a5 1046 if (len > 8 && radio.rx_buf[5] == 'P' && radio.rx_buf[6] == 'E' && radio.rx_buf[7] == 'R') {
dudmuck 13:c73caaee93a5 1047 int i;
dudmuck 13:c73caaee93a5 1048 float per;
dudmuck 13:c73caaee93a5 1049
dudmuck 13:c73caaee93a5 1050 /* this is PER packet */
dudmuck 13:c73caaee93a5 1051 uint32_t PacketRxSequence = (radio.rx_buf[1] << 24) | (radio.rx_buf[2] << 16) | (radio.rx_buf[3] << 8) | radio.rx_buf[4];
dudmuck 13:c73caaee93a5 1052 PacketPerOkCnt++;
dudmuck 13:c73caaee93a5 1053
dudmuck 13:c73caaee93a5 1054 if( PacketRxSequence <= PacketRxSequencePrev )
dudmuck 13:c73caaee93a5 1055 { // Sequence went back => resynchronization
dudmuck 13:c73caaee93a5 1056 // dont count missed packets this time
dudmuck 13:c73caaee93a5 1057 i = 0;
dudmuck 13:c73caaee93a5 1058 }
dudmuck 13:c73caaee93a5 1059 else
dudmuck 13:c73caaee93a5 1060 {
dudmuck 13:c73caaee93a5 1061 // determine number of missed packets
dudmuck 13:c73caaee93a5 1062 i = PacketRxSequence - PacketRxSequencePrev - 1;
dudmuck 13:c73caaee93a5 1063 }
dudmuck 13:c73caaee93a5 1064
dudmuck 13:c73caaee93a5 1065 led1 = !led1.read();
dudmuck 13:c73caaee93a5 1066 // be ready for the next
dudmuck 13:c73caaee93a5 1067 PacketRxSequencePrev = PacketRxSequence;
dudmuck 13:c73caaee93a5 1068 // increment 'missed' counter for the RX session
dudmuck 13:c73caaee93a5 1069 PacketPerKoCnt += i;
dudmuck 18:9530d682fd9a 1070 per = ( (float)1.0 - ( float )PacketPerOkCnt / ( float )( PacketPerOkCnt + PacketPerKoCnt ) ) * (float)100.0;
dudmuck 15:c69b942685ea 1071 printf("%d, ok=%d missed=%d normal=%d per:%.3f ", PacketRxSequence, PacketPerOkCnt, PacketPerKoCnt, PacketNormalCnt, per);
dudmuck 15:c69b942685ea 1072 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 15:c69b942685ea 1073 printf("pkt:%ddBm, snr:%.1fdB, %ddBm\r\n", lora.get_pkt_rssi(), lora.RegPktSnrValue / 4.0, lora.get_current_rssi());
dudmuck 15:c69b942685ea 1074 else {
dudmuck 16:b9d36c60f2d3 1075 wait_us(10000);
dudmuck 15:c69b942685ea 1076 printf(" -%.1fdBm\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 15:c69b942685ea 1077 }
dudmuck 15:c69b942685ea 1078
dudmuck 13:c73caaee93a5 1079 return 1;
dudmuck 13:c73caaee93a5 1080 } else {
dudmuck 13:c73caaee93a5 1081 return 0;
dudmuck 13:c73caaee93a5 1082 }
dudmuck 13:c73caaee93a5 1083 }
dudmuck 13:c73caaee93a5 1084
dudmuck 18:9530d682fd9a 1085 typedef enum {
dudmuck 18:9530d682fd9a 1086 ON_TXDONE_STATE_NONE = 0,
dudmuck 18:9530d682fd9a 1087 ON_TXDONE_STATE_SYNC_HI_NIBBLE,
dudmuck 18:9530d682fd9a 1088 ON_TXDONE_STATE_SYNC_LO_NIBBLE,
dudmuck 18:9530d682fd9a 1089 ON_TXDONE_STATE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1090 } on_txdone_state_e;
dudmuck 18:9530d682fd9a 1091
dudmuck 18:9530d682fd9a 1092 on_txdone_state_e on_txdone_state;
dudmuck 18:9530d682fd9a 1093
dudmuck 18:9530d682fd9a 1094 uint8_t lora_sync_byte;
dudmuck 18:9530d682fd9a 1095 float on_txdone_delay;
dudmuck 18:9530d682fd9a 1096 Timeout on_txdone_timeout;
dudmuck 18:9530d682fd9a 1097 uint8_t on_txdone_repeat_cnt;
dudmuck 18:9530d682fd9a 1098
dudmuck 18:9530d682fd9a 1099 void txdone_timeout_cb()
dudmuck 18:9530d682fd9a 1100 {
dudmuck 18:9530d682fd9a 1101 uint8_t nib;
dudmuck 18:9530d682fd9a 1102
dudmuck 18:9530d682fd9a 1103 switch (on_txdone_state) {
dudmuck 18:9530d682fd9a 1104 case ON_TXDONE_STATE_SYNC_HI_NIBBLE:
dudmuck 18:9530d682fd9a 1105 nib = lora_sync_byte >> 4;
dudmuck 18:9530d682fd9a 1106 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1107 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1108 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1109 } else
dudmuck 18:9530d682fd9a 1110 nib++;
dudmuck 18:9530d682fd9a 1111
dudmuck 18:9530d682fd9a 1112 lora_sync_byte = nib << 4;
dudmuck 18:9530d682fd9a 1113
dudmuck 18:9530d682fd9a 1114 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1115 printf("upper %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1116 break;
dudmuck 18:9530d682fd9a 1117 case ON_TXDONE_STATE_SYNC_LO_NIBBLE:
dudmuck 18:9530d682fd9a 1118 nib = lora_sync_byte & 0x0f;
dudmuck 18:9530d682fd9a 1119 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1120 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1121 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1122 } else
dudmuck 18:9530d682fd9a 1123 nib++;
dudmuck 18:9530d682fd9a 1124
dudmuck 18:9530d682fd9a 1125 lora_sync_byte = nib & 0x0f;
dudmuck 18:9530d682fd9a 1126
dudmuck 18:9530d682fd9a 1127 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1128 printf("lower %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1129 break;
dudmuck 18:9530d682fd9a 1130 case ON_TXDONE_STATE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1131 if (++on_txdone_repeat_cnt >= 10) {
dudmuck 18:9530d682fd9a 1132 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 1133 if (lora.RegPayloadLength == 255) {
dudmuck 18:9530d682fd9a 1134 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 1135 printf("done\r\n");
dudmuck 18:9530d682fd9a 1136 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 1137 return;
dudmuck 18:9530d682fd9a 1138 }
dudmuck 18:9530d682fd9a 1139 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1140 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1141 printf("pl %d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1142 }
dudmuck 18:9530d682fd9a 1143 tx_cnt++;
dudmuck 18:9530d682fd9a 1144 radio.tx_buf[0] = tx_cnt;
dudmuck 18:9530d682fd9a 1145 radio.tx_buf[1] = ~tx_cnt;
dudmuck 18:9530d682fd9a 1146 break;
dudmuck 18:9530d682fd9a 1147 default:
dudmuck 18:9530d682fd9a 1148 return;
dudmuck 18:9530d682fd9a 1149 } // ..switch (on_txdone_state)
dudmuck 18:9530d682fd9a 1150
dudmuck 18:9530d682fd9a 1151 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1152 }
dudmuck 18:9530d682fd9a 1153
dudmuck 18:9530d682fd9a 1154 void
dudmuck 18:9530d682fd9a 1155 poll_service_radio()
dudmuck 18:9530d682fd9a 1156 {
dudmuck 18:9530d682fd9a 1157 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1158 } else { // fsk:
dudmuck 18:9530d682fd9a 1159 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1160 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1161 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1162 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 18:9530d682fd9a 1163 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 1164 printf("poll mode fsk tx done\r\n");
dudmuck 18:9530d682fd9a 1165 }
dudmuck 18:9530d682fd9a 1166 }
dudmuck 18:9530d682fd9a 1167 } // ..fsk
dudmuck 18:9530d682fd9a 1168 }
dudmuck 18:9530d682fd9a 1169
dudmuck 18:9530d682fd9a 1170 void cadper_service()
dudmuck 18:9530d682fd9a 1171 {
dudmuck 18:9530d682fd9a 1172 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1173
dudmuck 18:9530d682fd9a 1174
dudmuck 18:9530d682fd9a 1175 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1176 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1177 do {
dudmuck 18:9530d682fd9a 1178 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1179 if (lora.RegIrqFlags.bits.RxDone) {
dudmuck 18:9530d682fd9a 1180 service_action_e act = lora.service();
dudmuck 18:9530d682fd9a 1181 if (act == SERVICE_READ_FIFO) {
dudmuck 18:9530d682fd9a 1182 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 18:9530d682fd9a 1183 PacketNormalCnt++;
dudmuck 18:9530d682fd9a 1184 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 18:9530d682fd9a 1185 }
dudmuck 18:9530d682fd9a 1186 }
dudmuck 18:9530d682fd9a 1187 break;
dudmuck 18:9530d682fd9a 1188 }
dudmuck 18:9530d682fd9a 1189 } while (!lora.RegIrqFlags.bits.RxTimeout);
dudmuck 18:9530d682fd9a 1190 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1191 }
dudmuck 18:9530d682fd9a 1192
dudmuck 18:9530d682fd9a 1193 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1194 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1195 num_cads++;
dudmuck 18:9530d682fd9a 1196 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1197 }
dudmuck 18:9530d682fd9a 1198
dudmuck 18:9530d682fd9a 1199 }
dudmuck 18:9530d682fd9a 1200
dudmuck 0:be215de91a68 1201 void
dudmuck 0:be215de91a68 1202 service_radio()
dudmuck 0:be215de91a68 1203 {
dudmuck 1:1cd0afbed23c 1204 service_action_e act;
dudmuck 14:c57ea544dc18 1205 static uint8_t rssi = 0;
dudmuck 1:1cd0afbed23c 1206
dudmuck 1:1cd0afbed23c 1207 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1208 if (cadper_enable) {
dudmuck 18:9530d682fd9a 1209 cadper_service();
dudmuck 18:9530d682fd9a 1210 }
dudmuck 4:7a9007dfc0e5 1211
dudmuck 1:1cd0afbed23c 1212 act = lora.service();
dudmuck 0:be215de91a68 1213
dudmuck 1:1cd0afbed23c 1214 switch (act) {
dudmuck 1:1cd0afbed23c 1215 case SERVICE_READ_FIFO:
dudmuck 8:227605e4a760 1216 if (app == APP_NONE) {
dudmuck 8:227605e4a760 1217 if (per_en) {
dudmuck 13:c73caaee93a5 1218 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 8:227605e4a760 1219 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1220 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 8:227605e4a760 1221 }
dudmuck 8:227605e4a760 1222 } else
dudmuck 8:227605e4a760 1223 print_rx_verbose(lora.RegRxNbBytes);
dudmuck 15:c69b942685ea 1224 fflush(stdout);
dudmuck 1:1cd0afbed23c 1225 } else if (app == APP_CHAT) {
dudmuck 1:1cd0afbed23c 1226 if (lora.RegHopChannel.bits.RxPayloadCrcOn) {
dudmuck 1:1cd0afbed23c 1227 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 1:1cd0afbed23c 1228 printf("crcError\r\n");
dudmuck 1:1cd0afbed23c 1229 else {
dudmuck 1:1cd0afbed23c 1230 int n = lora.RegRxNbBytes;
dudmuck 1:1cd0afbed23c 1231 radio.rx_buf[n++] = '\r';
dudmuck 1:1cd0afbed23c 1232 radio.rx_buf[n++] = '\n';
dudmuck 1:1cd0afbed23c 1233 radio.rx_buf[n] = 0; // null terminate
dudmuck 1:1cd0afbed23c 1234 printf((char *)radio.rx_buf);
dudmuck 1:1cd0afbed23c 1235 }
dudmuck 1:1cd0afbed23c 1236 } else
dudmuck 1:1cd0afbed23c 1237 printf("crcOff\r\n");
dudmuck 1:1cd0afbed23c 1238
dudmuck 1:1cd0afbed23c 1239 // clear Irq flags
dudmuck 1:1cd0afbed23c 1240 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 1:1cd0afbed23c 1241 // should still be in receive mode
dudmuck 0:be215de91a68 1242 }
dudmuck 1:1cd0afbed23c 1243 break;
dudmuck 1:1cd0afbed23c 1244 case SERVICE_TX_DONE:
dudmuck 1:1cd0afbed23c 1245 if (app == APP_CHAT) {
dudmuck 18:9530d682fd9a 1246 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 8:227605e4a760 1247 } else if (per_en) {
dudmuck 18:9530d682fd9a 1248 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 18:9530d682fd9a 1249 } else if (on_txdone_state != ON_TXDONE_STATE_NONE) {
dudmuck 18:9530d682fd9a 1250 on_txdone_timeout.attach(&txdone_timeout_cb, on_txdone_delay);
dudmuck 1:1cd0afbed23c 1251 }
dudmuck 1:1cd0afbed23c 1252 break;
dudmuck 1:1cd0afbed23c 1253 case SERVICE_ERROR:
dudmuck 1:1cd0afbed23c 1254 printf("error\r\n");
dudmuck 1:1cd0afbed23c 1255 break;
dudmuck 1:1cd0afbed23c 1256 } // ...switch (act)
dudmuck 1:1cd0afbed23c 1257 } else {
dudmuck 1:1cd0afbed23c 1258 /* FSK: */
dudmuck 1:1cd0afbed23c 1259 act = fsk.service();
dudmuck 1:1cd0afbed23c 1260
dudmuck 1:1cd0afbed23c 1261 switch (act) {
dudmuck 1:1cd0afbed23c 1262 case SERVICE_READ_FIFO:
dudmuck 2:c6b23a43a9d9 1263 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1264 int n = fsk.rx_buf_length;
dudmuck 2:c6b23a43a9d9 1265 radio.rx_buf[n++] = '\r';
dudmuck 2:c6b23a43a9d9 1266 radio.rx_buf[n++] = '\n';
dudmuck 2:c6b23a43a9d9 1267 radio.rx_buf[n] = 0; // null terminate
dudmuck 2:c6b23a43a9d9 1268 printf((char *)radio.rx_buf);
dudmuck 2:c6b23a43a9d9 1269 } else {
dudmuck 2:c6b23a43a9d9 1270 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 14:c57ea544dc18 1271 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 14:c57ea544dc18 1272 if (rssi != 0) {
dudmuck 15:c69b942685ea 1273 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 14:c57ea544dc18 1274 rssi = 0;
dudmuck 15:c69b942685ea 1275 }
dudmuck 13:c73caaee93a5 1276 if (per_en) {
dudmuck 13:c73caaee93a5 1277 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 13:c73caaee93a5 1278 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1279 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1280 }
dudmuck 13:c73caaee93a5 1281 } else {
dudmuck 13:c73caaee93a5 1282 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1283 }
dudmuck 15:c69b942685ea 1284 fflush(stdout);
dudmuck 2:c6b23a43a9d9 1285 }
dudmuck 1:1cd0afbed23c 1286 break;
dudmuck 2:c6b23a43a9d9 1287 case SERVICE_TX_DONE:
dudmuck 18:9530d682fd9a 1288 if (ook_test_en)
dudmuck 18:9530d682fd9a 1289 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:c6b23a43a9d9 1290 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1291 fsk.start_rx();
dudmuck 13:c73caaee93a5 1292 } else if (per_en) {
dudmuck 13:c73caaee93a5 1293 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 13:c73caaee93a5 1294 }
dudmuck 2:c6b23a43a9d9 1295 break;
dudmuck 1:1cd0afbed23c 1296 } // ...switch (act)
dudmuck 14:c57ea544dc18 1297
dudmuck 14:c57ea544dc18 1298 /* fsk sync address */
dudmuck 14:c57ea544dc18 1299 if (dio2 && radio.RegDioMapping1.bits.Dio2Mapping == 3) {
dudmuck 14:c57ea544dc18 1300 // syncAdrs when in RX mode
dudmuck 14:c57ea544dc18 1301 if (rssi == 0) {
dudmuck 15:c69b942685ea 1302 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 14:c57ea544dc18 1303 }
dudmuck 14:c57ea544dc18 1304 }
dudmuck 14:c57ea544dc18 1305
dudmuck 14:c57ea544dc18 1306 } // ...!radio.RegOpMode.bits.LongRangeMode
dudmuck 0:be215de91a68 1307 }
dudmuck 0:be215de91a68 1308
dudmuck 5:360069ec9953 1309 /*int get_kbd_str(char* buf, int size)
dudmuck 0:be215de91a68 1310 {
dudmuck 0:be215de91a68 1311 char c;
dudmuck 0:be215de91a68 1312 int i;
dudmuck 0:be215de91a68 1313 static int prev_len;
dudmuck 0:be215de91a68 1314
dudmuck 0:be215de91a68 1315 for (i = 0;;) {
dudmuck 0:be215de91a68 1316 if (pc.readable()) {
dudmuck 0:be215de91a68 1317 c = pc.getc();
dudmuck 0:be215de91a68 1318 if (c == 8 && i > 0) {
dudmuck 0:be215de91a68 1319 pc.putc(8);
dudmuck 0:be215de91a68 1320 pc.putc(' ');
dudmuck 0:be215de91a68 1321 pc.putc(8);
dudmuck 0:be215de91a68 1322 i--;
dudmuck 0:be215de91a68 1323 } else if (c == '\r') {
dudmuck 0:be215de91a68 1324 if (i == 0) {
dudmuck 0:be215de91a68 1325 return prev_len; // repeat previous
dudmuck 0:be215de91a68 1326 } else {
dudmuck 0:be215de91a68 1327 buf[i] = 0; // null terminate
dudmuck 0:be215de91a68 1328 prev_len = i;
dudmuck 0:be215de91a68 1329 return i;
dudmuck 0:be215de91a68 1330 }
dudmuck 0:be215de91a68 1331 } else if (c == 3) {
dudmuck 0:be215de91a68 1332 // ctrl-C abort
dudmuck 0:be215de91a68 1333 return -1;
dudmuck 0:be215de91a68 1334 } else if (i < size) {
dudmuck 0:be215de91a68 1335 buf[i++] = c;
dudmuck 0:be215de91a68 1336 pc.putc(c);
dudmuck 0:be215de91a68 1337 }
dudmuck 4:7a9007dfc0e5 1338 } else {
dudmuck 0:be215de91a68 1339 service_radio();
dudmuck 4:7a9007dfc0e5 1340 }
dudmuck 0:be215de91a68 1341 } // ...for()
dudmuck 5:360069ec9953 1342 }*/
dudmuck 0:be215de91a68 1343
dudmuck 0:be215de91a68 1344 void
dudmuck 0:be215de91a68 1345 console_chat()
dudmuck 0:be215de91a68 1346 {
dudmuck 5:360069ec9953 1347 //int i, len = get_kbd_str(pcbuf, sizeof(pcbuf));
dudmuck 5:360069ec9953 1348
dudmuck 5:360069ec9953 1349 service_radio();
dudmuck 5:360069ec9953 1350
dudmuck 5:360069ec9953 1351 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 1352 printf("chat abort\r\n");
dudmuck 5:360069ec9953 1353 pcbuf_len = 0;
dudmuck 0:be215de91a68 1354 app = APP_NONE;
dudmuck 0:be215de91a68 1355 return;
dudmuck 5:360069ec9953 1356 } else if (pcbuf_len == 0) {
dudmuck 5:360069ec9953 1357 return;
dudmuck 0:be215de91a68 1358 } else {
dudmuck 5:360069ec9953 1359 int i;
dudmuck 5:360069ec9953 1360 for (i = 0; i < pcbuf_len; i++)
dudmuck 0:be215de91a68 1361 radio.tx_buf[i] = pcbuf[i];
dudmuck 1:1cd0afbed23c 1362 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 5:360069ec9953 1363 lora.RegPayloadLength = pcbuf_len;
dudmuck 1:1cd0afbed23c 1364 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 5:360069ec9953 1365 lora.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1366 } else {
dudmuck 5:360069ec9953 1367 fsk.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1368 }
dudmuck 5:360069ec9953 1369 pcbuf_len = 0;
dudmuck 0:be215de91a68 1370 printf("\r\n");
dudmuck 0:be215de91a68 1371 }
dudmuck 0:be215de91a68 1372 }
dudmuck 0:be215de91a68 1373
dudmuck 18:9530d682fd9a 1374 typedef enum {
dudmuck 18:9530d682fd9a 1375 TXTICKER_STATE_OFF = 0,
dudmuck 18:9530d682fd9a 1376 TXTICKER_STATE_TOGGLE_PAYLOAD_BIT,
dudmuck 18:9530d682fd9a 1377 TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1378 TXTICKER_STATE_CYCLE_CODING_RATE,
dudmuck 18:9530d682fd9a 1379 TXTICKER_STATE_TOG_HEADER_MODE,
dudmuck 18:9530d682fd9a 1380 TXTICKER_STATE_TOG_CRC_ON,
dudmuck 18:9530d682fd9a 1381 TXTICKER_STATE_CYCLE_SYNC_1,
dudmuck 18:9530d682fd9a 1382 TXTICKER_STATE_CYCLE_SYNC_2,
dudmuck 18:9530d682fd9a 1383 TXTICKER_STATE_RAMP_PAYLOAD_DATA_START,
dudmuck 18:9530d682fd9a 1384 TXTICKER_STATE_RAMP_PAYLOAD_DATA,
dudmuck 18:9530d682fd9a 1385 TXTICKER_STATE_SYMBOL_SWEEP,
dudmuck 18:9530d682fd9a 1386 TXTICKER_STATE_TOGGLE_ALL_BITS_START,
dudmuck 18:9530d682fd9a 1387 TXTICKER_STATE_TOGGLE_ALL_BITS,
dudmuck 18:9530d682fd9a 1388 } txticker_state_e;
dudmuck 18:9530d682fd9a 1389
dudmuck 18:9530d682fd9a 1390 txticker_state_e txticker_state;
dudmuck 18:9530d682fd9a 1391 float tx_ticker_rate = 0.5;
dudmuck 18:9530d682fd9a 1392 Ticker tx_ticker;
dudmuck 18:9530d682fd9a 1393
dudmuck 18:9530d682fd9a 1394 uint8_t txticker_sync_byte;
dudmuck 18:9530d682fd9a 1395 uint8_t payload_length_stop;
dudmuck 18:9530d682fd9a 1396 uint8_t symbol_num;
dudmuck 18:9530d682fd9a 1397 uint32_t symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 1398 unsigned int symbol_sweep_bit_counter_stop;
dudmuck 18:9530d682fd9a 1399 uint8_t symbol_sweep_nbits;
dudmuck 18:9530d682fd9a 1400 uint8_t byte_pad_length;
dudmuck 18:9530d682fd9a 1401
dudmuck 18:9530d682fd9a 1402 uint8_t tab_current_byte_num;
dudmuck 18:9530d682fd9a 1403 uint8_t tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1404
dudmuck 18:9530d682fd9a 1405 void fp_cb()
dudmuck 18:9530d682fd9a 1406 {
dudmuck 18:9530d682fd9a 1407 int i;
dudmuck 18:9530d682fd9a 1408 if (!radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1409 return;
dudmuck 18:9530d682fd9a 1410
dudmuck 18:9530d682fd9a 1411 switch (txticker_state) {
dudmuck 18:9530d682fd9a 1412 case TXTICKER_STATE_TOGGLE_PAYLOAD_BIT:
dudmuck 18:9530d682fd9a 1413 /*
dudmuck 18:9530d682fd9a 1414 {
dudmuck 18:9530d682fd9a 1415 if (fp_tog_bit_ < 32) {
dudmuck 18:9530d682fd9a 1416 uint32_t bp = 1 << fp_tog_bit_;
dudmuck 18:9530d682fd9a 1417 fp_data ^= bp;
dudmuck 18:9530d682fd9a 1418 //printf("bp%02x ", bp);
dudmuck 18:9530d682fd9a 1419 }
dudmuck 18:9530d682fd9a 1420 memcpy(radio.tx_buf, &fp_data, fp_data_length);
dudmuck 18:9530d682fd9a 1421 printf("TX ");
dudmuck 18:9530d682fd9a 1422 for (i = 0; i < fp_data_length; i++)
dudmuck 18:9530d682fd9a 1423 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1424
dudmuck 18:9530d682fd9a 1425 printf("\r\n");
dudmuck 18:9530d682fd9a 1426 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1427 break;
dudmuck 18:9530d682fd9a 1428 }
dudmuck 18:9530d682fd9a 1429 */
dudmuck 18:9530d682fd9a 1430 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1431 break;
dudmuck 18:9530d682fd9a 1432 case TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1433 {
dudmuck 18:9530d682fd9a 1434 if (lora.RegPayloadLength > payload_length_stop)
dudmuck 18:9530d682fd9a 1435 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 1436 else
dudmuck 18:9530d682fd9a 1437 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1438
dudmuck 18:9530d682fd9a 1439 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1440 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1441 printf("RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1442 break;
dudmuck 18:9530d682fd9a 1443 }
dudmuck 18:9530d682fd9a 1444 case TXTICKER_STATE_CYCLE_CODING_RATE:
dudmuck 18:9530d682fd9a 1445 {
dudmuck 18:9530d682fd9a 1446 uint8_t cr = lora.getCodingRate(false); // false: TX coding rate
dudmuck 18:9530d682fd9a 1447 if (cr == 4)
dudmuck 18:9530d682fd9a 1448 cr = 0;
dudmuck 18:9530d682fd9a 1449 else
dudmuck 18:9530d682fd9a 1450 cr++;
dudmuck 18:9530d682fd9a 1451
dudmuck 18:9530d682fd9a 1452 lora.setCodingRate(cr);
dudmuck 18:9530d682fd9a 1453 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1454 printf("tx cr:%d\r\n", cr);
dudmuck 18:9530d682fd9a 1455 break;
dudmuck 18:9530d682fd9a 1456 }
dudmuck 18:9530d682fd9a 1457 case TXTICKER_STATE_TOG_HEADER_MODE:
dudmuck 18:9530d682fd9a 1458 {
dudmuck 18:9530d682fd9a 1459 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 1460 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1461 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 1462 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 1463 printf("\r\n");
dudmuck 18:9530d682fd9a 1464 break;
dudmuck 18:9530d682fd9a 1465 }
dudmuck 18:9530d682fd9a 1466 case TXTICKER_STATE_TOG_CRC_ON:
dudmuck 18:9530d682fd9a 1467 {
dudmuck 18:9530d682fd9a 1468 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1469 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1470 printf("crc on:%d\r\n", lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1471 break;
dudmuck 18:9530d682fd9a 1472 }
dudmuck 18:9530d682fd9a 1473 case TXTICKER_STATE_CYCLE_SYNC_1:
dudmuck 18:9530d682fd9a 1474 {
dudmuck 18:9530d682fd9a 1475 /* cycle hi nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1476 if ((txticker_sync_byte & 0xf0) == 0xf0)
dudmuck 18:9530d682fd9a 1477 txticker_sync_byte &= 0x0f;
dudmuck 18:9530d682fd9a 1478 else
dudmuck 18:9530d682fd9a 1479 txticker_sync_byte += 0x10;
dudmuck 18:9530d682fd9a 1480 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1481 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1482 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1483 break;
dudmuck 18:9530d682fd9a 1484 }
dudmuck 18:9530d682fd9a 1485 case TXTICKER_STATE_CYCLE_SYNC_2:
dudmuck 18:9530d682fd9a 1486 {
dudmuck 18:9530d682fd9a 1487 /* cycle lo nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1488 if ((txticker_sync_byte & 0x0f) == 0x0f)
dudmuck 18:9530d682fd9a 1489 txticker_sync_byte &= 0xf0;
dudmuck 18:9530d682fd9a 1490 else
dudmuck 18:9530d682fd9a 1491 txticker_sync_byte += 0x01;
dudmuck 18:9530d682fd9a 1492 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1493 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1494 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1495 break;
dudmuck 18:9530d682fd9a 1496 }
dudmuck 18:9530d682fd9a 1497 case TXTICKER_STATE_RAMP_PAYLOAD_DATA_START:
dudmuck 18:9530d682fd9a 1498 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA;
dudmuck 18:9530d682fd9a 1499 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1500 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1501
dudmuck 18:9530d682fd9a 1502 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1503 printf("payload start, len:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1504 break;
dudmuck 18:9530d682fd9a 1505 case TXTICKER_STATE_RAMP_PAYLOAD_DATA:
dudmuck 18:9530d682fd9a 1506 for (i = lora.RegPayloadLength-1; i >= 0; i--) {
dudmuck 18:9530d682fd9a 1507 //printf("i:%d ", i);
dudmuck 18:9530d682fd9a 1508 if (radio.tx_buf[i] == 255) {
dudmuck 18:9530d682fd9a 1509 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1510 } else {
dudmuck 18:9530d682fd9a 1511 radio.tx_buf[i]++;
dudmuck 18:9530d682fd9a 1512 break;
dudmuck 18:9530d682fd9a 1513 }
dudmuck 18:9530d682fd9a 1514 }
dudmuck 18:9530d682fd9a 1515 //printf("\r\n");
dudmuck 18:9530d682fd9a 1516 printf("send:");
dudmuck 18:9530d682fd9a 1517 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1518 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1519 }
dudmuck 18:9530d682fd9a 1520 printf("\r\n");
dudmuck 18:9530d682fd9a 1521 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1522 if (radio.tx_buf[0] == 255) {
dudmuck 18:9530d682fd9a 1523 printf("payload ramp done\r\n");
dudmuck 18:9530d682fd9a 1524 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1525 }
dudmuck 18:9530d682fd9a 1526 break;
dudmuck 18:9530d682fd9a 1527 case TXTICKER_STATE_SYMBOL_SWEEP: // fpsNL command, where N=symbol num, L=nbytes
dudmuck 18:9530d682fd9a 1528 {
dudmuck 18:9530d682fd9a 1529 uint32_t mask;
dudmuck 18:9530d682fd9a 1530 /*for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1531 radio.tx_buf[i] = 0;*/
dudmuck 18:9530d682fd9a 1532 i = byte_pad_length;
dudmuck 18:9530d682fd9a 1533 printf("bit_counter 0x%x : ", symbol_sweep_bit_counter);
dudmuck 18:9530d682fd9a 1534 for (int bn = 0; bn < symbol_sweep_nbits; bn += 2) {
dudmuck 18:9530d682fd9a 1535 /* 2 lsbits going into first byte */
dudmuck 18:9530d682fd9a 1536 mask = 1 << bn;
dudmuck 18:9530d682fd9a 1537 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1538 radio.tx_buf[i] |= 1 << symbol_num;
dudmuck 18:9530d682fd9a 1539 else
dudmuck 18:9530d682fd9a 1540 radio.tx_buf[i] &= ~(1 << symbol_num);
dudmuck 18:9530d682fd9a 1541 mask = 2 << bn;
dudmuck 18:9530d682fd9a 1542 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1543 radio.tx_buf[i] |= 0x10 << symbol_num;
dudmuck 18:9530d682fd9a 1544 else
dudmuck 18:9530d682fd9a 1545 radio.tx_buf[i] &= ~(0x10 << symbol_num);
dudmuck 18:9530d682fd9a 1546 //printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1547 i++;
dudmuck 18:9530d682fd9a 1548 }
dudmuck 18:9530d682fd9a 1549 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1550 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1551 printf("\r\n");
dudmuck 18:9530d682fd9a 1552 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1553 if (++symbol_sweep_bit_counter == symbol_sweep_bit_counter_stop) {
dudmuck 18:9530d682fd9a 1554 printf("stop\r\n");
dudmuck 18:9530d682fd9a 1555 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1556 }
dudmuck 18:9530d682fd9a 1557 }
dudmuck 18:9530d682fd9a 1558 break;
dudmuck 18:9530d682fd9a 1559 case TXTICKER_STATE_TOGGLE_ALL_BITS_START:
dudmuck 18:9530d682fd9a 1560 tab_current_byte_num = byte_pad_length;
dudmuck 18:9530d682fd9a 1561 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1562 printf("tx ");
dudmuck 18:9530d682fd9a 1563 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1564 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1565 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1566 }
dudmuck 18:9530d682fd9a 1567 printf("\r\n");
dudmuck 18:9530d682fd9a 1568 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS;
dudmuck 18:9530d682fd9a 1569 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1570 break;
dudmuck 18:9530d682fd9a 1571 case TXTICKER_STATE_TOGGLE_ALL_BITS:
dudmuck 18:9530d682fd9a 1572 {
dudmuck 18:9530d682fd9a 1573 uint8_t mask = 1 << tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1574 radio.tx_buf[tab_current_byte_num] = mask;
dudmuck 18:9530d682fd9a 1575 printf("bit%d in [%d]: tx ", tab_current_bit_in_byte, tab_current_byte_num);
dudmuck 18:9530d682fd9a 1576 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1577 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1578 }
dudmuck 18:9530d682fd9a 1579 printf("\r\n");
dudmuck 18:9530d682fd9a 1580 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1581 if (++tab_current_bit_in_byte == 8) {
dudmuck 18:9530d682fd9a 1582 radio.tx_buf[tab_current_byte_num] = 0;
dudmuck 18:9530d682fd9a 1583 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1584 if (++tab_current_byte_num == lora.RegPayloadLength) {
dudmuck 18:9530d682fd9a 1585 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1586 }
dudmuck 18:9530d682fd9a 1587 }
dudmuck 18:9530d682fd9a 1588 }
dudmuck 18:9530d682fd9a 1589 break;
dudmuck 18:9530d682fd9a 1590 default:
dudmuck 18:9530d682fd9a 1591 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1592 break;
dudmuck 18:9530d682fd9a 1593 } // ...switch (txticker_state)
dudmuck 18:9530d682fd9a 1594 }
dudmuck 18:9530d682fd9a 1595
dudmuck 18:9530d682fd9a 1596 void ook_test_tx(int len)
dudmuck 18:9530d682fd9a 1597 {
dudmuck 18:9530d682fd9a 1598 int i;
dudmuck 18:9530d682fd9a 1599 /*
dudmuck 18:9530d682fd9a 1600 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 1601 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 1602 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 1603 */
dudmuck 18:9530d682fd9a 1604 for (i = 0; i < 4; i++) {
dudmuck 18:9530d682fd9a 1605 radio.tx_buf[i] = 0xaa;
dudmuck 18:9530d682fd9a 1606 }
dudmuck 18:9530d682fd9a 1607
dudmuck 18:9530d682fd9a 1608 printf("ooktx:");
dudmuck 18:9530d682fd9a 1609 for (i = 0; i < len; i++) {
dudmuck 18:9530d682fd9a 1610 radio.tx_buf[i+4] = rand() & 0xff;
dudmuck 18:9530d682fd9a 1611 printf("%02x ", radio.tx_buf[i+4]);
dudmuck 18:9530d682fd9a 1612 }
dudmuck 18:9530d682fd9a 1613 printf("\r\n");
dudmuck 18:9530d682fd9a 1614 fsk.start_tx(len+4);
dudmuck 18:9530d682fd9a 1615
dudmuck 18:9530d682fd9a 1616 while (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1617 if (poll_irq_en)
dudmuck 18:9530d682fd9a 1618 poll_service_radio();
dudmuck 18:9530d682fd9a 1619 else
dudmuck 18:9530d682fd9a 1620 service_radio();
dudmuck 18:9530d682fd9a 1621 }
dudmuck 18:9530d682fd9a 1622 }
dudmuck 18:9530d682fd9a 1623
dudmuck 18:9530d682fd9a 1624 void cmd_init(uint8_t args_at)
dudmuck 10:d9bb2ce57f05 1625 {
dudmuck 18:9530d682fd9a 1626 printf("init\r\n");
dudmuck 18:9530d682fd9a 1627 radio.init();
dudmuck 18:9530d682fd9a 1628 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1629 fsk.init(); // put FSK modem to some functioning default
dudmuck 18:9530d682fd9a 1630 } else {
dudmuck 18:9530d682fd9a 1631 // lora configuration is more simple
dudmuck 18:9530d682fd9a 1632 }
dudmuck 18:9530d682fd9a 1633 }
dudmuck 18:9530d682fd9a 1634
dudmuck 18:9530d682fd9a 1635 void cmd_per_tx_delay(uint8_t idx)
dudmuck 18:9530d682fd9a 1636 {
dudmuck 18:9530d682fd9a 1637 int i;
dudmuck 18:9530d682fd9a 1638 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1639 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1640 per_tx_delay = i / 1000.0;
dudmuck 18:9530d682fd9a 1641 }
dudmuck 18:9530d682fd9a 1642 printf("per_tx_delay:%dms\r\n", (int)(per_tx_delay * 1000));
dudmuck 18:9530d682fd9a 1643 }
dudmuck 18:9530d682fd9a 1644
dudmuck 18:9530d682fd9a 1645 void cmd_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 1646 {
dudmuck 18:9530d682fd9a 1647 int i;
dudmuck 18:9530d682fd9a 1648 static uint16_t fsk_tx_length;
dudmuck 18:9530d682fd9a 1649
dudmuck 18:9530d682fd9a 1650 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1651 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1652 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1653 lora.RegPayloadLength = i;
dudmuck 18:9530d682fd9a 1654 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1655 }
dudmuck 18:9530d682fd9a 1656 tx_cnt++;
dudmuck 18:9530d682fd9a 1657 printf("payload:%02x\r\n", tx_cnt);
dudmuck 18:9530d682fd9a 1658
dudmuck 18:9530d682fd9a 1659 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1660 radio.tx_buf[i] = tx_cnt;
dudmuck 18:9530d682fd9a 1661 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1662 } else { // FSK:
dudmuck 18:9530d682fd9a 1663 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1664 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1665 fsk_tx_length = i;
dudmuck 18:9530d682fd9a 1666 }
dudmuck 18:9530d682fd9a 1667 if (ook_test_en) {
dudmuck 18:9530d682fd9a 1668 ook_test_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 1669 } else {
dudmuck 18:9530d682fd9a 1670 if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting
dudmuck 18:9530d682fd9a 1671 tx_cnt++;
dudmuck 18:9530d682fd9a 1672 printf("payload:%02x\r\n", tx_cnt);
dudmuck 18:9530d682fd9a 1673 for (i = 0; i < fsk_tx_length; i++) {
dudmuck 18:9530d682fd9a 1674 radio.tx_buf[i] = tx_cnt;
dudmuck 18:9530d682fd9a 1675 }
dudmuck 18:9530d682fd9a 1676 fsk.start_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 1677 }
dudmuck 18:9530d682fd9a 1678 }
dudmuck 18:9530d682fd9a 1679 } // !LoRa
dudmuck 18:9530d682fd9a 1680
dudmuck 18:9530d682fd9a 1681 }
dudmuck 18:9530d682fd9a 1682
dudmuck 18:9530d682fd9a 1683 void cmd_hw_reset(uint8_t idx)
dudmuck 18:9530d682fd9a 1684 {
dudmuck 18:9530d682fd9a 1685 printf("hw_reset()\r\n");
dudmuck 18:9530d682fd9a 1686 radio.hw_reset();
dudmuck 18:9530d682fd9a 1687 ook_test_en = false;
dudmuck 18:9530d682fd9a 1688 poll_irq_en = false;
dudmuck 18:9530d682fd9a 1689 }
dudmuck 18:9530d682fd9a 1690
dudmuck 18:9530d682fd9a 1691 void cmd_read_all_regs(uint8_t idx)
dudmuck 18:9530d682fd9a 1692 {
dudmuck 18:9530d682fd9a 1693 uint8_t a, d;
dudmuck 18:9530d682fd9a 1694
dudmuck 18:9530d682fd9a 1695 // read all registers
dudmuck 18:9530d682fd9a 1696 for (a = 1; a < 0x71; a++) {
dudmuck 18:9530d682fd9a 1697 d = radio.read_reg(a);
dudmuck 18:9530d682fd9a 1698 printf("%02x: %02x\r\n", a, d);
dudmuck 18:9530d682fd9a 1699 }
dudmuck 18:9530d682fd9a 1700 }
dudmuck 18:9530d682fd9a 1701
dudmuck 18:9530d682fd9a 1702 void cmd_read_current_rssi(uint8_t idx)
dudmuck 18:9530d682fd9a 1703 {
dudmuck 18:9530d682fd9a 1704 if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 1705 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 1706 wait_us(10000);
dudmuck 18:9530d682fd9a 1707 }
dudmuck 18:9530d682fd9a 1708 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1709 printf("rssi:%ddBm\r\n", lora.get_current_rssi());
dudmuck 18:9530d682fd9a 1710 else
dudmuck 18:9530d682fd9a 1711 printf("rssi:-%.1f\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 18:9530d682fd9a 1712 }
dudmuck 18:9530d682fd9a 1713
dudmuck 18:9530d682fd9a 1714 void cmd_lora_continuous_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 1715 {
dudmuck 18:9530d682fd9a 1716 /* TxContinuousMode same for sx1272 and sx1276 */
dudmuck 18:9530d682fd9a 1717 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 1718 lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1;
dudmuck 18:9530d682fd9a 1719 radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet);
dudmuck 18:9530d682fd9a 1720 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 13:c73caaee93a5 1721
dudmuck 18:9530d682fd9a 1722 lora_printTxContinuousMode();
dudmuck 18:9530d682fd9a 1723 printf("\r\n");
dudmuck 18:9530d682fd9a 1724 }
dudmuck 18:9530d682fd9a 1725
dudmuck 18:9530d682fd9a 1726 void cmd_fsk_test_case(uint8_t idx)
dudmuck 18:9530d682fd9a 1727 {
dudmuck 18:9530d682fd9a 1728 if (pcbuf[idx] < '0' || pcbuf[idx] > '9') {
dudmuck 18:9530d682fd9a 1729 printf("%dbps fdev:%dhz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 18:9530d682fd9a 1730 printf("rxbw:%dHz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 18:9530d682fd9a 1731 printf("afcbw:%dHz preambleLen:%d\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 1732 } else {
dudmuck 18:9530d682fd9a 1733 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 1734 per_tx_delay = 0.3;
dudmuck 18:9530d682fd9a 1735
dudmuck 18:9530d682fd9a 1736 if (radio.read_reg(REG_FSK_SYNCVALUE1) == 0x55 && radio.read_reg(REG_FSK_SYNCVALUE2)) {
dudmuck 18:9530d682fd9a 1737 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 1738 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 18:9530d682fd9a 1739 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 1740 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 18:9530d682fd9a 1741 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 18:9530d682fd9a 1742 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 18:9530d682fd9a 1743 }
dudmuck 18:9530d682fd9a 1744
dudmuck 18:9530d682fd9a 1745 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 18:9530d682fd9a 1746 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 1747 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 1748
dudmuck 18:9530d682fd9a 1749 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 1750 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 18:9530d682fd9a 1751 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 18:9530d682fd9a 1752 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 1753 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 1754
dudmuck 18:9530d682fd9a 1755 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 1756 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 18:9530d682fd9a 1757 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 18:9530d682fd9a 1758 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 1759
dudmuck 18:9530d682fd9a 1760 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 1761 case '0':
dudmuck 18:9530d682fd9a 1762 fsk.set_bitrate(4800);
dudmuck 18:9530d682fd9a 1763 fsk.set_tx_fdev_hz(5005);
dudmuck 18:9530d682fd9a 1764 fsk.set_rx_dcc_bw_hz(10417, 0); // rxbw
dudmuck 18:9530d682fd9a 1765 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 1766 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1767 break;
dudmuck 18:9530d682fd9a 1768 case '1':
dudmuck 18:9530d682fd9a 1769 fsk.set_bitrate(50000);
dudmuck 18:9530d682fd9a 1770 fsk.set_tx_fdev_hz(25000);
dudmuck 18:9530d682fd9a 1771 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 18:9530d682fd9a 1772 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 1773 radio.write_u16(REG_FSK_PREAMBLEMSB, 9);
dudmuck 18:9530d682fd9a 1774 break;
dudmuck 18:9530d682fd9a 1775 case '2':
dudmuck 18:9530d682fd9a 1776 fsk.set_bitrate(38400);
dudmuck 18:9530d682fd9a 1777 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 1778 fsk.set_rx_dcc_bw_hz(50000, 0); // rxbw
dudmuck 18:9530d682fd9a 1779 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 1780 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1781 break;
dudmuck 18:9530d682fd9a 1782 case '3':
dudmuck 18:9530d682fd9a 1783 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1784 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 1785 fsk.set_rx_dcc_bw_hz(25000, 0); // rxbw
dudmuck 18:9530d682fd9a 1786 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 1787 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1788 break;
dudmuck 18:9530d682fd9a 1789 case '4':
dudmuck 18:9530d682fd9a 1790 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1791 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 1792 fsk.set_rx_dcc_bw_hz(7813, 0); // rxbw
dudmuck 18:9530d682fd9a 1793 fsk.set_rx_dcc_bw_hz(25000, 1); // afcbw
dudmuck 18:9530d682fd9a 1794 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1795 break;
dudmuck 18:9530d682fd9a 1796 case '5':
dudmuck 18:9530d682fd9a 1797 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 1798 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 1799 fsk.set_rx_dcc_bw_hz(5208, 0); // rxbw
dudmuck 18:9530d682fd9a 1800 fsk.set_rx_dcc_bw_hz(10417, 1); // afcbw
dudmuck 18:9530d682fd9a 1801 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 1802 break;
dudmuck 18:9530d682fd9a 1803 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 1804 printf("%dbps fdev:%dhz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 18:9530d682fd9a 1805 printf("rxbw:%dHz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 18:9530d682fd9a 1806 printf("afcbw:%dHz preambleLen:%d\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 1807 }
dudmuck 18:9530d682fd9a 1808 }
dudmuck 18:9530d682fd9a 1809
dudmuck 18:9530d682fd9a 1810 void cmd_toggle_modem(uint8_t idx)
dudmuck 18:9530d682fd9a 1811 {
dudmuck 18:9530d682fd9a 1812 ook_test_en = false;
dudmuck 18:9530d682fd9a 1813 poll_irq_en = false;
dudmuck 18:9530d682fd9a 1814 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1815 fsk.enable(false);
dudmuck 18:9530d682fd9a 1816 else
dudmuck 18:9530d682fd9a 1817 lora.enable();
dudmuck 18:9530d682fd9a 1818
dudmuck 18:9530d682fd9a 1819 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 1820 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1821 printf("LoRa\r\n");
dudmuck 18:9530d682fd9a 1822 else
dudmuck 18:9530d682fd9a 1823 printf("FSK\r\n");
dudmuck 18:9530d682fd9a 1824 }
dudmuck 18:9530d682fd9a 1825
dudmuck 18:9530d682fd9a 1826 void cmd_empty_fifo(uint8_t idx)
dudmuck 18:9530d682fd9a 1827 {
dudmuck 18:9530d682fd9a 1828 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1829 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1830 while (!RegIrqFlags2.bits.FifoEmpty) {
dudmuck 18:9530d682fd9a 1831 if (pc.readable())
dudmuck 18:9530d682fd9a 1832 break;
dudmuck 18:9530d682fd9a 1833 printf("%02x\r\n", radio.read_reg(REG_FIFO));
dudmuck 18:9530d682fd9a 1834 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1835 }
dudmuck 18:9530d682fd9a 1836 }
dudmuck 18:9530d682fd9a 1837
dudmuck 18:9530d682fd9a 1838 void cmd_print_status(uint8_t idx)
dudmuck 18:9530d682fd9a 1839 {
dudmuck 18:9530d682fd9a 1840 if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 1841 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 18:9530d682fd9a 1842 printf("\r\nSX1276 ");
dudmuck 18:9530d682fd9a 1843 #else
dudmuck 18:9530d682fd9a 1844 if (shield_type == SHIELD_TYPE_LAS)
dudmuck 18:9530d682fd9a 1845 printf("\r\nSX1276LAS ");
dudmuck 18:9530d682fd9a 1846 if (shield_type == SHIELD_TYPE_MAS)
dudmuck 18:9530d682fd9a 1847 printf("\r\nSX1276MAS ");
dudmuck 18:9530d682fd9a 1848 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 1849 } else if (radio.type == SX1272)
dudmuck 18:9530d682fd9a 1850 printf("\r\nSX1272 ");
dudmuck 18:9530d682fd9a 1851
dudmuck 18:9530d682fd9a 1852 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 1853 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1854 lora_print_status();
dudmuck 18:9530d682fd9a 1855 else
dudmuck 18:9530d682fd9a 1856 fsk_print_status();
dudmuck 18:9530d682fd9a 1857 common_print_status();
dudmuck 18:9530d682fd9a 1858 }
dudmuck 18:9530d682fd9a 1859
dudmuck 18:9530d682fd9a 1860 void cmd_hop_period(uint8_t idx)
dudmuck 18:9530d682fd9a 1861 {
dudmuck 18:9530d682fd9a 1862 int i;
dudmuck 18:9530d682fd9a 1863 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1864 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1865 lora.RegHopPeriod = i;
dudmuck 18:9530d682fd9a 1866 radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 1867 if (radio.RegDioMapping1.bits.Dio1Mapping != 1) {
dudmuck 18:9530d682fd9a 1868 radio.RegDioMapping1.bits.Dio1Mapping = 1;
dudmuck 18:9530d682fd9a 1869 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 1870 }
dudmuck 18:9530d682fd9a 1871 }
dudmuck 18:9530d682fd9a 1872 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 18:9530d682fd9a 1873 printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 1874 }
dudmuck 18:9530d682fd9a 1875
dudmuck 18:9530d682fd9a 1876 void cmd_lora_ppg(uint8_t idx)
dudmuck 18:9530d682fd9a 1877 {
dudmuck 18:9530d682fd9a 1878 int i;
dudmuck 18:9530d682fd9a 1879 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 1880 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 1881 radio.write_reg(REG_LR_SYNC_BYTE, i);
dudmuck 18:9530d682fd9a 1882 }
dudmuck 18:9530d682fd9a 1883 printf("lora sync:0x%02x\r\n", radio.read_reg(REG_LR_SYNC_BYTE));
dudmuck 18:9530d682fd9a 1884 }
dudmuck 18:9530d682fd9a 1885
dudmuck 18:9530d682fd9a 1886 void cmd_rssi_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 1887 {
dudmuck 18:9530d682fd9a 1888 int i;
dudmuck 18:9530d682fd9a 1889 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1890 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1891 fsk.RegRssiConfig.bits.RssiOffset = i;
dudmuck 18:9530d682fd9a 1892 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 1893 }
dudmuck 18:9530d682fd9a 1894 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 1895 printf("RssiOffset:%d\r\n", fsk.RegRssiConfig.bits.RssiOffset);
dudmuck 18:9530d682fd9a 1896 }
dudmuck 18:9530d682fd9a 1897
dudmuck 18:9530d682fd9a 1898 void cmd_rssi_smoothing(uint8_t idx)
dudmuck 18:9530d682fd9a 1899 {
dudmuck 18:9530d682fd9a 1900 int i;
dudmuck 18:9530d682fd9a 1901 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1902 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 1903 fsk.RegRssiConfig.bits.RssiSmoothing = i;
dudmuck 18:9530d682fd9a 1904 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 1905 }
dudmuck 18:9530d682fd9a 1906 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 1907 printf("RssiSmoothing:%d\r\n", fsk.RegRssiConfig.bits.RssiSmoothing);
dudmuck 18:9530d682fd9a 1908 }
dudmuck 18:9530d682fd9a 1909
dudmuck 18:9530d682fd9a 1910 void cmd_rssi_threshold(uint8_t idx)
dudmuck 18:9530d682fd9a 1911 {
dudmuck 18:9530d682fd9a 1912 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9' || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 1913 float dbm;
dudmuck 18:9530d682fd9a 1914 sscanf(pcbuf+idx, "%f", &dbm);
dudmuck 18:9530d682fd9a 1915 dbm *= (float)2.0;
dudmuck 18:9530d682fd9a 1916 fsk.RegRssiThresh = (int)fabs(dbm);
dudmuck 18:9530d682fd9a 1917 radio.write_reg(REG_FSK_RSSITHRESH, fsk.RegRssiThresh);
dudmuck 18:9530d682fd9a 1918 }
dudmuck 18:9530d682fd9a 1919 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 18:9530d682fd9a 1920 printf("rssiThreshold:-%.1f\r\n", fsk.RegRssiThresh / 2.0);
dudmuck 18:9530d682fd9a 1921 }
dudmuck 18:9530d682fd9a 1922
dudmuck 18:9530d682fd9a 1923 void cmd_rx_trigger(uint8_t idx)
dudmuck 18:9530d682fd9a 1924 {
dudmuck 18:9530d682fd9a 1925 printf("RxTrigger:");
dudmuck 18:9530d682fd9a 1926 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 18:9530d682fd9a 1927 case 0: fsk.RegRxConfig.bits.RxTrigger = 1;
dudmuck 18:9530d682fd9a 1928 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 1929 break;
dudmuck 18:9530d682fd9a 1930 case 1: fsk.RegRxConfig.bits.RxTrigger = 6;
dudmuck 18:9530d682fd9a 1931 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 1932 break;
dudmuck 18:9530d682fd9a 1933 case 6: fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 1934 printf("both\r\n");
dudmuck 18:9530d682fd9a 1935 break;
dudmuck 18:9530d682fd9a 1936 case 7: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 1937 printf("none\r\n");
dudmuck 18:9530d682fd9a 1938 break;
dudmuck 18:9530d682fd9a 1939 default: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 1940 printf("none\r\n");
dudmuck 18:9530d682fd9a 1941 break;
dudmuck 18:9530d682fd9a 1942 }
dudmuck 18:9530d682fd9a 1943 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 1944 }
dudmuck 18:9530d682fd9a 1945
dudmuck 18:9530d682fd9a 1946 void cmd_cadper(uint8_t idx)
dudmuck 18:9530d682fd9a 1947 {
dudmuck 18:9530d682fd9a 1948 set_per_en(true);
dudmuck 18:9530d682fd9a 1949
dudmuck 18:9530d682fd9a 1950 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1951 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 1952 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1953 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1954
dudmuck 18:9530d682fd9a 1955 cadper_enable = true;
dudmuck 18:9530d682fd9a 1956
dudmuck 18:9530d682fd9a 1957 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1958 /* clear any stale flag */
dudmuck 18:9530d682fd9a 1959 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1960
dudmuck 18:9530d682fd9a 1961 /* start first CAD */
dudmuck 18:9530d682fd9a 1962 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1963 num_cads = 0;
dudmuck 18:9530d682fd9a 1964 }
dudmuck 18:9530d682fd9a 1965
dudmuck 18:9530d682fd9a 1966 #if 0
dudmuck 18:9530d682fd9a 1967 void cmd_cadrx(uint8_t idx)
dudmuck 18:9530d682fd9a 1968 {
dudmuck 18:9530d682fd9a 1969 int n_tries = 1;
dudmuck 18:9530d682fd9a 1970 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1971 /* clear any stale flag */
dudmuck 18:9530d682fd9a 1972 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1973
dudmuck 18:9530d682fd9a 1974 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 1975 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 1976 }
dudmuck 18:9530d682fd9a 1977
dudmuck 18:9530d682fd9a 1978 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 1979 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1980
dudmuck 18:9530d682fd9a 1981 do {
dudmuck 18:9530d682fd9a 1982 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1983 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 1984 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1985 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1986 n_tries = 1; // end
dudmuck 18:9530d682fd9a 1987 printf("CadDetected ");
dudmuck 18:9530d682fd9a 1988 }
dudmuck 18:9530d682fd9a 1989 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1990 printf("CadDone ");
dudmuck 18:9530d682fd9a 1991 }
dudmuck 18:9530d682fd9a 1992
dudmuck 18:9530d682fd9a 1993 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1994 printf("\r\n");
dudmuck 18:9530d682fd9a 1995 n_tries--;
dudmuck 18:9530d682fd9a 1996 }
dudmuck 18:9530d682fd9a 1997 }
dudmuck 18:9530d682fd9a 1998 #endif /* #if 0 */
dudmuck 18:9530d682fd9a 1999
dudmuck 18:9530d682fd9a 2000 void cmd_cad(uint8_t idx)
dudmuck 18:9530d682fd9a 2001 {
dudmuck 18:9530d682fd9a 2002 int n_tries = 1;
dudmuck 18:9530d682fd9a 2003 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2004 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2005 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2006
dudmuck 18:9530d682fd9a 2007 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2008 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2009 }
dudmuck 18:9530d682fd9a 2010
dudmuck 18:9530d682fd9a 2011 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2012 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2013
dudmuck 18:9530d682fd9a 2014 do {
dudmuck 18:9530d682fd9a 2015 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2016 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2017 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2018 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2019 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2020 }
dudmuck 18:9530d682fd9a 2021 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2022 if (n_tries == 1) // print on last try
dudmuck 18:9530d682fd9a 2023 printf("CadDone ");
dudmuck 18:9530d682fd9a 2024 }
dudmuck 18:9530d682fd9a 2025
dudmuck 18:9530d682fd9a 2026 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2027 n_tries--;
dudmuck 18:9530d682fd9a 2028 }
dudmuck 18:9530d682fd9a 2029 printf("\r\n");
dudmuck 18:9530d682fd9a 2030 }
dudmuck 18:9530d682fd9a 2031
dudmuck 18:9530d682fd9a 2032 void cmd_rx_timeout(uint8_t idx)
dudmuck 18:9530d682fd9a 2033 {
dudmuck 18:9530d682fd9a 2034 int symb_timeout;
dudmuck 18:9530d682fd9a 2035 uint16_t reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2036
dudmuck 18:9530d682fd9a 2037 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2038 sscanf(pcbuf+idx, "%d", &symb_timeout);
dudmuck 18:9530d682fd9a 2039 reg_u16 &= 0xfc00;
dudmuck 18:9530d682fd9a 2040 reg_u16 |= symb_timeout;
dudmuck 18:9530d682fd9a 2041 }
dudmuck 18:9530d682fd9a 2042 reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2043 printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
dudmuck 18:9530d682fd9a 2044 }
dudmuck 18:9530d682fd9a 2045
dudmuck 18:9530d682fd9a 2046 void cmd_rx_single(uint8_t idx)
dudmuck 18:9530d682fd9a 2047 {
dudmuck 18:9530d682fd9a 2048 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2049 }
dudmuck 18:9530d682fd9a 2050
dudmuck 18:9530d682fd9a 2051 void cmd_rx(uint8_t idx)
dudmuck 18:9530d682fd9a 2052 {
dudmuck 18:9530d682fd9a 2053 set_per_en(false);
dudmuck 18:9530d682fd9a 2054
dudmuck 18:9530d682fd9a 2055 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2056 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2057 else {
dudmuck 18:9530d682fd9a 2058 fsk.start_rx();
dudmuck 18:9530d682fd9a 2059 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2060 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2061 if (radio.HF) {
dudmuck 18:9530d682fd9a 2062 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2063 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2064 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2065 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2066 }
dudmuck 18:9530d682fd9a 2067 }
dudmuck 18:9530d682fd9a 2068 }
dudmuck 18:9530d682fd9a 2069
dudmuck 18:9530d682fd9a 2070 void cmd_radio_reg_read(uint8_t idx)
dudmuck 18:9530d682fd9a 2071 {
dudmuck 18:9530d682fd9a 2072 int i;
dudmuck 18:9530d682fd9a 2073 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2074 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2075 }
dudmuck 18:9530d682fd9a 2076
dudmuck 18:9530d682fd9a 2077 void cmd_radio_reg_write(uint8_t idx)
dudmuck 18:9530d682fd9a 2078 {
dudmuck 18:9530d682fd9a 2079 int i, n;
dudmuck 18:9530d682fd9a 2080 sscanf(pcbuf+idx, "%x %x", &i, &n);
dudmuck 18:9530d682fd9a 2081 radio.write_reg(i, n);
dudmuck 18:9530d682fd9a 2082 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2083 }
dudmuck 18:9530d682fd9a 2084
dudmuck 18:9530d682fd9a 2085 void cmd_mod_shaping(uint8_t idx)
dudmuck 18:9530d682fd9a 2086 {
dudmuck 18:9530d682fd9a 2087 uint8_t s = fsk.get_modulation_shaping();
dudmuck 18:9530d682fd9a 2088
dudmuck 18:9530d682fd9a 2089 if (s == 3)
dudmuck 18:9530d682fd9a 2090 s = 0;
dudmuck 18:9530d682fd9a 2091 else
dudmuck 18:9530d682fd9a 2092 s++;
dudmuck 18:9530d682fd9a 2093
dudmuck 18:9530d682fd9a 2094 fsk.set_modulation_shaping(s);
dudmuck 18:9530d682fd9a 2095
dudmuck 18:9530d682fd9a 2096 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 18:9530d682fd9a 2097 printf("FSK ");
dudmuck 18:9530d682fd9a 2098 switch (s) {
dudmuck 18:9530d682fd9a 2099 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2100 case 1: printf("BT1.0 "); break;
dudmuck 18:9530d682fd9a 2101 case 2: printf("BT0.5 "); break;
dudmuck 18:9530d682fd9a 2102 case 3: printf("BT0.3 "); break;
dudmuck 18:9530d682fd9a 2103 }
dudmuck 18:9530d682fd9a 2104 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 18:9530d682fd9a 2105 printf("OOK ");
dudmuck 18:9530d682fd9a 2106 switch (s) {
dudmuck 18:9530d682fd9a 2107 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2108 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 2109 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 2110 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 2111 }
dudmuck 18:9530d682fd9a 2112 }
dudmuck 18:9530d682fd9a 2113
dudmuck 18:9530d682fd9a 2114 printf("\r\n");
dudmuck 18:9530d682fd9a 2115 }
dudmuck 18:9530d682fd9a 2116
dudmuck 18:9530d682fd9a 2117 void cmd_MapPreambleDetect(uint8_t idx)
dudmuck 18:9530d682fd9a 2118 {
dudmuck 18:9530d682fd9a 2119 radio.RegDioMapping2.bits.MapPreambleDetect ^= 1;
dudmuck 18:9530d682fd9a 2120 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2121 printf("MapPreambleDetect:");
dudmuck 18:9530d682fd9a 2122 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 18:9530d682fd9a 2123 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2124 else
dudmuck 18:9530d682fd9a 2125 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2126 }
dudmuck 18:9530d682fd9a 2127
dudmuck 18:9530d682fd9a 2128 void cmd_bgr(uint8_t idx)
dudmuck 18:9530d682fd9a 2129 {
dudmuck 18:9530d682fd9a 2130 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2131 uint8_t adr;
dudmuck 18:9530d682fd9a 2132 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2133 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2134 else
dudmuck 18:9530d682fd9a 2135 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2136
dudmuck 18:9530d682fd9a 2137 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2138 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2139 int i;
dudmuck 18:9530d682fd9a 2140 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2141 pds_trim.bits.prog_txdac = i;
dudmuck 18:9530d682fd9a 2142 }
dudmuck 18:9530d682fd9a 2143 radio.write_reg(adr, pds_trim.octet);
dudmuck 18:9530d682fd9a 2144 printf("prog_txdac:%.1fuA\r\n", 2.5 + (pds_trim.bits.prog_txdac * 0.625));
dudmuck 18:9530d682fd9a 2145 /* increase OCP threshold to allow more power */
dudmuck 18:9530d682fd9a 2146 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2147 if (radio.RegOcp.bits.OcpTrim < 16) {
dudmuck 18:9530d682fd9a 2148 radio.RegOcp.bits.OcpTrim = 16;
dudmuck 18:9530d682fd9a 2149 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2150 }
dudmuck 18:9530d682fd9a 2151 }
dudmuck 18:9530d682fd9a 2152
dudmuck 18:9530d682fd9a 2153 void cmd_ook(uint8_t idx)
dudmuck 18:9530d682fd9a 2154 {
dudmuck 18:9530d682fd9a 2155 fsk.set_bitrate(32768);
dudmuck 18:9530d682fd9a 2156 radio.write_u16(REG_FSK_PREAMBLEMSB, 0); // zero preamble length
dudmuck 18:9530d682fd9a 2157 radio.RegOpMode.bits.ModulationType = 1; // to ook mode
dudmuck 18:9530d682fd9a 2158 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 18:9530d682fd9a 2159 fsk.RegSyncConfig.bits.SyncOn = 0;
dudmuck 18:9530d682fd9a 2160 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2161 ook_test_en = true;
dudmuck 18:9530d682fd9a 2162 printf("OOK\r\n");
dudmuck 18:9530d682fd9a 2163 }
dudmuck 18:9530d682fd9a 2164
dudmuck 18:9530d682fd9a 2165 void cmd_ocp(uint8_t idx)
dudmuck 18:9530d682fd9a 2166 {
dudmuck 18:9530d682fd9a 2167 int i;
dudmuck 18:9530d682fd9a 2168 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2169 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2170 if (i < 130)
dudmuck 18:9530d682fd9a 2171 radio.RegOcp.bits.OcpTrim = (i - 45) / 5;
dudmuck 18:9530d682fd9a 2172 else
dudmuck 18:9530d682fd9a 2173 radio.RegOcp.bits.OcpTrim = (i + 30) / 10;
dudmuck 18:9530d682fd9a 2174 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2175 }
dudmuck 18:9530d682fd9a 2176 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2177 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 18:9530d682fd9a 2178 i = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 18:9530d682fd9a 2179 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 18:9530d682fd9a 2180 i = (10 * radio.RegOcp.bits.OcpTrim) - 30;
dudmuck 18:9530d682fd9a 2181 else
dudmuck 18:9530d682fd9a 2182 i = 240;
dudmuck 18:9530d682fd9a 2183 printf("Ocp: %dmA\r\n", i);
dudmuck 18:9530d682fd9a 2184 }
dudmuck 18:9530d682fd9a 2185
dudmuck 18:9530d682fd9a 2186 void cmd_op(uint8_t idx)
dudmuck 18:9530d682fd9a 2187 {
dudmuck 18:9530d682fd9a 2188 int i, dbm;
dudmuck 18:9530d682fd9a 2189 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2190 uint8_t adr;
dudmuck 18:9530d682fd9a 2191 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2192 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2193 else
dudmuck 18:9530d682fd9a 2194 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2195
dudmuck 18:9530d682fd9a 2196 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2197
dudmuck 18:9530d682fd9a 2198 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9' || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 2199 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2200 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2201 /* PABOOST used: +2dbm to +17, or +20 */
dudmuck 18:9530d682fd9a 2202 if (i == 20) {
dudmuck 18:9530d682fd9a 2203 printf("+20dBm PADAC bias\r\n");
dudmuck 18:9530d682fd9a 2204 i -= 3;
dudmuck 18:9530d682fd9a 2205 pds_trim.bits.prog_txdac = 7;
dudmuck 13:c73caaee93a5 2206 }
dudmuck 18:9530d682fd9a 2207 if (i > 1)
dudmuck 18:9530d682fd9a 2208 radio.RegPaConfig.bits.OutputPower = i - 2;
dudmuck 18:9530d682fd9a 2209 } else {
dudmuck 18:9530d682fd9a 2210 /* RFO used: -1 to +14dbm */
dudmuck 18:9530d682fd9a 2211 if (i < 15)
dudmuck 18:9530d682fd9a 2212 radio.RegPaConfig.bits.OutputPower = i + 1;
dudmuck 18:9530d682fd9a 2213 }
dudmuck 18:9530d682fd9a 2214 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2215 }
dudmuck 18:9530d682fd9a 2216 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2217 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2218 printf("PA_BOOST ");
dudmuck 18:9530d682fd9a 2219 dbm = radio.RegPaConfig.bits.OutputPower + pds_trim.bits.prog_txdac - 2;
dudmuck 18:9530d682fd9a 2220 } else {
dudmuck 18:9530d682fd9a 2221 printf("RFO ");
dudmuck 18:9530d682fd9a 2222 dbm = radio.RegPaConfig.bits.OutputPower - 1;
dudmuck 18:9530d682fd9a 2223 }
dudmuck 18:9530d682fd9a 2224 printf("OutputPower:%ddBm\r\n", dbm);
dudmuck 18:9530d682fd9a 2225 }
dudmuck 18:9530d682fd9a 2226
dudmuck 18:9530d682fd9a 2227
dudmuck 18:9530d682fd9a 2228
dudmuck 18:9530d682fd9a 2229 void cmd_fsk_agcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2230 {
dudmuck 18:9530d682fd9a 2231 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2232 fsk.RegRxConfig.bits.AgcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2233 printf("AgcAuto:");
dudmuck 18:9530d682fd9a 2234 if (fsk.RegRxConfig.bits.AgcAutoOn)
dudmuck 18:9530d682fd9a 2235 printf("On\r\n");
dudmuck 18:9530d682fd9a 2236 else
dudmuck 18:9530d682fd9a 2237 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2238 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2239 }
dudmuck 18:9530d682fd9a 2240
dudmuck 18:9530d682fd9a 2241 void cmd_fsk_afcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2242 {
dudmuck 18:9530d682fd9a 2243 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2244 fsk.RegRxConfig.bits.AfcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2245 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2246 printf("AfcAuto:");
dudmuck 18:9530d682fd9a 2247 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 18:9530d682fd9a 2248 printf("On\r\n");
dudmuck 18:9530d682fd9a 2249 else
dudmuck 18:9530d682fd9a 2250 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2251 }
dudmuck 18:9530d682fd9a 2252
dudmuck 18:9530d682fd9a 2253 void cmd_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2254 {
dudmuck 18:9530d682fd9a 2255 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2256 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 2257 lora_printRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 2258 } else {
dudmuck 18:9530d682fd9a 2259 printf("CrcOn:");
dudmuck 18:9530d682fd9a 2260 fsk.RegPktConfig1.bits.CrcOn ^= 1;
dudmuck 18:9530d682fd9a 2261 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2262 if (fsk.RegPktConfig1.bits.CrcOn)
dudmuck 18:9530d682fd9a 2263 printf("On\r\n");
dudmuck 18:9530d682fd9a 2264 else
dudmuck 18:9530d682fd9a 2265 printf("Off\r\n");
dudmuck 18:9530d682fd9a 2266 if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2267 fsk.config_dio0_for_pktmode_rx();
dudmuck 18:9530d682fd9a 2268 }
dudmuck 18:9530d682fd9a 2269 }
dudmuck 18:9530d682fd9a 2270 printf("\r\n");
dudmuck 18:9530d682fd9a 2271 }
dudmuck 18:9530d682fd9a 2272
dudmuck 18:9530d682fd9a 2273 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 2274 void cmd_lora_fixed_payload_symbol(uint8_t idx) // fixed payload, symbol test
dudmuck 18:9530d682fd9a 2275 {
dudmuck 18:9530d682fd9a 2276 int n, i;
dudmuck 18:9530d682fd9a 2277
dudmuck 18:9530d682fd9a 2278 symbol_num = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2279 sscanf(pcbuf+idx+2, "%d", &i);
dudmuck 18:9530d682fd9a 2280 n = i >> 2; // num nibbles
dudmuck 18:9530d682fd9a 2281 printf("%d nibbles: ", n);
dudmuck 18:9530d682fd9a 2282 lora.RegPayloadLength = byte_pad_length;
dudmuck 18:9530d682fd9a 2283 while (n > 0) {
dudmuck 18:9530d682fd9a 2284 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 2285 n -= 2; // one byte = two nibbles
dudmuck 18:9530d682fd9a 2286 }
dudmuck 18:9530d682fd9a 2287 printf("%d bytes\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2288 symbol_sweep_nbits = i >> 2;
dudmuck 18:9530d682fd9a 2289 symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 2290 symbol_sweep_bit_counter_stop = 1 << symbol_sweep_nbits; // one bit per nibble used in symbol (2bits per byte)
dudmuck 18:9530d682fd9a 2291 printf("sweep symbol %d, length bytes:%d nbits:%d stop:0x%x\r\n", symbol_num, lora.RegPayloadLength, symbol_sweep_nbits, symbol_sweep_bit_counter_stop);
dudmuck 18:9530d682fd9a 2292 txticker_state = TXTICKER_STATE_SYMBOL_SWEEP;
dudmuck 18:9530d682fd9a 2293 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2294 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2295 }
dudmuck 18:9530d682fd9a 2296
dudmuck 18:9530d682fd9a 2297 void cmd_fixed_payload_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 2298 {
dudmuck 18:9530d682fd9a 2299 int i;
dudmuck 18:9530d682fd9a 2300 if (pcbuf[idx] >='0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2301 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2302 byte_pad_length = i;
dudmuck 18:9530d682fd9a 2303 }
dudmuck 18:9530d682fd9a 2304 printf("byte_pad_length:%d\r\n", byte_pad_length);
dudmuck 18:9530d682fd9a 2305 }
dudmuck 18:9530d682fd9a 2306
dudmuck 18:9530d682fd9a 2307 void cmd_lora_fixed_payload(uint8_t idx)
dudmuck 18:9530d682fd9a 2308 {
dudmuck 18:9530d682fd9a 2309 int n, a, i, d = 0;
dudmuck 18:9530d682fd9a 2310 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 2311 //printf("scan:\"%s\"\r\n", pcbuf+i);
dudmuck 18:9530d682fd9a 2312 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 2313 //printf("n:%x\r\n", n);
dudmuck 18:9530d682fd9a 2314 radio.tx_buf[d] = n;
dudmuck 18:9530d682fd9a 2315 printf("%02x ", n);
dudmuck 18:9530d682fd9a 2316 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 2317 i++;
dudmuck 18:9530d682fd9a 2318 //printf("%d pcbuf[i]:%x\r\n", i, pcbuf[i]);
dudmuck 18:9530d682fd9a 2319 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 2320 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 2321 break;
dudmuck 18:9530d682fd9a 2322 i = a;
dudmuck 18:9530d682fd9a 2323 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 2324 i++;
dudmuck 18:9530d682fd9a 2325 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 2326 break;
dudmuck 18:9530d682fd9a 2327 }
dudmuck 18:9530d682fd9a 2328 d++;
dudmuck 18:9530d682fd9a 2329 }
dudmuck 18:9530d682fd9a 2330 lora.RegPayloadLength = d;
dudmuck 18:9530d682fd9a 2331 printf("\r\nlora.RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2332 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2333 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2334 }
dudmuck 18:9530d682fd9a 2335
dudmuck 18:9530d682fd9a 2336 void cmd_lora_toggle_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2337 {
dudmuck 18:9530d682fd9a 2338 /* test lora crc on/off */
dudmuck 18:9530d682fd9a 2339 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2340 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2341 txticker_state = TXTICKER_STATE_TOG_CRC_ON;
dudmuck 18:9530d682fd9a 2342 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2343 }
dudmuck 18:9530d682fd9a 2344
dudmuck 18:9530d682fd9a 2345 void lora_cycle_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 2346 {
dudmuck 18:9530d682fd9a 2347 int i;
dudmuck 18:9530d682fd9a 2348 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2349 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2350 payload_length_stop = i;
dudmuck 18:9530d682fd9a 2351 }
dudmuck 18:9530d682fd9a 2352 txticker_state = TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 2353 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2354 }
dudmuck 18:9530d682fd9a 2355
dudmuck 18:9530d682fd9a 2356 void cmd_lora_data_ramp(uint8_t idx)
dudmuck 18:9530d682fd9a 2357 {
dudmuck 18:9530d682fd9a 2358 // lora payload data ramping
dudmuck 18:9530d682fd9a 2359 lora.RegPayloadLength = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2360 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2361 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA_START;
dudmuck 18:9530d682fd9a 2362 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2363 }
dudmuck 18:9530d682fd9a 2364
dudmuck 18:9530d682fd9a 2365 void cmd_lora_sync_lo_nibble(uint8_t idx)
dudmuck 18:9530d682fd9a 2366 {
dudmuck 18:9530d682fd9a 2367 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 2368 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 2369 on_txdone_delay = 0.100;
dudmuck 18:9530d682fd9a 2370 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 2371 //sync_sweep_timeout.attach(&txdone_timeout_cb, sync_sweep_delay);
dudmuck 18:9530d682fd9a 2372 }
dudmuck 18:9530d682fd9a 2373
dudmuck 18:9530d682fd9a 2374 void cmd_lora_toggle_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 2375 {
dudmuck 18:9530d682fd9a 2376 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2377 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2378 txticker_state = TXTICKER_STATE_TOG_HEADER_MODE;
dudmuck 18:9530d682fd9a 2379 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2380 }
dudmuck 18:9530d682fd9a 2381
dudmuck 18:9530d682fd9a 2382 void cmd_lora_sync_sweep(uint8_t idx)
dudmuck 18:9530d682fd9a 2383 {
dudmuck 18:9530d682fd9a 2384 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2385 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2386 txticker_sync_byte = 0x12;
dudmuck 18:9530d682fd9a 2387 if (pcbuf[idx] == '1')
dudmuck 18:9530d682fd9a 2388 txticker_state = TXTICKER_STATE_CYCLE_SYNC_1;
dudmuck 18:9530d682fd9a 2389 else if (pcbuf[idx] == '2')
dudmuck 18:9530d682fd9a 2390 txticker_state = TXTICKER_STATE_CYCLE_SYNC_2;
dudmuck 18:9530d682fd9a 2391 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2392 }
dudmuck 18:9530d682fd9a 2393
dudmuck 18:9530d682fd9a 2394 void cmd_lora_all_payload_lengths(uint8_t idx)
dudmuck 18:9530d682fd9a 2395 {
dudmuck 18:9530d682fd9a 2396 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 2397 on_txdone_state = ON_TXDONE_STATE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 2398 on_txdone_delay = 0.200;
dudmuck 18:9530d682fd9a 2399 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 2400 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 2401 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2402 }
dudmuck 18:9530d682fd9a 2403
dudmuck 18:9530d682fd9a 2404 void cmd_lora_toggle_all_bits(uint8_t idx)
dudmuck 18:9530d682fd9a 2405 {
dudmuck 18:9530d682fd9a 2406 lora.RegPayloadLength = (pcbuf[idx] - '0') + byte_pad_length;
dudmuck 18:9530d682fd9a 2407 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2408 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS_START;
dudmuck 18:9530d682fd9a 2409 printf("tab byte length:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2410
dudmuck 18:9530d682fd9a 2411 if (lora.RegPayloadLength > 0)
dudmuck 18:9530d682fd9a 2412 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2413 }
dudmuck 18:9530d682fd9a 2414
dudmuck 18:9530d682fd9a 2415 void cmd_lora_cycle_codingrates(uint8_t idx)
dudmuck 18:9530d682fd9a 2416 {
dudmuck 18:9530d682fd9a 2417 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 2418 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2419 txticker_state = TXTICKER_STATE_CYCLE_CODING_RATE;
dudmuck 18:9530d682fd9a 2420 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2421 }
dudmuck 18:9530d682fd9a 2422 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 2423
dudmuck 18:9530d682fd9a 2424 void cmd_codingRate(uint8_t idx)
dudmuck 18:9530d682fd9a 2425 {
dudmuck 18:9530d682fd9a 2426 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9')
dudmuck 18:9530d682fd9a 2427 lora.setCodingRate(pcbuf[idx] - '0');
dudmuck 18:9530d682fd9a 2428 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2429 lora_printCodingRate(false); // false: transmitted
dudmuck 18:9530d682fd9a 2430 printf("\r\n");
dudmuck 18:9530d682fd9a 2431 }
dudmuck 18:9530d682fd9a 2432
dudmuck 18:9530d682fd9a 2433 void cmd_lora_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 2434 {
dudmuck 18:9530d682fd9a 2435 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 2436 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2437 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 2438 printf("\r\n");
dudmuck 18:9530d682fd9a 2439 }
dudmuck 18:9530d682fd9a 2440
dudmuck 18:9530d682fd9a 2441 void cmd_fsk_AfcAutoClearOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2442 {
dudmuck 18:9530d682fd9a 2443 fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1;
dudmuck 18:9530d682fd9a 2444 printf("AfcAutoClearOn: ");
dudmuck 18:9530d682fd9a 2445 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 2446 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 18:9530d682fd9a 2447 printf("ON\r\n");
dudmuck 18:9530d682fd9a 2448 else
dudmuck 18:9530d682fd9a 2449 printf("off\r\n");
dudmuck 18:9530d682fd9a 2450 }
dudmuck 18:9530d682fd9a 2451
dudmuck 18:9530d682fd9a 2452 void cmd_fsk_AutoRestartRxMode(uint8_t idx)
dudmuck 18:9530d682fd9a 2453 {
dudmuck 18:9530d682fd9a 2454 fsk.RegSyncConfig.bits.AutoRestartRxMode++;
dudmuck 18:9530d682fd9a 2455 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2456 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2457 printf("AutoRestartRxMode:");
dudmuck 18:9530d682fd9a 2458 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 18:9530d682fd9a 2459 case 0: printf("off "); break;
dudmuck 18:9530d682fd9a 2460 case 1: printf("no-pll-wait "); break;
dudmuck 18:9530d682fd9a 2461 case 2: printf("pll-wait "); break;
dudmuck 18:9530d682fd9a 2462 case 3: printf("3 "); break;
dudmuck 18:9530d682fd9a 2463 }
dudmuck 18:9530d682fd9a 2464 printf("\r\n");
dudmuck 18:9530d682fd9a 2465 }
dudmuck 18:9530d682fd9a 2466
dudmuck 18:9530d682fd9a 2467 void cmd_AfcClear(uint8_t idx)
dudmuck 18:9530d682fd9a 2468 {
dudmuck 18:9530d682fd9a 2469 printf("clear afc: ");
dudmuck 18:9530d682fd9a 2470 fsk.RegAfcFei.bits.AfcClear = 1;
dudmuck 18:9530d682fd9a 2471 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 2472 fsk.RegAfcFei.bits.AfcClear = 0;
dudmuck 18:9530d682fd9a 2473 printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 18:9530d682fd9a 2474 }
dudmuck 18:9530d682fd9a 2475
dudmuck 18:9530d682fd9a 2476 void cmd_fsk_bitrate(uint8_t idx)
dudmuck 18:9530d682fd9a 2477 {
dudmuck 18:9530d682fd9a 2478 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2479 float kbits;
dudmuck 18:9530d682fd9a 2480 sscanf(&pcbuf[idx], "%f", &kbits);
dudmuck 18:9530d682fd9a 2481 fsk.set_bitrate((int)(kbits*1000));
dudmuck 18:9530d682fd9a 2482 }
dudmuck 18:9530d682fd9a 2483 printf("%fkbps\r\n", fsk.get_bitrate()/(float)1000.0);
dudmuck 18:9530d682fd9a 2484 }
dudmuck 18:9530d682fd9a 2485
dudmuck 18:9530d682fd9a 2486 void cmd_bandwidth(uint8_t idx)
dudmuck 18:9530d682fd9a 2487 {
dudmuck 18:9530d682fd9a 2488 int i;
dudmuck 18:9530d682fd9a 2489 float f;
dudmuck 18:9530d682fd9a 2490 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2491 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2492 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2493 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2494 lora.setBw_KHz(i);
dudmuck 18:9530d682fd9a 2495 } else
dudmuck 18:9530d682fd9a 2496 lora_printAllBw();
dudmuck 18:9530d682fd9a 2497 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2498 printf("current ");
dudmuck 18:9530d682fd9a 2499 lora_printBw();
dudmuck 18:9530d682fd9a 2500 printf("\r\n");
dudmuck 18:9530d682fd9a 2501 } else { // FSK:
dudmuck 18:9530d682fd9a 2502 if (pcbuf[idx] == 'a') {
dudmuck 18:9530d682fd9a 2503 idx++;
dudmuck 18:9530d682fd9a 2504 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2505 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2506 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 2507 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 1);
dudmuck 18:9530d682fd9a 2508 }
dudmuck 18:9530d682fd9a 2509 printf("afcbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)/1000.0);
dudmuck 18:9530d682fd9a 2510 } else {
dudmuck 18:9530d682fd9a 2511 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2512 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2513 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 2514 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 0);
dudmuck 18:9530d682fd9a 2515 }
dudmuck 18:9530d682fd9a 2516 printf("rxbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)/1000.0);
dudmuck 18:9530d682fd9a 2517 }
dudmuck 18:9530d682fd9a 2518 }
dudmuck 18:9530d682fd9a 2519 }
dudmuck 18:9530d682fd9a 2520
dudmuck 18:9530d682fd9a 2521 void cmd_lora_poll_validHeader(uint8_t idx)
dudmuck 18:9530d682fd9a 2522 {
dudmuck 18:9530d682fd9a 2523 lora.poll_vh ^= 1;
dudmuck 18:9530d682fd9a 2524 printf("poll_vh:%d\r\n", lora.poll_vh);
dudmuck 18:9530d682fd9a 2525 }
dudmuck 18:9530d682fd9a 2526
dudmuck 18:9530d682fd9a 2527 void cmd_fsk_syncword(uint8_t idx)
dudmuck 18:9530d682fd9a 2528 {
dudmuck 18:9530d682fd9a 2529 int i, d = 0;
dudmuck 18:9530d682fd9a 2530 uint8_t reg_addr = REG_FSK_SYNCVALUE1;
dudmuck 18:9530d682fd9a 2531
dudmuck 18:9530d682fd9a 2532 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2533
dudmuck 18:9530d682fd9a 2534 if (pcbuf_len != idx) { // something to write?
dudmuck 18:9530d682fd9a 2535 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 2536 int a, n;
dudmuck 18:9530d682fd9a 2537 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 2538 radio.write_reg(reg_addr++, n);
dudmuck 18:9530d682fd9a 2539 //printf("%02x ", n);
dudmuck 18:9530d682fd9a 2540 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 2541 i++;
dudmuck 18:9530d682fd9a 2542 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 2543 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 2544 break;
dudmuck 18:9530d682fd9a 2545 i = a;
dudmuck 18:9530d682fd9a 2546 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 2547 i++;
dudmuck 18:9530d682fd9a 2548 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 2549 break;
dudmuck 18:9530d682fd9a 2550 }
dudmuck 18:9530d682fd9a 2551 d++;
dudmuck 18:9530d682fd9a 2552 }
dudmuck 18:9530d682fd9a 2553
dudmuck 18:9530d682fd9a 2554 fsk.RegSyncConfig.bits.SyncSize = reg_addr - REG_FSK_SYNCVALUE1 - 1;
dudmuck 18:9530d682fd9a 2555 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2556 }
dudmuck 18:9530d682fd9a 2557
dudmuck 18:9530d682fd9a 2558 printf("%d: ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 2559 for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++)
dudmuck 18:9530d682fd9a 2560 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i));
dudmuck 18:9530d682fd9a 2561 printf("\r\n");
dudmuck 18:9530d682fd9a 2562 }
dudmuck 18:9530d682fd9a 2563
dudmuck 18:9530d682fd9a 2564 void cmd_fsk_syncOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2565 {
dudmuck 18:9530d682fd9a 2566 fsk.RegSyncConfig.bits.SyncOn ^= 1;
dudmuck 18:9530d682fd9a 2567 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2568 printf("SyncOn:%d\r\n", fsk.RegSyncConfig.bits.SyncOn);
dudmuck 18:9530d682fd9a 2569 }
dudmuck 18:9530d682fd9a 2570
dudmuck 18:9530d682fd9a 2571 void cmd_fsk_bitsync(uint8_t idx)
dudmuck 18:9530d682fd9a 2572 {
dudmuck 18:9530d682fd9a 2573 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 2574 fsk.RegOokPeak.bits.BitSyncOn ^= 1;
dudmuck 18:9530d682fd9a 2575 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 2576 if (fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 18:9530d682fd9a 2577 printf("BitSyncOn\r\n");
dudmuck 18:9530d682fd9a 2578 else
dudmuck 18:9530d682fd9a 2579 printf("BitSync Off\r\n");
dudmuck 18:9530d682fd9a 2580 }
dudmuck 18:9530d682fd9a 2581
dudmuck 18:9530d682fd9a 2582 void cmd_lora_sf(uint8_t idx)
dudmuck 18:9530d682fd9a 2583 {
dudmuck 18:9530d682fd9a 2584 int i;
dudmuck 18:9530d682fd9a 2585 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2586 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2587 lora.setSf(i);
dudmuck 18:9530d682fd9a 2588 if (i == 6 && !lora.getHeaderMode()) {
dudmuck 18:9530d682fd9a 2589 printf("SF6: to implicit header mode\r\n");
dudmuck 18:9530d682fd9a 2590 lora.setHeaderMode(true);
dudmuck 18:9530d682fd9a 2591 }
dudmuck 18:9530d682fd9a 2592 }
dudmuck 18:9530d682fd9a 2593 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2594 lora_printSf();
dudmuck 18:9530d682fd9a 2595 printf("\r\n");
dudmuck 18:9530d682fd9a 2596 }
dudmuck 18:9530d682fd9a 2597
dudmuck 18:9530d682fd9a 2598 void cmd_fsk_TxStartCondition(uint8_t idx)
dudmuck 18:9530d682fd9a 2599 {
dudmuck 18:9530d682fd9a 2600 fsk.RegFifoThreshold.bits.TxStartCondition ^= 1;
dudmuck 18:9530d682fd9a 2601 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 2602 printf("TxStartCondition:");
dudmuck 18:9530d682fd9a 2603 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 18:9530d682fd9a 2604 printf("!FifoEmpty\r\n");
dudmuck 18:9530d682fd9a 2605 else
dudmuck 18:9530d682fd9a 2606 printf("FifoLevel\r\n");
dudmuck 18:9530d682fd9a 2607 }
dudmuck 18:9530d682fd9a 2608
dudmuck 18:9530d682fd9a 2609 void cmd_fsk_read_fei(uint8_t idx)
dudmuck 18:9530d682fd9a 2610 {
dudmuck 18:9530d682fd9a 2611 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 18:9530d682fd9a 2612 }
dudmuck 18:9530d682fd9a 2613
dudmuck 18:9530d682fd9a 2614 void cmd_fsk_fdev(uint8_t idx)
dudmuck 18:9530d682fd9a 2615 {
dudmuck 18:9530d682fd9a 2616 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2617 float khz;
dudmuck 18:9530d682fd9a 2618 sscanf(pcbuf+idx, "%f", &khz);
dudmuck 18:9530d682fd9a 2619 fsk.set_tx_fdev_hz((int)(khz*1000));
dudmuck 18:9530d682fd9a 2620 }
dudmuck 18:9530d682fd9a 2621 printf("fdev:%fKHz\r\n", fsk.get_tx_fdev_hz()/(float)1000.0);
dudmuck 18:9530d682fd9a 2622 }
dudmuck 18:9530d682fd9a 2623
dudmuck 18:9530d682fd9a 2624 void cmd_frf(uint8_t idx)
dudmuck 18:9530d682fd9a 2625 {
dudmuck 18:9530d682fd9a 2626 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2627 float MHz;
dudmuck 18:9530d682fd9a 2628 sscanf(pcbuf+idx, "%f", &MHz);
dudmuck 18:9530d682fd9a 2629 //printf("MHz:%f\r\n", MHz);
dudmuck 18:9530d682fd9a 2630 radio.set_frf_MHz(MHz);
dudmuck 18:9530d682fd9a 2631 }
dudmuck 18:9530d682fd9a 2632 printf("%fMHz\r\n", radio.get_frf_MHz());
dudmuck 18:9530d682fd9a 2633 #ifndef TARGET_MTS_MDOT_F411RE
dudmuck 18:9530d682fd9a 2634 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2635 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 18:9530d682fd9a 2636 // LAS HF=PA_BOOST LF=RFO
dudmuck 18:9530d682fd9a 2637 if (radio.HF)
dudmuck 18:9530d682fd9a 2638 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 18:9530d682fd9a 2639 else
dudmuck 18:9530d682fd9a 2640 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 18:9530d682fd9a 2641 }
dudmuck 18:9530d682fd9a 2642 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2643 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 2644 }
dudmuck 18:9530d682fd9a 2645
dudmuck 18:9530d682fd9a 2646 void cmd_fsk_PacketFormat(uint8_t idx)
dudmuck 18:9530d682fd9a 2647 {
dudmuck 18:9530d682fd9a 2648 printf("PacketFormat:");
dudmuck 18:9530d682fd9a 2649 fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1;
dudmuck 18:9530d682fd9a 2650 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2651 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 18:9530d682fd9a 2652 printf("variable\r\n");
dudmuck 18:9530d682fd9a 2653 else
dudmuck 18:9530d682fd9a 2654 printf("fixed\r\n");
dudmuck 18:9530d682fd9a 2655 }
dudmuck 18:9530d682fd9a 2656
dudmuck 18:9530d682fd9a 2657 void cmd_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 2658 {
dudmuck 18:9530d682fd9a 2659 int i;
dudmuck 18:9530d682fd9a 2660 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2661 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2662 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2663 lora.RegPayloadLength = i;
dudmuck 13:c73caaee93a5 2664 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2665 } else {
dudmuck 18:9530d682fd9a 2666 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2667 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 10:d9bb2ce57f05 2668 }
dudmuck 18:9530d682fd9a 2669 }
dudmuck 18:9530d682fd9a 2670 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2671 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 18:9530d682fd9a 2672 printf("PayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2673 } else {
dudmuck 18:9530d682fd9a 2674 printf("PayloadLength:%d\r\n", fsk_get_PayloadLength());
dudmuck 18:9530d682fd9a 2675 }
dudmuck 18:9530d682fd9a 2676 }
dudmuck 18:9530d682fd9a 2677
dudmuck 18:9530d682fd9a 2678 void cmd_paRamp(uint8_t idx)
dudmuck 18:9530d682fd9a 2679 {
dudmuck 18:9530d682fd9a 2680 int i;
dudmuck 18:9530d682fd9a 2681 uint8_t reg_par = radio.read_reg(REG_PARAMP);
dudmuck 18:9530d682fd9a 2682 uint8_t PaRamp = reg_par & 0x0f;
dudmuck 18:9530d682fd9a 2683 reg_par &= 0xf0;
dudmuck 18:9530d682fd9a 2684 if (PaRamp == 15)
dudmuck 18:9530d682fd9a 2685 PaRamp = 0;
dudmuck 18:9530d682fd9a 2686 else
dudmuck 18:9530d682fd9a 2687 PaRamp++;
dudmuck 18:9530d682fd9a 2688 radio.write_reg(REG_PARAMP, reg_par | PaRamp);
dudmuck 18:9530d682fd9a 2689 printf("PaRamp:");
dudmuck 18:9530d682fd9a 2690 switch (PaRamp) {
dudmuck 18:9530d682fd9a 2691 case 0: i = 3400; break;
dudmuck 18:9530d682fd9a 2692 case 1: i = 2000; break;
dudmuck 18:9530d682fd9a 2693 case 2: i = 1000; break;
dudmuck 18:9530d682fd9a 2694 case 3: i = 500; break;
dudmuck 18:9530d682fd9a 2695 case 4: i = 250; break;
dudmuck 18:9530d682fd9a 2696 case 5: i = 125; break;
dudmuck 18:9530d682fd9a 2697 case 6: i = 100; break;
dudmuck 18:9530d682fd9a 2698 case 7: i = 62; break;
dudmuck 18:9530d682fd9a 2699 case 8: i = 50; break;
dudmuck 18:9530d682fd9a 2700 case 9: i = 40; break;
dudmuck 18:9530d682fd9a 2701 case 10: i = 31; break;
dudmuck 18:9530d682fd9a 2702 case 11: i = 25; break;
dudmuck 18:9530d682fd9a 2703 case 12: i = 20; break;
dudmuck 18:9530d682fd9a 2704 case 13: i = 15; break;
dudmuck 18:9530d682fd9a 2705 case 14: i = 12; break;
dudmuck 18:9530d682fd9a 2706 case 15: i = 10; break;
dudmuck 18:9530d682fd9a 2707 }
dudmuck 18:9530d682fd9a 2708 printf("%dus\r\n", i);
dudmuck 18:9530d682fd9a 2709 }
dudmuck 18:9530d682fd9a 2710
dudmuck 18:9530d682fd9a 2711 void cmd_paSelect(uint8_t idx)
dudmuck 18:9530d682fd9a 2712 {
dudmuck 18:9530d682fd9a 2713 radio.RegPaConfig.bits.PaSelect ^= 1;
dudmuck 18:9530d682fd9a 2714 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2715 printPa();
dudmuck 18:9530d682fd9a 2716 printf("\r\n");
dudmuck 18:9530d682fd9a 2717 }
dudmuck 18:9530d682fd9a 2718
dudmuck 18:9530d682fd9a 2719 void cmd_poll_irq_en(uint8_t idx)
dudmuck 18:9530d682fd9a 2720 {
dudmuck 18:9530d682fd9a 2721 poll_irq_en ^= 1;
dudmuck 18:9530d682fd9a 2722 printf("poll_irq_en:");
dudmuck 18:9530d682fd9a 2723 if (poll_irq_en)
dudmuck 18:9530d682fd9a 2724 printf("irqFlags register\r\n");
dudmuck 18:9530d682fd9a 2725 else
dudmuck 18:9530d682fd9a 2726 printf("DIO pin interrupt\r\n");
dudmuck 18:9530d682fd9a 2727 }
dudmuck 18:9530d682fd9a 2728
dudmuck 18:9530d682fd9a 2729 void cmd_per_id(uint8_t idx)
dudmuck 18:9530d682fd9a 2730 {
dudmuck 18:9530d682fd9a 2731 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2732 sscanf(pcbuf+idx, "%d", &per_id);
dudmuck 18:9530d682fd9a 2733 }
dudmuck 18:9530d682fd9a 2734 printf("PER device ID:%d\r\n", per_id);
dudmuck 18:9530d682fd9a 2735 }
dudmuck 18:9530d682fd9a 2736
dudmuck 18:9530d682fd9a 2737 void cmd_pertx(uint8_t idx)
dudmuck 18:9530d682fd9a 2738 {
dudmuck 18:9530d682fd9a 2739 int i;
dudmuck 18:9530d682fd9a 2740
dudmuck 18:9530d682fd9a 2741 if (cadper_enable)
dudmuck 18:9530d682fd9a 2742 cadper_enable = false;
dudmuck 18:9530d682fd9a 2743
dudmuck 18:9530d682fd9a 2744 set_per_en(true);
dudmuck 18:9530d682fd9a 2745 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2746 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2747 PacketTxCntEnd = i;
dudmuck 18:9530d682fd9a 2748 }
dudmuck 18:9530d682fd9a 2749 PacketTxCnt = 0;
dudmuck 18:9530d682fd9a 2750 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 18:9530d682fd9a 2751 }
dudmuck 18:9530d682fd9a 2752
dudmuck 18:9530d682fd9a 2753 void cmd_perrx(uint8_t idx)
dudmuck 18:9530d682fd9a 2754 {
dudmuck 18:9530d682fd9a 2755 set_per_en(true);
dudmuck 18:9530d682fd9a 2756
dudmuck 18:9530d682fd9a 2757 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 2758 PacketRxSequencePrev = -1;
dudmuck 18:9530d682fd9a 2759 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 2760 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 2761 //dio3.rise(&dio3_cb);
dudmuck 18:9530d682fd9a 2762
dudmuck 18:9530d682fd9a 2763 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2764 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 13:c73caaee93a5 2765 else {
dudmuck 18:9530d682fd9a 2766 fsk.start_rx();
dudmuck 18:9530d682fd9a 2767 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2768 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2769 if (radio.HF) {
dudmuck 18:9530d682fd9a 2770 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2771 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2772 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2773 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2774 }
dudmuck 18:9530d682fd9a 2775 }
dudmuck 18:9530d682fd9a 2776 }
dudmuck 18:9530d682fd9a 2777
dudmuck 18:9530d682fd9a 2778 void cmd_fsk_PreambleDetectorOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2779 {
dudmuck 18:9530d682fd9a 2780 fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1;
dudmuck 18:9530d682fd9a 2781 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2782 printf("PreambleDetector:");
dudmuck 18:9530d682fd9a 2783 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn)
dudmuck 18:9530d682fd9a 2784 printf("On\r\n");
dudmuck 18:9530d682fd9a 2785 else
dudmuck 18:9530d682fd9a 2786 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2787 }
dudmuck 18:9530d682fd9a 2788
dudmuck 18:9530d682fd9a 2789 void cmd_fsk_PreambleDetectorSize(uint8_t idx)
dudmuck 18:9530d682fd9a 2790 {
dudmuck 18:9530d682fd9a 2791 int i;
dudmuck 18:9530d682fd9a 2792 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2793 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2794 fsk.RegPreambleDetect.bits.PreambleDetectorSize = i;
dudmuck 18:9530d682fd9a 2795 }
dudmuck 18:9530d682fd9a 2796 printf("PreambleDetectorSize:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorSize);
dudmuck 18:9530d682fd9a 2797 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2798 }
dudmuck 18:9530d682fd9a 2799
dudmuck 18:9530d682fd9a 2800 void cmd_fsk_PreambleDetectorTol(uint8_t idx)
dudmuck 18:9530d682fd9a 2801 {
dudmuck 18:9530d682fd9a 2802 int i;
dudmuck 18:9530d682fd9a 2803 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2804 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2805 fsk.RegPreambleDetect.bits.PreambleDetectorTol = i;
dudmuck 18:9530d682fd9a 2806 }
dudmuck 18:9530d682fd9a 2807 printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 18:9530d682fd9a 2808 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2809 }
dudmuck 18:9530d682fd9a 2810
dudmuck 18:9530d682fd9a 2811 void cmd_PreambleSize(uint8_t idx)
dudmuck 18:9530d682fd9a 2812 {
dudmuck 18:9530d682fd9a 2813 int i;
dudmuck 18:9530d682fd9a 2814 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2815 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2816 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2817 radio.write_u16(REG_LR_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 2818 }
dudmuck 18:9530d682fd9a 2819 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 18:9530d682fd9a 2820 printf("lora PreambleLength:%d\r\n", lora.RegPreamble);
dudmuck 18:9530d682fd9a 2821 } else {
dudmuck 18:9530d682fd9a 2822 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2823 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2824 radio.write_u16(REG_FSK_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 2825 }
dudmuck 18:9530d682fd9a 2826 printf("PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 2827 }
dudmuck 18:9530d682fd9a 2828 }
dudmuck 18:9530d682fd9a 2829
dudmuck 18:9530d682fd9a 2830 void cmd_fsk_PreamblePolarity(uint8_t idx)
dudmuck 18:9530d682fd9a 2831 {
dudmuck 18:9530d682fd9a 2832 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2833 fsk.RegSyncConfig.bits.PreamblePolarity ^= 1;
dudmuck 18:9530d682fd9a 2834 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2835 if (fsk.RegSyncConfig.bits.PreamblePolarity)
dudmuck 18:9530d682fd9a 2836 printf("0x55\r\n");
dudmuck 18:9530d682fd9a 2837 else
dudmuck 18:9530d682fd9a 2838 printf("0xaa\r\n");
dudmuck 18:9530d682fd9a 2839 }
dudmuck 18:9530d682fd9a 2840
dudmuck 18:9530d682fd9a 2841 void cmd_pllbw(uint8_t idx)
dudmuck 18:9530d682fd9a 2842 {
dudmuck 18:9530d682fd9a 2843 RegPll_t pll;
dudmuck 18:9530d682fd9a 2844 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 2845 // 0x5c and 0x5e registers
dudmuck 18:9530d682fd9a 2846 pll.octet = radio.read_reg(REG_PLL_SX1272);
dudmuck 18:9530d682fd9a 2847 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2848 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2849 else
dudmuck 18:9530d682fd9a 2850 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2851 radio.write_reg(REG_PLL_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 2852 pll.octet = radio.read_reg(REG_PLL_LOWPN_SX1272);
dudmuck 18:9530d682fd9a 2853 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2854 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2855 else
dudmuck 18:9530d682fd9a 2856 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2857 radio.write_reg(REG_PLL_LOWPN_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 2858 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 2859 // 0x70 register
dudmuck 18:9530d682fd9a 2860 pll.octet = radio.read_reg(REG_PLL_SX1276);
dudmuck 18:9530d682fd9a 2861 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 2862 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 2863 else
dudmuck 18:9530d682fd9a 2864 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 2865 radio.write_reg(REG_PLL_SX1276, pll.octet);
dudmuck 18:9530d682fd9a 2866 }
dudmuck 18:9530d682fd9a 2867 switch (pll.bits.PllBandwidth) {
dudmuck 18:9530d682fd9a 2868 case 0: printf("75"); break;
dudmuck 18:9530d682fd9a 2869 case 1: printf("150"); break;
dudmuck 18:9530d682fd9a 2870 case 2: printf("225"); break;
dudmuck 18:9530d682fd9a 2871 case 3: printf("300"); break;
dudmuck 18:9530d682fd9a 2872 }
dudmuck 18:9530d682fd9a 2873 printf("KHz\r\n");
dudmuck 18:9530d682fd9a 2874 }
dudmuck 18:9530d682fd9a 2875
dudmuck 18:9530d682fd9a 2876 void cmd_lna_boost(uint8_t idx)
dudmuck 18:9530d682fd9a 2877 {
dudmuck 18:9530d682fd9a 2878 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 18:9530d682fd9a 2879 if (radio.RegLna.bits.LnaBoostHF == 3)
dudmuck 18:9530d682fd9a 2880 radio.RegLna.bits.LnaBoostHF = 0;
dudmuck 18:9530d682fd9a 2881 else
dudmuck 18:9530d682fd9a 2882 radio.RegLna.bits.LnaBoostHF++;
dudmuck 18:9530d682fd9a 2883 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 18:9530d682fd9a 2884 printf("LNA-boost:%d\r\n", radio.RegLna.bits.LnaBoostHF);
dudmuck 18:9530d682fd9a 2885 }
dudmuck 18:9530d682fd9a 2886
dudmuck 18:9530d682fd9a 2887 void cmd_LowDataRateOptimize(uint8_t idx)
dudmuck 18:9530d682fd9a 2888 {
dudmuck 18:9530d682fd9a 2889 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 2890 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 2891 lora.RegModemConfig.sx1272bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 2892 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 2893 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 2894 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 2895 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 18:9530d682fd9a 2896 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 2897 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 2898 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 2899 }
dudmuck 18:9530d682fd9a 2900 }
dudmuck 18:9530d682fd9a 2901
dudmuck 18:9530d682fd9a 2902 void cmd_fsk_FifoThreshold(uint8_t idx)
dudmuck 18:9530d682fd9a 2903 {
dudmuck 18:9530d682fd9a 2904 int i;
dudmuck 18:9530d682fd9a 2905 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 2906 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2907 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2908 fsk.RegFifoThreshold.bits.FifoThreshold = i;
dudmuck 18:9530d682fd9a 2909 }
dudmuck 18:9530d682fd9a 2910 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 2911 printf("FifoThreshold:%d\r\n", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 18:9530d682fd9a 2912 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 2913 }
dudmuck 18:9530d682fd9a 2914
dudmuck 18:9530d682fd9a 2915 void cmd_tx_ticker_rate(uint8_t idx)
dudmuck 18:9530d682fd9a 2916 {
dudmuck 18:9530d682fd9a 2917 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 2918 sscanf(pcbuf+idx, "%f", &tx_ticker_rate);
dudmuck 18:9530d682fd9a 2919 }
dudmuck 18:9530d682fd9a 2920 printf("tx_ticker_rate:%f\r\n", tx_ticker_rate);
dudmuck 18:9530d682fd9a 2921 }
dudmuck 18:9530d682fd9a 2922
dudmuck 18:9530d682fd9a 2923 void cmd_lora_tx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 2924 {
dudmuck 18:9530d682fd9a 2925 lora.invert_tx(lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 2926 printf("chirp_invert_tx :%d\r\n", lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 2927 }
dudmuck 18:9530d682fd9a 2928
dudmuck 18:9530d682fd9a 2929 void cmd_lora_rx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 2930 {
dudmuck 18:9530d682fd9a 2931 lora.invert_rx(!lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 2932 printf("rx invert_i_q:%d\r\n", lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 2933 }
dudmuck 18:9530d682fd9a 2934
dudmuck 18:9530d682fd9a 2935 void cmd_fsk_dcfree(uint8_t idx)
dudmuck 18:9530d682fd9a 2936 {
dudmuck 18:9530d682fd9a 2937 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 18:9530d682fd9a 2938 if (fsk.RegPktConfig1.bits.DcFree == 3)
dudmuck 18:9530d682fd9a 2939 fsk.RegPktConfig1.bits.DcFree = 0;
dudmuck 18:9530d682fd9a 2940 else
dudmuck 18:9530d682fd9a 2941 fsk.RegPktConfig1.bits.DcFree++;
dudmuck 18:9530d682fd9a 2942 printf(" dcFree:");
dudmuck 18:9530d682fd9a 2943 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 18:9530d682fd9a 2944 case 0: printf("none "); break;
dudmuck 18:9530d682fd9a 2945 case 1: printf("Manchester "); break;
dudmuck 18:9530d682fd9a 2946 case 2: printf("Whitening "); break;
dudmuck 18:9530d682fd9a 2947 case 3: printf("reserved "); break;
dudmuck 18:9530d682fd9a 2948 }
dudmuck 18:9530d682fd9a 2949 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2950 printf("\r\n");
dudmuck 18:9530d682fd9a 2951 }
dudmuck 18:9530d682fd9a 2952
dudmuck 18:9530d682fd9a 2953 void cmd_fsk_DataMode(uint8_t idx)
dudmuck 18:9530d682fd9a 2954 {
dudmuck 18:9530d682fd9a 2955 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 18:9530d682fd9a 2956 fsk.RegPktConfig2.bits.DataModePacket ^= 1;
dudmuck 18:9530d682fd9a 2957 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 2958 printf("datamode:");
dudmuck 18:9530d682fd9a 2959 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 18:9530d682fd9a 2960 printf("packet\r\n");
dudmuck 18:9530d682fd9a 2961 else
dudmuck 18:9530d682fd9a 2962 printf("continuous\r\n");
dudmuck 18:9530d682fd9a 2963 }
dudmuck 18:9530d682fd9a 2964
dudmuck 18:9530d682fd9a 2965 void cmd_show_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 2966 {
dudmuck 18:9530d682fd9a 2967 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2968 lora_print_dio();
dudmuck 18:9530d682fd9a 2969 else
dudmuck 18:9530d682fd9a 2970 fsk_print_dio();
dudmuck 18:9530d682fd9a 2971 }
dudmuck 18:9530d682fd9a 2972
dudmuck 18:9530d682fd9a 2973 void cmd_set_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 2974 {
dudmuck 18:9530d682fd9a 2975 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 2976 case '0':
dudmuck 18:9530d682fd9a 2977 radio.RegDioMapping1.bits.Dio0Mapping++;
dudmuck 18:9530d682fd9a 2978 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2979 break;
dudmuck 18:9530d682fd9a 2980 case '1':
dudmuck 18:9530d682fd9a 2981 radio.RegDioMapping1.bits.Dio1Mapping++;
dudmuck 18:9530d682fd9a 2982 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2983 break;
dudmuck 18:9530d682fd9a 2984 case '2':
dudmuck 18:9530d682fd9a 2985 radio.RegDioMapping1.bits.Dio2Mapping++;
dudmuck 18:9530d682fd9a 2986 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2987 break;
dudmuck 18:9530d682fd9a 2988 case '3':
dudmuck 18:9530d682fd9a 2989 radio.RegDioMapping1.bits.Dio3Mapping++;
dudmuck 18:9530d682fd9a 2990 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2991 break;
dudmuck 18:9530d682fd9a 2992 case '4':
dudmuck 18:9530d682fd9a 2993 radio.RegDioMapping2.bits.Dio4Mapping++;
dudmuck 18:9530d682fd9a 2994 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2995 break;
dudmuck 18:9530d682fd9a 2996 case '5':
dudmuck 18:9530d682fd9a 2997 radio.RegDioMapping2.bits.Dio5Mapping++;
dudmuck 18:9530d682fd9a 2998 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2999 break;
dudmuck 18:9530d682fd9a 3000 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 3001 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3002 lora_print_dio();
dudmuck 18:9530d682fd9a 3003 else
dudmuck 18:9530d682fd9a 3004 fsk_print_dio();
dudmuck 18:9530d682fd9a 3005 }
dudmuck 18:9530d682fd9a 3006
dudmuck 18:9530d682fd9a 3007 void cmd_mode_standby(uint8_t idx)
dudmuck 18:9530d682fd9a 3008 {
dudmuck 18:9530d682fd9a 3009 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3010 printf("standby\r\n");
dudmuck 18:9530d682fd9a 3011 }
dudmuck 18:9530d682fd9a 3012
dudmuck 18:9530d682fd9a 3013 void cmd_mode_sleep(uint8_t idx)
dudmuck 18:9530d682fd9a 3014 {
dudmuck 18:9530d682fd9a 3015 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 3016 printf("sleep\r\n");
dudmuck 18:9530d682fd9a 3017 }
dudmuck 18:9530d682fd9a 3018
dudmuck 18:9530d682fd9a 3019 void cmd_mode_fstx(uint8_t idx)
dudmuck 18:9530d682fd9a 3020 {
dudmuck 18:9530d682fd9a 3021 radio.set_opmode(RF_OPMODE_SYNTHESIZER_TX);
dudmuck 18:9530d682fd9a 3022 printf("fstx\r\n");
dudmuck 18:9530d682fd9a 3023 }
dudmuck 18:9530d682fd9a 3024
dudmuck 18:9530d682fd9a 3025 void cmd_mode_fsrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3026 {
dudmuck 18:9530d682fd9a 3027 radio.set_opmode(RF_OPMODE_SYNTHESIZER_RX);
dudmuck 18:9530d682fd9a 3028 printf("fsrx\r\n");
dudmuck 18:9530d682fd9a 3029 }
dudmuck 18:9530d682fd9a 3030
dudmuck 18:9530d682fd9a 3031 void cmd_chat(uint8_t idx)
dudmuck 18:9530d682fd9a 3032 {
dudmuck 18:9530d682fd9a 3033 app = APP_CHAT;
dudmuck 18:9530d682fd9a 3034 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 3035 printf("chat start\r\n");
dudmuck 18:9530d682fd9a 3036 }
dudmuck 18:9530d682fd9a 3037
dudmuck 18:9530d682fd9a 3038 void cmd_OokThreshType(uint8_t idx)
dudmuck 18:9530d682fd9a 3039 {
dudmuck 18:9530d682fd9a 3040 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3041 if (fsk.RegOokPeak.bits.OokThreshType == 2)
dudmuck 18:9530d682fd9a 3042 fsk.RegOokPeak.bits.OokThreshType = 0;
dudmuck 18:9530d682fd9a 3043 else
dudmuck 18:9530d682fd9a 3044 fsk.RegOokPeak.bits.OokThreshType++;
dudmuck 18:9530d682fd9a 3045
dudmuck 18:9530d682fd9a 3046 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3047 printf("OokThreshType:");
dudmuck 18:9530d682fd9a 3048 switch (fsk.RegOokPeak.bits.OokThreshType) {
dudmuck 18:9530d682fd9a 3049 case 0: printf("fixed"); break;
dudmuck 18:9530d682fd9a 3050 case 1: printf("peak"); break;
dudmuck 18:9530d682fd9a 3051 case 2: printf("average"); break;
dudmuck 18:9530d682fd9a 3052 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 3053 }
dudmuck 18:9530d682fd9a 3054 printf("\r\n");
dudmuck 18:9530d682fd9a 3055 }
dudmuck 18:9530d682fd9a 3056
dudmuck 18:9530d682fd9a 3057 void cmd_OokPeakTheshStep(uint8_t idx)
dudmuck 18:9530d682fd9a 3058 {
dudmuck 18:9530d682fd9a 3059 float f;
dudmuck 18:9530d682fd9a 3060 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3061 if (fsk.RegOokPeak.bits.OokPeakThreshStep == 7)
dudmuck 18:9530d682fd9a 3062 fsk.RegOokPeak.bits.OokPeakThreshStep = 0;
dudmuck 18:9530d682fd9a 3063 else
dudmuck 18:9530d682fd9a 3064 fsk.RegOokPeak.bits.OokPeakThreshStep++;
dudmuck 18:9530d682fd9a 3065
dudmuck 18:9530d682fd9a 3066 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3067 switch (fsk.RegOokPeak.bits.OokPeakThreshStep) {
dudmuck 18:9530d682fd9a 3068 case 0: f = 0.5; break;
dudmuck 18:9530d682fd9a 3069 case 1: f = 1; break;
dudmuck 18:9530d682fd9a 3070 case 2: f = 1.5; break;
dudmuck 18:9530d682fd9a 3071 case 3: f = 2; break;
dudmuck 18:9530d682fd9a 3072 case 4: f = 3; break;
dudmuck 18:9530d682fd9a 3073 case 5: f = 4; break;
dudmuck 18:9530d682fd9a 3074 case 6: f = 5; break;
dudmuck 18:9530d682fd9a 3075 case 7: f = 6; break;
dudmuck 18:9530d682fd9a 3076 }
dudmuck 18:9530d682fd9a 3077 printf("OokPeakThreshStep:%.1fdB\r\n", f);
dudmuck 18:9530d682fd9a 3078 }
dudmuck 18:9530d682fd9a 3079
dudmuck 18:9530d682fd9a 3080 void cmd_OokFixedThresh(uint8_t idx)
dudmuck 18:9530d682fd9a 3081 {
dudmuck 18:9530d682fd9a 3082 int i;
dudmuck 18:9530d682fd9a 3083 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3084 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3085 radio.write_reg(REG_FSK_OOKFIX, i);
dudmuck 18:9530d682fd9a 3086 }
dudmuck 18:9530d682fd9a 3087 i = radio.read_reg(REG_FSK_OOKFIX);
dudmuck 18:9530d682fd9a 3088 printf("OokFixedThreshold:%d\r\n", i);
dudmuck 18:9530d682fd9a 3089 }
dudmuck 18:9530d682fd9a 3090
dudmuck 18:9530d682fd9a 3091 void cmd_clkout(uint8_t idx)
dudmuck 18:9530d682fd9a 3092 {
dudmuck 18:9530d682fd9a 3093 RegOsc_t reg_osc;
dudmuck 18:9530d682fd9a 3094 reg_osc.octet = radio.read_reg(REG_FSK_OSC);
dudmuck 18:9530d682fd9a 3095 if (reg_osc.bits.ClkOut == 7)
dudmuck 18:9530d682fd9a 3096 reg_osc.bits.ClkOut = 0;
dudmuck 18:9530d682fd9a 3097 else
dudmuck 18:9530d682fd9a 3098 reg_osc.bits.ClkOut++;
dudmuck 18:9530d682fd9a 3099
dudmuck 18:9530d682fd9a 3100 printf("ClkOut:%d\r\n", reg_osc.bits.ClkOut);
dudmuck 18:9530d682fd9a 3101 radio.write_reg(REG_FSK_OSC, reg_osc.octet);
dudmuck 18:9530d682fd9a 3102 }
dudmuck 18:9530d682fd9a 3103
dudmuck 18:9530d682fd9a 3104 void cmd_help(uint8_t args_at);
dudmuck 18:9530d682fd9a 3105
dudmuck 18:9530d682fd9a 3106 typedef enum {
dudmuck 18:9530d682fd9a 3107 MODEM_BOTH,
dudmuck 18:9530d682fd9a 3108 MODEM_FSK,
dudmuck 18:9530d682fd9a 3109 MODEM_LORA
dudmuck 18:9530d682fd9a 3110 } modem_e;
dudmuck 18:9530d682fd9a 3111
dudmuck 18:9530d682fd9a 3112 typedef struct {
dudmuck 18:9530d682fd9a 3113 modem_e modem;
dudmuck 18:9530d682fd9a 3114 const char* const cmd;
dudmuck 18:9530d682fd9a 3115 void (*handler)(uint8_t args_at);
dudmuck 18:9530d682fd9a 3116 const char* const arg_descr;
dudmuck 18:9530d682fd9a 3117 const char* const description;
dudmuck 18:9530d682fd9a 3118 } menu_item_t;
dudmuck 18:9530d682fd9a 3119
dudmuck 18:9530d682fd9a 3120 const menu_item_t menu_items[] =
dudmuck 18:9530d682fd9a 3121 { /* after first character, command names must be [A-Za-z] */
dudmuck 18:9530d682fd9a 3122 { MODEM_BOTH, "chat", cmd_chat, "","start keyboard chat"},
dudmuck 18:9530d682fd9a 3123 { MODEM_BOTH, "rssi", cmd_read_current_rssi, "","(RX) read instantaneous RSSI"},
dudmuck 18:9530d682fd9a 3124 { MODEM_BOTH, "txpd", cmd_per_tx_delay, "<%d>","get/set PER tx delay (in milliseconds)"},
dudmuck 18:9530d682fd9a 3125 { MODEM_BOTH, "pertx", cmd_pertx, "<%d pkt count>","start Eiger PER TX"},
dudmuck 18:9530d682fd9a 3126 { MODEM_BOTH, "perrx", cmd_perrx, "","start Eiger PER RX"},
dudmuck 18:9530d682fd9a 3127 { MODEM_BOTH, "pres", cmd_PreambleSize, "<%d>", "get/set PreambleSize"},
dudmuck 18:9530d682fd9a 3128 { MODEM_BOTH, "pllbw", cmd_pllbw, "", "increment pllbw"},
dudmuck 18:9530d682fd9a 3129 { MODEM_BOTH, "lnab", cmd_lna_boost, "", "(RX) increment LNA boost"},
dudmuck 18:9530d682fd9a 3130 { MODEM_BOTH, "stby", cmd_mode_standby, "", "set chip mode to standby"},
dudmuck 18:9530d682fd9a 3131 { MODEM_BOTH, "sleep", cmd_mode_sleep, "", "set chip mode to sleep"},
dudmuck 18:9530d682fd9a 3132 { MODEM_BOTH, "fstx", cmd_mode_fstx, "", "set chip mode to fstx"},
dudmuck 18:9530d682fd9a 3133 { MODEM_BOTH, "fsrx", cmd_mode_fsrx, "", "set chip mode to fsrx"},
dudmuck 18:9530d682fd9a 3134 { MODEM_BOTH, "crcon", cmd_crcOn, "","toggle crcOn"},
dudmuck 18:9530d682fd9a 3135 { MODEM_BOTH, "payl", cmd_payload_length, "<%d>","get/set payload length"},
dudmuck 18:9530d682fd9a 3136 { MODEM_BOTH, "bgr", cmd_bgr, "<%d>","(TX) get/set reference for TX DAC"},
dudmuck 18:9530d682fd9a 3137 { MODEM_BOTH, "ocp", cmd_ocp, "<%d>","(TX) get/set milliamps current limit"},
dudmuck 18:9530d682fd9a 3138 { MODEM_BOTH, "frf", cmd_frf, "<MHz>","get/set RF center frequency"},
dudmuck 18:9530d682fd9a 3139 { MODEM_BOTH, "pas", cmd_paSelect, "","(TX) toggle RFO/PA_BOOST"},
dudmuck 18:9530d682fd9a 3140 { MODEM_BOTH, "pid", cmd_per_id, "<%d>","get/set ID number in Eiger PER packet"},
dudmuck 18:9530d682fd9a 3141 { MODEM_BOTH, "dio", cmd_show_dio, "","print dio mapping"},
dudmuck 18:9530d682fd9a 3142
dudmuck 18:9530d682fd9a 3143 { MODEM_FSK, "clkout", cmd_clkout, "","increment ClkOut divider"},
dudmuck 18:9530d682fd9a 3144 { MODEM_FSK, "ookt", cmd_OokThreshType, "","(RX) increment OokThreshType"},
dudmuck 18:9530d682fd9a 3145 { MODEM_FSK, "ooks", cmd_OokPeakTheshStep, "","(RX) increment OokPeakTheshStep"},
dudmuck 18:9530d682fd9a 3146 { MODEM_FSK, "sqlch", cmd_OokFixedThresh, "<%d>","(RX) get/set OokFixedThresh"},
dudmuck 18:9530d682fd9a 3147 { MODEM_FSK, "rssit", cmd_rssi_threshold, "<-dBm>","(RX) get/set rssi threshold"},
dudmuck 18:9530d682fd9a 3148 { MODEM_FSK, "rssis", cmd_rssi_smoothing, "<%d>","(RX) get/set rssi smoothing"},
dudmuck 18:9530d682fd9a 3149 { MODEM_FSK, "rssio", cmd_rssi_offset, "<%d>","(RX) get/set rssi offset"},
dudmuck 18:9530d682fd9a 3150 { MODEM_FSK, "mods", cmd_mod_shaping, "", "(TX) increment modulation shaping"},
dudmuck 18:9530d682fd9a 3151 { MODEM_FSK, "agcauto", cmd_fsk_agcauto, "", "(RX) toggle AgcAutoOn"},
dudmuck 18:9530d682fd9a 3152 { MODEM_FSK, "afcauto", cmd_fsk_afcauto, "", "(RX) toggle AfcAutoOn"},
dudmuck 18:9530d682fd9a 3153 { MODEM_FSK, "syncw", cmd_fsk_syncword, "<hex bytes>", "get/set syncword"},
dudmuck 18:9530d682fd9a 3154 { MODEM_FSK, "syncon", cmd_fsk_syncOn, "", "toggle SyncOn (frame sync, SFD enable)"},
dudmuck 18:9530d682fd9a 3155 { MODEM_FSK, "bitsync", cmd_fsk_bitsync, "", "toggle BitSyncOn (continuous mode only)"},
dudmuck 18:9530d682fd9a 3156 { MODEM_FSK, "fifot", cmd_fsk_TxStartCondition, "", "(TX) toggle TxStartCondition"},
dudmuck 18:9530d682fd9a 3157 { MODEM_FSK, "pktf", cmd_fsk_PacketFormat, "", "toggle PacketFormat fixed/variable length"},
dudmuck 18:9530d682fd9a 3158 { MODEM_FSK, "poll", cmd_poll_irq_en, "", "toggle poll_irq_en"},
dudmuck 18:9530d682fd9a 3159 { MODEM_FSK, "prep", cmd_fsk_PreamblePolarity, "", "toggle PreamblePolarity"},
dudmuck 18:9530d682fd9a 3160 { MODEM_FSK, "datam", cmd_fsk_DataMode, "", "toggle DataMode (packet/continuous)"},
dudmuck 18:9530d682fd9a 3161 { MODEM_FSK, "rxt", cmd_rx_trigger, "","(RX) increment RxTrigger"},
dudmuck 18:9530d682fd9a 3162 { MODEM_FSK, "ook", cmd_ook, "","enter OOK mode"},
dudmuck 18:9530d682fd9a 3163 { MODEM_FSK, "fei", cmd_fsk_read_fei, "","(RX) read FEI"},
dudmuck 18:9530d682fd9a 3164 { MODEM_FSK, "fdev", cmd_fsk_fdev, "<kHz>","(TX) get/set fdev"},
dudmuck 18:9530d682fd9a 3165 { MODEM_FSK, "par", cmd_paRamp, "","(TX) increment paRamp"},
dudmuck 18:9530d682fd9a 3166 { MODEM_FSK, "pde", cmd_fsk_PreambleDetectorOn, "","(RX) toggle PreambleDetectorOn"},
dudmuck 18:9530d682fd9a 3167 { MODEM_FSK, "pds", cmd_fsk_PreambleDetectorSize, "<%d>","(RX) get/set PreambleDetectorSize"},
dudmuck 18:9530d682fd9a 3168 { MODEM_FSK, "pdt", cmd_fsk_PreambleDetectorTol, "<%d>","(RX) get/set PreambleDetectorTol"},
dudmuck 18:9530d682fd9a 3169 { MODEM_FSK, "thr", cmd_fsk_FifoThreshold, "<%d>","get/set FifoThreshold"},
dudmuck 18:9530d682fd9a 3170 { MODEM_FSK, "dcf", cmd_fsk_dcfree, "","(RX) increment DcFree"},
dudmuck 18:9530d682fd9a 3171 { MODEM_FSK, "br", cmd_fsk_bitrate, "<%f kbps>","get/set bitrate"},
dudmuck 18:9530d682fd9a 3172 { MODEM_FSK, "ac", cmd_AfcClear, "","(RX) AfcClear"},
dudmuck 18:9530d682fd9a 3173 { MODEM_FSK, "ar", cmd_fsk_AutoRestartRxMode, "","(RX) increment AutoRestartRxMode"},
dudmuck 18:9530d682fd9a 3174 { MODEM_FSK, "alc", cmd_fsk_AfcAutoClearOn, "","(RX) toggle AfcAutoClearOn"},
dudmuck 18:9530d682fd9a 3175 { MODEM_FSK, "mp", cmd_MapPreambleDetect, "","(RX) toggle MapPreambleDetect"},
dudmuck 18:9530d682fd9a 3176 { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"},
dudmuck 18:9530d682fd9a 3177
dudmuck 18:9530d682fd9a 3178 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 3179 { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
dudmuck 18:9530d682fd9a 3180 { MODEM_LORA, "csn", cmd_lora_sync_sweep, "[12]","(TXTEST) sweep ppg symbol"},
dudmuck 18:9530d682fd9a 3181 { MODEM_LORA, "ss", cmd_lora_sync_lo_nibble, "","(TXTEST) ppg low nibble"},
dudmuck 18:9530d682fd9a 3182 { MODEM_LORA, "cpl", lora_cycle_payload_length, "[%d stop]","(TXTEST) sweep payload length"},
dudmuck 18:9530d682fd9a 3183 { MODEM_LORA, "ro", cmd_lora_data_ramp, "[%d bytes]","(TXTEST) sweep payload data"},
dudmuck 18:9530d682fd9a 3184 { MODEM_LORA, "ccr", cmd_lora_cycle_codingrates, "","(TXTEST) cycle coding rates"},
dudmuck 18:9530d682fd9a 3185 { MODEM_LORA, "fps", cmd_lora_fixed_payload_symbol, "[symbol_num n_bits]","(TXTEST) sweep symbol, n_bits=bits per symbol set (sf8=24, sf9=28, etc)"},
dudmuck 18:9530d682fd9a 3186 { MODEM_LORA, "fpo", cmd_fixed_payload_offset, "<nbytes>","(TXTEST) padding offset for fp tests"},
dudmuck 18:9530d682fd9a 3187 { MODEM_LORA, "fp", cmd_lora_fixed_payload, "[bytes]","(TXTEST) fixed payload"},
dudmuck 18:9530d682fd9a 3188 { MODEM_LORA, "tab", cmd_lora_toggle_all_bits, "[byte length]","(TXTEST) toggle all bits"},
dudmuck 18:9530d682fd9a 3189 { MODEM_LORA, "tcrc", cmd_lora_toggle_crcOn, "","(TXTEST) toggle crcOn"},
dudmuck 18:9530d682fd9a 3190 { MODEM_LORA, "thm", cmd_lora_toggle_header_mode, "","(TXTEST) toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3191 { MODEM_BOTH, "ttr", cmd_tx_ticker_rate, "<%f seconds>","(TXTEST) get/set tx_ticker rate"},
dudmuck 18:9530d682fd9a 3192 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3193
dudmuck 18:9530d682fd9a 3194 { MODEM_LORA, "cadper", cmd_cadper, "","Eiger PER RX using CAD" },
dudmuck 18:9530d682fd9a 3195 { MODEM_LORA, "cad", cmd_cad, "<%d num tries>","(RX) run channel activity detection" },
dudmuck 18:9530d682fd9a 3196 { MODEM_LORA, "iqinv", cmd_lora_rx_invert, "","(RX) toggle RX IQ invert" },
dudmuck 18:9530d682fd9a 3197 { MODEM_LORA, "cin", cmd_lora_tx_invert, "","(TX) toggle TX IQ invert" },
dudmuck 18:9530d682fd9a 3198 { MODEM_LORA, "lhp", cmd_hop_period, "<%d>","(RX) get/set hop period"},
dudmuck 18:9530d682fd9a 3199 { MODEM_LORA, "sync", cmd_lora_ppg, "<%x>","get/set sync (post-preamble gap)"},
dudmuck 18:9530d682fd9a 3200 { MODEM_LORA, "cr", cmd_codingRate, "<1-4>","get/set codingRate"},
dudmuck 18:9530d682fd9a 3201 { MODEM_LORA, "lhm", cmd_lora_header_mode, "","toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3202 { MODEM_LORA, "vh", cmd_lora_poll_validHeader, "","toggle polling of validHeader"},
dudmuck 18:9530d682fd9a 3203 { MODEM_LORA, "sf", cmd_lora_sf, "<%d>","get/set spreadingFactor"},
dudmuck 18:9530d682fd9a 3204 { MODEM_LORA, "ldr", cmd_LowDataRateOptimize, "","toggle LowDataRateOptimize"},
dudmuck 18:9530d682fd9a 3205 { MODEM_LORA, "txc", cmd_lora_continuous_tx, "","(TX) toggle TxContinuousMode"},
dudmuck 18:9530d682fd9a 3206 { MODEM_BOTH, "tx", cmd_tx, "<%d>","transmit packet. optional payload length"},
dudmuck 18:9530d682fd9a 3207 { MODEM_BOTH, "bw", cmd_bandwidth, "<kHz>","get/set bandwith"},
dudmuck 18:9530d682fd9a 3208 { MODEM_LORA, "rxt", cmd_rx_timeout, "<%d>","(RX) get/set SymbTimeout"},
dudmuck 18:9530d682fd9a 3209 { MODEM_LORA, "rxs", cmd_rx_single, "","start RX_SINGLE"},
dudmuck 18:9530d682fd9a 3210 { MODEM_BOTH, "rx", cmd_rx, "","start RX"},
dudmuck 18:9530d682fd9a 3211
dudmuck 18:9530d682fd9a 3212 { MODEM_BOTH, "h", cmd_hw_reset, "","hardware reset"},
dudmuck 18:9530d682fd9a 3213 { MODEM_BOTH, "i", cmd_init, "","initialize radio driver"},
dudmuck 18:9530d682fd9a 3214 { MODEM_BOTH, "R", cmd_read_all_regs, "","read all radio registers"},
dudmuck 18:9530d682fd9a 3215 { MODEM_BOTH, "r", cmd_radio_reg_read, "[%x]","read single radio register"},
dudmuck 18:9530d682fd9a 3216 { MODEM_BOTH, "w", cmd_radio_reg_write, "[%x %x]","write single radio register"},
dudmuck 18:9530d682fd9a 3217
dudmuck 18:9530d682fd9a 3218 { MODEM_BOTH, "L", cmd_toggle_modem, "","toggle between LoRa / FSK"},
dudmuck 18:9530d682fd9a 3219 { MODEM_FSK, "E", cmd_empty_fifo, "","empty out FIFO"},
dudmuck 18:9530d682fd9a 3220 { MODEM_FSK, "c", cmd_fsk_test_case, "<%d>","get/set test cases"},
dudmuck 18:9530d682fd9a 3221 { MODEM_BOTH, "d", cmd_set_dio, "<%d pin num>","increment dio mapping"},
dudmuck 18:9530d682fd9a 3222 { MODEM_BOTH, ".", cmd_print_status, "","print status"},
dudmuck 18:9530d682fd9a 3223 { MODEM_BOTH, "?", cmd_help, "","this list of commands"},
dudmuck 18:9530d682fd9a 3224 { MODEM_BOTH, NULL, NULL, NULL }
dudmuck 18:9530d682fd9a 3225 };
dudmuck 18:9530d682fd9a 3226
dudmuck 18:9530d682fd9a 3227 void cmd_help(uint8_t args_at)
dudmuck 18:9530d682fd9a 3228 {
dudmuck 18:9530d682fd9a 3229 int i;
dudmuck 18:9530d682fd9a 3230
dudmuck 18:9530d682fd9a 3231 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3232 if (menu_items[i].modem == MODEM_BOTH)
dudmuck 18:9530d682fd9a 3233 printf("%s%s\t%s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3234 }
dudmuck 18:9530d682fd9a 3235
dudmuck 18:9530d682fd9a 3236 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3237 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3238 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 3239 printf("%s%s\t(LoRa) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3240 }
dudmuck 18:9530d682fd9a 3241 } else {
dudmuck 18:9530d682fd9a 3242 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3243 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 3244 printf("%s%s\t(FSK) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 3245 }
dudmuck 18:9530d682fd9a 3246 }
dudmuck 10:d9bb2ce57f05 3247 }
dudmuck 10:d9bb2ce57f05 3248
dudmuck 0:be215de91a68 3249 void
dudmuck 0:be215de91a68 3250 console()
dudmuck 0:be215de91a68 3251 {
dudmuck 18:9530d682fd9a 3252 int i;
dudmuck 18:9530d682fd9a 3253 uint8_t user_cmd_len;
dudmuck 5:360069ec9953 3254
dudmuck 18:9530d682fd9a 3255 if (poll_irq_en)
dudmuck 18:9530d682fd9a 3256 poll_service_radio();
dudmuck 18:9530d682fd9a 3257 else
dudmuck 18:9530d682fd9a 3258 service_radio();
dudmuck 0:be215de91a68 3259
dudmuck 5:360069ec9953 3260 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 3261 printf("abort\r\n");
dudmuck 18:9530d682fd9a 3262 cadper_enable = false;
dudmuck 8:227605e4a760 3263 per_en = false;
dudmuck 5:360069ec9953 3264 pcbuf_len = 0;
dudmuck 15:c69b942685ea 3265 if ((radio.RegOpMode.bits.Mode != RF_OPMODE_SLEEP) && (radio.RegOpMode.bits.Mode != RF_OPMODE_STANDBY)) {
dudmuck 15:c69b942685ea 3266 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 15:c69b942685ea 3267 }
dudmuck 18:9530d682fd9a 3268 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 3269 tx_ticker.detach();
dudmuck 0:be215de91a68 3270 return;
dudmuck 0:be215de91a68 3271 }
dudmuck 5:360069ec9953 3272 if (pcbuf_len == 0)
dudmuck 5:360069ec9953 3273 return;
dudmuck 18:9530d682fd9a 3274
dudmuck 0:be215de91a68 3275 printf("\r\n");
dudmuck 18:9530d682fd9a 3276
dudmuck 18:9530d682fd9a 3277 /* get end of user-entered command */
dudmuck 18:9530d682fd9a 3278 user_cmd_len = 1; // first character can be any character
dudmuck 18:9530d682fd9a 3279 for (i = 1; i <= pcbuf_len; i++) {
dudmuck 18:9530d682fd9a 3280 if (pcbuf[i] < 'A' || (pcbuf[i] > 'Z' && pcbuf[i] < 'a') || pcbuf[i] > 'z') {
dudmuck 18:9530d682fd9a 3281 user_cmd_len = i;
dudmuck 18:9530d682fd9a 3282 break;
dudmuck 7:c3c54f222ced 3283 }
dudmuck 0:be215de91a68 3284 }
dudmuck 18:9530d682fd9a 3285
dudmuck 18:9530d682fd9a 3286 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 3287 int mi_len = strlen(menu_items[i].cmd);
dudmuck 18:9530d682fd9a 3288 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3289 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 3290 continue; // FSK commands not used in LoRa
dudmuck 18:9530d682fd9a 3291 } else {
dudmuck 18:9530d682fd9a 3292 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 3293 continue; // LoRa commands not used in FSK
dudmuck 18:9530d682fd9a 3294 }
dudmuck 18:9530d682fd9a 3295
dudmuck 18:9530d682fd9a 3296 if (menu_items[i].handler && user_cmd_len == mi_len && (strncmp(pcbuf, menu_items[i].cmd, mi_len) == 0)) {
dudmuck 18:9530d682fd9a 3297 while (pcbuf[mi_len] == ' ') // skip past spaces
dudmuck 18:9530d682fd9a 3298 mi_len++;
dudmuck 18:9530d682fd9a 3299 menu_items[i].handler(mi_len);
dudmuck 18:9530d682fd9a 3300 break;
dudmuck 18:9530d682fd9a 3301 }
dudmuck 18:9530d682fd9a 3302 }
dudmuck 18:9530d682fd9a 3303
dudmuck 5:360069ec9953 3304 pcbuf_len = 0;
dudmuck 0:be215de91a68 3305 printf("> ");
dudmuck 18:9530d682fd9a 3306 fflush(stdout);
dudmuck 0:be215de91a68 3307 }
dudmuck 0:be215de91a68 3308
dudmuck 5:360069ec9953 3309 void rx_callback()
dudmuck 5:360069ec9953 3310 {
dudmuck 5:360069ec9953 3311 static uint8_t pcbuf_idx = 0;
dudmuck 5:360069ec9953 3312 static uint8_t prev_len = 0;;
dudmuck 5:360069ec9953 3313 char c = pc.getc();
dudmuck 18:9530d682fd9a 3314 /*if (kermit.uart_rx_enabled) {
dudmuck 18:9530d682fd9a 3315 kermit.rx_callback(c);
dudmuck 18:9530d682fd9a 3316 } else*/ {
dudmuck 18:9530d682fd9a 3317 if (c == 8) {
dudmuck 18:9530d682fd9a 3318 if (pcbuf_idx > 0) {
dudmuck 18:9530d682fd9a 3319 pc.putc(8);
dudmuck 18:9530d682fd9a 3320 pc.putc(' ');
dudmuck 18:9530d682fd9a 3321 pc.putc(8);
dudmuck 18:9530d682fd9a 3322 pcbuf_idx--;
dudmuck 18:9530d682fd9a 3323 }
dudmuck 18:9530d682fd9a 3324 } else if (c == 3) { // ctrl-C
dudmuck 18:9530d682fd9a 3325 pcbuf_len = -1;
dudmuck 18:9530d682fd9a 3326 } else if (c == '\r') {
dudmuck 18:9530d682fd9a 3327 if (pcbuf_idx == 0) {
dudmuck 18:9530d682fd9a 3328 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 3329 } else {
dudmuck 18:9530d682fd9a 3330 pcbuf[pcbuf_idx] = 0; // null terminate
dudmuck 18:9530d682fd9a 3331 prev_len = pcbuf_idx;
dudmuck 18:9530d682fd9a 3332 pcbuf_idx = 0;
dudmuck 18:9530d682fd9a 3333 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 3334 }
dudmuck 18:9530d682fd9a 3335 }/* else if (c == SOH) {
dudmuck 18:9530d682fd9a 3336 kermit.uart_rx_enable();
dudmuck 18:9530d682fd9a 3337 }*/ else if (pcbuf_idx < sizeof(pcbuf)) {
dudmuck 18:9530d682fd9a 3338 pcbuf[pcbuf_idx++] = c;
dudmuck 18:9530d682fd9a 3339 pc.putc(c);
dudmuck 5:360069ec9953 3340 }
dudmuck 5:360069ec9953 3341 }
dudmuck 5:360069ec9953 3342 }
dudmuck 5:360069ec9953 3343
dudmuck 0:be215de91a68 3344 int main()
dudmuck 5:360069ec9953 3345 {
dudmuck 5:360069ec9953 3346 #if defined(TARGET_NUCLEO_L152RE) && defined(USE_DEBUGGER)
dudmuck 5:360069ec9953 3347 DBGMCU_Config(DBGMCU_SLEEP, ENABLE);
dudmuck 5:360069ec9953 3348 DBGMCU_Config(DBGMCU_STOP, ENABLE);
dudmuck 5:360069ec9953 3349 DBGMCU_Config(DBGMCU_STANDBY, ENABLE);
dudmuck 5:360069ec9953 3350 #endif
dudmuck 0:be215de91a68 3351
dudmuck 0:be215de91a68 3352 pc.baud(57600);
dudmuck 6:fe16f96ee335 3353 printf("\r\nmain()\r\n");
dudmuck 6:fe16f96ee335 3354
dudmuck 5:360069ec9953 3355 pc.attach(rx_callback);
dudmuck 0:be215de91a68 3356
dudmuck 15:c69b942685ea 3357 #ifndef TARGET_MTS_MDOT_F411RE
dudmuck 15:c69b942685ea 3358 rfsw.input();
dudmuck 15:c69b942685ea 3359 if (rfsw.read()) {
dudmuck 15:c69b942685ea 3360 shield_type = SHIELD_TYPE_LAS;
dudmuck 15:c69b942685ea 3361 printf("LAS\r\n");
dudmuck 15:c69b942685ea 3362 } else {
dudmuck 15:c69b942685ea 3363 shield_type = SHIELD_TYPE_MAS;
dudmuck 15:c69b942685ea 3364 printf("MAS\r\n");
dudmuck 15:c69b942685ea 3365 }
dudmuck 15:c69b942685ea 3366
dudmuck 15:c69b942685ea 3367 rfsw.output();
dudmuck 15:c69b942685ea 3368 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 6:fe16f96ee335 3369 radio.rf_switch.attach(rfsw_callback);
dudmuck 10:d9bb2ce57f05 3370
dudmuck 13:c73caaee93a5 3371 #ifdef FSK_PER
dudmuck 13:c73caaee93a5 3372 fsk.enable(false);
dudmuck 13:c73caaee93a5 3373 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 13:c73caaee93a5 3374 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 13:c73caaee93a5 3375 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 13:c73caaee93a5 3376 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 13:c73caaee93a5 3377 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 13:c73caaee93a5 3378 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 13:c73caaee93a5 3379
dudmuck 13:c73caaee93a5 3380 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 3381 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 3382 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 3383 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 13:c73caaee93a5 3384
dudmuck 13:c73caaee93a5 3385 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 13:c73caaee93a5 3386 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 3387 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 3388 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 13:c73caaee93a5 3389 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 13:c73caaee93a5 3390
dudmuck 13:c73caaee93a5 3391 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 13:c73caaee93a5 3392 fsk.set_rx_dcc_bw_hz(41666, 1); // afcbw
dudmuck 13:c73caaee93a5 3393 fsk.set_rx_dcc_bw_hz(20833, 0); // rxbw
dudmuck 13:c73caaee93a5 3394
dudmuck 13:c73caaee93a5 3395 fsk.set_tx_fdev_hz(10000);
dudmuck 13:c73caaee93a5 3396
dudmuck 13:c73caaee93a5 3397 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 13:c73caaee93a5 3398
dudmuck 13:c73caaee93a5 3399 fsk.RegPktConfig2.bits.PayloadLength = 64;
dudmuck 13:c73caaee93a5 3400 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 13:c73caaee93a5 3401
dudmuck 13:c73caaee93a5 3402 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 13:c73caaee93a5 3403 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 14:c57ea544dc18 3404 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 14:c57ea544dc18 3405 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 13:c73caaee93a5 3406 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 16:b9d36c60f2d3 3407
dudmuck 16:b9d36c60f2d3 3408 RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 3409 RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 3410 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 3411 write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 16:b9d36c60f2d3 3412
dudmuck 13:c73caaee93a5 3413 #endif /* FSK_PER */
dudmuck 10:d9bb2ce57f05 3414
dudmuck 10:d9bb2ce57f05 3415 #ifdef START_EIGER_TX
dudmuck 14:c57ea544dc18 3416 uint8_t addr;
dudmuck 10:d9bb2ce57f05 3417 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 3418
dudmuck 11:81ff5bcafd97 3419 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 11:81ff5bcafd97 3420 radio.RegOcp.bits.OcpTrim = 20;
dudmuck 11:81ff5bcafd97 3421 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 11:81ff5bcafd97 3422
dudmuck 11:81ff5bcafd97 3423 RegPdsTrim1_t pds_trim;
dudmuck 14:c57ea544dc18 3424 if (radio.type == SX1276)
dudmuck 14:c57ea544dc18 3425 addr = REG_PDSTRIM1_SX1276;
dudmuck 14:c57ea544dc18 3426 else
dudmuck 14:c57ea544dc18 3427 addr = REG_PDSTRIM1_SX1272;
dudmuck 14:c57ea544dc18 3428
dudmuck 14:c57ea544dc18 3429 pds_trim.octet = radio.read_reg(addr);
dudmuck 11:81ff5bcafd97 3430 pds_trim.bits.prog_txdac = 7;
dudmuck 14:c57ea544dc18 3431 radio.write_reg(addr, pds_trim.octet);
dudmuck 11:81ff5bcafd97 3432
dudmuck 13:c73caaee93a5 3433 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 3434 lora.enable();
dudmuck 12:beb0387c1b4c 3435 lora.setSf(10);
dudmuck 10:d9bb2ce57f05 3436 if (radio.type == SX1276)
dudmuck 10:d9bb2ce57f05 3437 lora.setBw(7); // 7 == 125khz
dudmuck 13:c73caaee93a5 3438 #endif
dudmuck 10:d9bb2ce57f05 3439
dudmuck 10:d9bb2ce57f05 3440 toggle_per_en();
dudmuck 10:d9bb2ce57f05 3441 PacketTxCnt = 0;
dudmuck 10:d9bb2ce57f05 3442 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 11:81ff5bcafd97 3443 #endif /* START_EIGER_TX */
dudmuck 10:d9bb2ce57f05 3444
dudmuck 10:d9bb2ce57f05 3445 #ifdef START_EIGER_RX
dudmuck 13:c73caaee93a5 3446
dudmuck 10:d9bb2ce57f05 3447 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 3448 radio.RegPaConfig.bits.PaSelect = 1; // 0: use RFO for sx1276 shield, 1==PA_BOOST
dudmuck 10:d9bb2ce57f05 3449 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 10:d9bb2ce57f05 3450
dudmuck 10:d9bb2ce57f05 3451 toggle_per_en();
dudmuck 10:d9bb2ce57f05 3452 PacketNormalCnt = 0;
dudmuck 10:d9bb2ce57f05 3453 PacketRxSequencePrev = -1;
dudmuck 10:d9bb2ce57f05 3454 PacketPerKoCnt = 0;
dudmuck 13:c73caaee93a5 3455 PacketPerOkCnt = 0;
dudmuck 13:c73caaee93a5 3456
dudmuck 13:c73caaee93a5 3457 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 3458 lora.enable();
dudmuck 13:c73caaee93a5 3459 lora.setSf(10);
dudmuck 13:c73caaee93a5 3460 if (radio.type == SX1276)
dudmuck 13:c73caaee93a5 3461 lora.setBw(7); // 7 == 125khz
dudmuck 10:d9bb2ce57f05 3462 lora.start_rx();
dudmuck 13:c73caaee93a5 3463 #else
dudmuck 13:c73caaee93a5 3464 fsk.start_rx();
dudmuck 14:c57ea544dc18 3465 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 14:c57ea544dc18 3466 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 15:c69b942685ea 3467
dudmuck 15:c69b942685ea 3468 if (radio.HF) {
dudmuck 15:c69b942685ea 3469 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 15:c69b942685ea 3470 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 15:c69b942685ea 3471 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 15:c69b942685ea 3472 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 15:c69b942685ea 3473 }
dudmuck 10:d9bb2ce57f05 3474 #endif
dudmuck 13:c73caaee93a5 3475
dudmuck 15:c69b942685ea 3476 if (radio.HF) {
dudmuck 15:c69b942685ea 3477 radio.RegLna.bits.LnaBoostHF = 3;
dudmuck 15:c69b942685ea 3478 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 15:c69b942685ea 3479 }
dudmuck 15:c69b942685ea 3480
dudmuck 13:c73caaee93a5 3481 #endif /* START_EIGER_RX */
dudmuck 15:c69b942685ea 3482
dudmuck 15:c69b942685ea 3483 (void)radio.get_frf_MHz();
dudmuck 15:c69b942685ea 3484 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 15:c69b942685ea 3485 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 15:c69b942685ea 3486 // LAS HF=PA_BOOST LF=RFO
dudmuck 15:c69b942685ea 3487 if (radio.HF)
dudmuck 15:c69b942685ea 3488 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 15:c69b942685ea 3489 else
dudmuck 15:c69b942685ea 3490 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 3491 } else if (shield_type == SHIELD_TYPE_MAS) {
dudmuck 15:c69b942685ea 3492 // MAS HF=RFO LF=RFO
dudmuck 15:c69b942685ea 3493 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 3494 }
dudmuck 15:c69b942685ea 3495 radio.RegPaConfig.bits.OutputPower = 15;
dudmuck 15:c69b942685ea 3496 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 6:fe16f96ee335 3497
dudmuck 0:be215de91a68 3498
dudmuck 0:be215de91a68 3499 while(1) {
dudmuck 0:be215de91a68 3500 switch (app) {
dudmuck 0:be215de91a68 3501 case APP_NONE:
dudmuck 0:be215de91a68 3502 console();
dudmuck 0:be215de91a68 3503 break;
dudmuck 0:be215de91a68 3504 case APP_CHAT:
dudmuck 0:be215de91a68 3505 console_chat();
dudmuck 0:be215de91a68 3506 break;
dudmuck 0:be215de91a68 3507 } // ...switch (app)
dudmuck 5:360069ec9953 3508
dudmuck 5:360069ec9953 3509 #if TARGET_NUCLEO_L152RE
dudmuck 5:360069ec9953 3510 //sleep();
dudmuck 5:360069ec9953 3511 #endif
dudmuck 0:be215de91a68 3512 } // ...while(1)
dudmuck 0:be215de91a68 3513 }
dudmuck 0:be215de91a68 3514