UART console application for testing SX1272/SX1276

Dependencies:   SX127x

/media/uploads/dudmuck/lora.png

This is a UART console test application for using SX127x library driver for SX1272/SX1276 radio transceivers. Serial console is provided at 57600bps. Refer to Serial Communication with a PC for information about using the serial port with your PC.

Using this command interface, you can exercise the functionality of radio chip without needing specialized software application for your PC.

Commands which can be used include ? to list available commands, or . to query status from radio chip, for example. The serial console allows you to configure the radio chip, such as setting spreading factor, bandwidth, operating frequency, etc.

A simple chat application is provided to try communications between two boards. The SX127x library object is instantiated with pin assignments generic arduino headers, but can be easily reassigned for any mbed board.

The same driver library can operate for both SX1272 and SX1276. Upon starting, the driver auto-detects whether SX1272 or SX1276 transceiver chip is connected by attempting to change the LowFrequencyModeOn bit in RegOpMode register. If this bit can be changed, then the radio device is SX1276. This bit is not implemented in SX1272. A few of the radio driver functions select behavior based on this detection. The differences between these two devices is small, from a software perspective.

Using with SX1276MB1xAS Shield

This component plugs into any board with arduino uno headers.

There are two different version of this shield. European version (MAS), and North American (LAS). The LAS shield uses PA_BOOST transmit pin to permit +20dBm power. The MAS version uses RFO transmit pin in Europe. This software reads RF switch pin (A4 pin) pulling resistor to determine which type of shield is installed.


Using with your own production board

This software is useful for validating RF performance your own LoRa board design, because only two external pins needs to be provided to PC (UART TX/RX). You can select an mbed platform which matches the CPU on your own board. If the memory size doesnt match exactly, you can export the program to an offline toolchain and edit the target type or linker file there.

Transmitter Test Guidelines

FSK mode is used for transmitter testing, because an unmodulated carrier can be sent, permitting easy measurement of TX power and frequency error.

commands used for transmitter testing:

  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • L to toggle the radio chip into FSK mode.
  • fdev0 to configure TX frequency deviation to zero, to put the transmitted carrier on the center frequency.
  • pas to select which TX pin is connected to antenna matching (RFO vs PA_BOOST).
  • op<dBm> to configure TX power.
  • If you desire to test higher power PA_BOOST, use ocp<mA>
  • w 01 03 put radio chip into transmit mode (skips writing to FIFO). This will cause radio to transmit preamble, because the FIFO is empty in TX mode. Since Fdev is zero, an unmodulated carrier is sent.
  • Spectrum analyzer can now be used to to observe TX power, harmonics, power consumption, or frequency error.
  • stby to end transmission, or use h to reset radio chip to default condition.
  • Use period . command at any time to review current radio configuration.

LoRa transmitter testing

  • use L command to toggle radio into LoRa, if necessary.
  • Normally the tx command is used to manually send single packets.
  • txc will toggle TxContinuousMode in LoRa modem to send continuous modulated transmission.
  • Useful for checking adjacent channel power.
  • enter txc again to end transmission.

Receiver Test Guidelines

FSK mode is used for receiver sensitivity testing, allowing the use of a BERT signal generator (such as R/S SMIQ03B). Using this method provides real-time indication of receiver sensitivity, useful for tuning and impedance matching. The radio chip outputs DCLK and DATA digital signals which are connected back to BERT signal generator.

commands used for receiver testing:

  • L to toggle the radio chip into FSK mode.
  • datam to toggle FSK modem into continuous mode. This disables packet engine and gives direct access to demodulator.
  • configure DIO1 pin to DCLK function, and DIO2 pin to DATA function:
    • dio command to list current DIO pin asignments
    • d1 to cycle DIO1 function until Dclk is selected
    • d2 for DIO2, only Data function is available in FSK continuous mode
  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • rx to start receiver
  • stby to disable receiver

Full command list

Arguments shown in square brackets [] indicate required. <> are optional, where leaving off the argument usually causes a read of the item, and providing the value causes a write operation. You should always have the radio chip datasheet on-hand when using these commands.

Hitting <enter> key by itself will repeat last command.
<Ctrl-C> will cancel an operation in progress.

command list: common commands (both LoRa and FSK)

commanddescription
. (period)print current radio status
?list available commands
Ltoggle active radio modem (LoRa vs FSK)
hhardware reset, put radio into default power-on condition
frf<MHz>get/set RF operating frequency
rxstart radio receiver (any received packets are printed onto your serial terminal)
rssiread instantaneous RSSI (level read at the time command is issued)
tx<%d>transmit test packet. Packet length value can be provided as argument, or uses last value if not provided
payl<%d>get/set payload length
bw<KHz>get/set bandwidth. In LoRa mode, both receive and transmit bandwidth are changed. For FSK, only receive bandwidth is affected. bwa accesses AFC bandwidth in FSK
pastoggle RFO / PA_BOOST transmit pin output selection
op<dBm>get/set TX output power. Value is provided in dBm. Special case is value of 20dBm (on PA_BOOST), which causes increase in TX DAC voltage
ocp<mA>get/set TX current limit, in milliamps. Necessary adjustment when +20dBm is used
dioshow DIO pin assignments
d<0-5>change DIO pin assignment, the pin number is given as arguement. Each pin has up to 4 possible functions
pres<%d>set preamble length. LoRa: number of symbols. FSK: number of bytes
crcontoggle crcOn
lnabcycle LNA-boost setting (receiver performance adjustment)
Rread all radio registers (use only while reading chip datasheet)
r[%x]read single radio register (use only while reading chip datasheet)
w[%x %x]write single radio register (use only while reading chip datasheet)
pllbwchange PLL bandwidth
stbyset chip mode to standby
sleepset chip mode to sleep
fstxset chip mode to fstx
fsrxset chip mode to fsrx
Eiger range test commandsdescription
pid<%d>get set ID number in range test payload
pertx<%d>start Eiger PER transmit. The count of packets to send is provided as arguement
perrxstart Eiger PER receive
txpd<%d>get/set tx delay between PER packets transmitted

command list: LoRa modem commands

LoRa commandLoRa description
iqinvtoggle RX IQ invert
cintoggle TX IQ invert
lhp<%d>(RX) get/set hop period
sync<%x>get/set sync (post-preamble gap, single byte)
cr<1-4>get/set codingRate
lhmtoggle explicit/implicit (explicit mode sends payload length with each packet)
sf<%d>get/set spreadingFactor (SF7 to SF12)
ldrtoggle LowDataRateOptimize (changes payload encoding, for long packets)
txctoggle TxContinuousMode
rxt<%d>get/set SymbTimeout
rxsstart RX_SINGLE (receives only for SymbTimeout symbols)
cad<%d num tries>run channel activity detection

command list: FSK modem commands

FSK commandFSK description
c<%d>get/set test cases. Several FSK bitrates/bandwidths pre-configured to give optimal performance.
fdev<kHz>(TX) get/set frequency deviation
mods(TX) increment modulation shaping
par(TX) increment paRamp
datamtoggle DataMode (packet/continuous)
fifottoggle TxStartCondition (FifoThreshold level vs FifoNotEmpty)
br<%f kbps>get/set bitrate
dcfincrement DcFree (manchester / whitening)
pktftoggle PacketFormat fixed/variable length
syncontoggle SyncOn (frame sync, SFD enable)
bitsynctoggle BitSyncOn (continuous mode only)
syncw<hex bytes>get/set syncword. Sync bytes are provided by hex octects separated by spaces.
fei(RX) read FEI
rxt(RX) increment RxTrigger (RX start on rssi vs. preamble detect)
rssit<-dBm>(RX) get/set rssi threshold (trigger level for RSSI interrupt)
rssis<%d>(RX) get/set rssi smoothing
rssio<%d>(RX) get/set rssi offset
agcauto(RX) toggle AgcAutoOn (true = LNA gain set automatically)
afcauto(RX) toggle AfcAutoOn
ac(RX) AfcClear
ar(RX) increment AutoRestartRxMode
alc(RX) toggle AfcAutoClearOn (only if AfcAutoOn is set)
prep(RX) toggle PreamblePolarity (0xAA vs 0x55)
pde(RX) toggle PreambleDetectorOn
pds<%d>(RX) get/set PreambleDetectorSize
pdt<%d>(RX) get/set PreambleDetectorTol
mp(RX) toggle MapPreambleDetect (DIO function RSSI vs PreambleDetect)
thr<%d>get/set FifoThreshold (triggers FifoLevel interrupt)
polltoggle poll_irq_en. Radio events read from DIO pins vs polling of IrqFlags register
Eempty out FIFO
clkoutincrement ClkOut divider
ookenter OOK mode
ooktincrement OokThreshType
ooksincrement OokPeakTheshStep
sqlch<%d>get/set OokFixedThresh
Committer:
dudmuck
Date:
Thu Apr 20 11:15:08 2017 -0700
Revision:
23:821b4f426ee6
Parent:
22:2005df80c8a8
Child:
24:9ba45aa15b53
update constructors for updated radio-driver library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 1:1cd0afbed23c 1 #include "sx127x_lora.h"
dudmuck 1:1cd0afbed23c 2 #include "sx127x_fsk.h"
dudmuck 19:be8a8b0e7320 3 #define __STDC_FORMAT_MACROS
dudmuck 19:be8a8b0e7320 4 #include <inttypes.h>
dudmuck 22:2005df80c8a8 5
dudmuck 18:9530d682fd9a 6 //#include "kermit.h"
dudmuck 0:be215de91a68 7
dudmuck 13:c73caaee93a5 8 //#define FSK_PER
dudmuck 10:d9bb2ce57f05 9 //#define START_EIGER_RX
dudmuck 10:d9bb2ce57f05 10 //#define START_EIGER_TX
dudmuck 21:b84a77dfb43c 11 //#define START_OOK_TX_TEST
dudmuck 10:d9bb2ce57f05 12
dudmuck 23:821b4f426ee6 13 /* on B-L072Z-LRWAN1 use target NUCLEO-L073RZ, and for correct baudrate must install SB36 and remove C24 */
dudmuck 23:821b4f426ee6 14 #define TYPE_ABZ
dudmuck 22:2005df80c8a8 15
dudmuck 10:d9bb2ce57f05 16 DigitalOut led1(LED1);
dudmuck 0:be215de91a68 17 Serial pc(USBTX, USBRX);
dudmuck 0:be215de91a68 18
dudmuck 0:be215de91a68 19 uint8_t tx_cnt;
dudmuck 0:be215de91a68 20 char pcbuf[64];
dudmuck 5:360069ec9953 21 int pcbuf_len;
dudmuck 0:be215de91a68 22
dudmuck 0:be215de91a68 23 typedef enum {
dudmuck 0:be215de91a68 24 APP_NONE = 0,
dudmuck 0:be215de91a68 25 APP_CHAT
dudmuck 0:be215de91a68 26 } app_e;
dudmuck 0:be215de91a68 27
dudmuck 0:be215de91a68 28 app_e app = APP_NONE;
dudmuck 0:be215de91a68 29
dudmuck 18:9530d682fd9a 30 #define FSK_LARGE_PKT_THRESHOLD 0x3f
dudmuck 7:c3c54f222ced 31
dudmuck 21:b84a77dfb43c 32 bool crc32_en; // ethcrc
dudmuck 21:b84a77dfb43c 33
dudmuck 21:b84a77dfb43c 34 /*********** cmd_ulrx()... ************/
dudmuck 21:b84a77dfb43c 35 typedef enum {
dudmuck 21:b84a77dfb43c 36 ULRX_STATE_OFF = 0,
dudmuck 21:b84a77dfb43c 37 ULRX_STATE_NEED_LENGTH,
dudmuck 21:b84a77dfb43c 38 ULRX_STATE_PAYLOAD,
dudmuck 21:b84a77dfb43c 39 ULRX_STATE_SYNC1
dudmuck 21:b84a77dfb43c 40 } ulrx_state_e;
dudmuck 21:b84a77dfb43c 41 ulrx_state_e ulrx_state = ULRX_STATE_OFF;
dudmuck 21:b84a77dfb43c 42 bool ulrx_enable;
dudmuck 21:b84a77dfb43c 43 /*********** ...cmd_ulrx() ************/
dudmuck 21:b84a77dfb43c 44
dudmuck 21:b84a77dfb43c 45 uint8_t rx_payload_idx;
dudmuck 21:b84a77dfb43c 46
dudmuck 21:b84a77dfb43c 47 /************** fsk modeReady isr... **********/
dudmuck 21:b84a77dfb43c 48 bool rx_payloadReady_int_en; // cmd_prrx()
dudmuck 21:b84a77dfb43c 49 #define N_RX_PKTS 32
dudmuck 21:b84a77dfb43c 50 #define RX_PKT_SIZE_LIMIT 32
dudmuck 21:b84a77dfb43c 51 uint8_t rx_pkts[N_RX_PKTS][RX_PKT_SIZE_LIMIT];
dudmuck 21:b84a77dfb43c 52 uint8_t n_rx_pkts;
dudmuck 21:b84a77dfb43c 53 /************** ...fsk modeReady isr **********/
dudmuck 21:b84a77dfb43c 54
dudmuck 21:b84a77dfb43c 55 #ifdef TARGET_STM
dudmuck 21:b84a77dfb43c 56 CRC_HandleTypeDef CrcHandle;
dudmuck 21:b84a77dfb43c 57 #endif /* TARGET_STM */
dudmuck 21:b84a77dfb43c 58
dudmuck 21:b84a77dfb43c 59 int rssi_polling_thresh; // 0 = polling off
dudmuck 18:9530d682fd9a 60 bool ook_test_en;
dudmuck 18:9530d682fd9a 61 bool poll_irq_en;
dudmuck 20:b11592c9ba5f 62 volatile RegIrqFlags2_t fsk_RegIrqFlags2_prev;
dudmuck 20:b11592c9ba5f 63 volatile RegIrqFlags1_t fsk_RegIrqFlags1_prev;
dudmuck 20:b11592c9ba5f 64 Timer rx_start_timer;
dudmuck 20:b11592c9ba5f 65 uint32_t secs_rx_start;
dudmuck 1:1cd0afbed23c 66
dudmuck 8:227605e4a760 67 /***************************** eiger per: *************************************************/
dudmuck 8:227605e4a760 68
dudmuck 18:9530d682fd9a 69 uint32_t num_cads;
dudmuck 18:9530d682fd9a 70 bool cadper_enable;
dudmuck 8:227605e4a760 71 bool per_en;
dudmuck 8:227605e4a760 72 float per_tx_delay = 0.1;
dudmuck 8:227605e4a760 73 int per_id;
dudmuck 18:9530d682fd9a 74 uint32_t PacketTxCnt, PacketTxCntEnd;
dudmuck 8:227605e4a760 75 uint32_t PacketPerOkCnt;
dudmuck 8:227605e4a760 76 int PacketRxSequencePrev;
dudmuck 8:227605e4a760 77 uint32_t PacketPerKoCnt;
dudmuck 8:227605e4a760 78 uint32_t PacketNormalCnt;
dudmuck 8:227605e4a760 79 Timeout per_timeout;
dudmuck 8:227605e4a760 80
dudmuck 18:9530d682fd9a 81
dudmuck 18:9530d682fd9a 82
dudmuck 0:be215de91a68 83 /******************************************************************************/
dudmuck 9:2f13a9ef27b4 84 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 9:2f13a9ef27b4 85 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 23:821b4f426ee6 86 //SX127x radio(LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1);
dudmuck 23:821b4f426ee6 87 SPI spi(LORA_MOSI, LORA_MISO, LORA_SCK); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 88 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 89 SX127x radio(LORA_DIO0, LORA_DIO1, LORA_NSS, spi, LORA_RESET); // multitech mdot
dudmuck 23:821b4f426ee6 90
dudmuck 23:821b4f426ee6 91 DigitalIn dio3(LORA_DIO3);
dudmuck 9:2f13a9ef27b4 92 DigitalOut txctl(LORA_TXCTL);
dudmuck 9:2f13a9ef27b4 93 DigitalOut rxctl(LORA_RXCTL);
dudmuck 9:2f13a9ef27b4 94
dudmuck 9:2f13a9ef27b4 95 void rfsw_callback()
dudmuck 9:2f13a9ef27b4 96 {
dudmuck 9:2f13a9ef27b4 97 /* SKY13350 */
dudmuck 9:2f13a9ef27b4 98 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission
dudmuck 9:2f13a9ef27b4 99 txctl = 1;
dudmuck 9:2f13a9ef27b4 100 rxctl = 0;
dudmuck 9:2f13a9ef27b4 101 } else { // reception:
dudmuck 9:2f13a9ef27b4 102 txctl = 0;
dudmuck 9:2f13a9ef27b4 103 rxctl = 1;
dudmuck 9:2f13a9ef27b4 104 }
dudmuck 9:2f13a9ef27b4 105 }
dudmuck 9:2f13a9ef27b4 106
dudmuck 15:c69b942685ea 107 #define FSK_RSSI_OFFSET 0
dudmuck 15:c69b942685ea 108 #define FSK_RSSI_SMOOTHING 2
dudmuck 20:b11592c9ba5f 109 DigitalIn dio2(LORA_DIO2);
dudmuck 20:b11592c9ba5f 110 DigitalIn dio4(LORA_DIO4);
dudmuck 15:c69b942685ea 111
dudmuck 22:2005df80c8a8 112 #elif defined(TARGET_NUCLEO_L073RZ) && defined(TYPE_ABZ) /********************* ...mDot **********************/
dudmuck 23:821b4f426ee6 113 /* Murata TypeABZ discovery board B-L072Z-LRWAN1 */
dudmuck 22:2005df80c8a8 114 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 23:821b4f426ee6 115 //SX127x radio(PA_7, PA_6, PB_3, PA_15, PC_0, PB_4, PB_1);
dudmuck 23:821b4f426ee6 116
dudmuck 23:821b4f426ee6 117 SPI spi(PA_7, PA_6, PB_3); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 118 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 119 SX127x radio(PB_4, PB_1, PA_15, spi, PC_0); // sx1276 arduino shield
dudmuck 23:821b4f426ee6 120
dudmuck 22:2005df80c8a8 121 DigitalIn dio2(PB_0);
dudmuck 22:2005df80c8a8 122 DigitalIn dio3(PC_13);
dudmuck 22:2005df80c8a8 123 #define FSK_RSSI_OFFSET 0
dudmuck 22:2005df80c8a8 124 #define FSK_RSSI_SMOOTHING 2
dudmuck 22:2005df80c8a8 125 #define CRF1 PA_1
dudmuck 22:2005df80c8a8 126 #define CRF2 PC_2
dudmuck 22:2005df80c8a8 127 #define CRF3 PC_1
dudmuck 22:2005df80c8a8 128 DigitalOut Vctl1(CRF1);
dudmuck 22:2005df80c8a8 129 DigitalOut Vctl2(CRF2);
dudmuck 22:2005df80c8a8 130 DigitalOut Vctl3(CRF3);
dudmuck 22:2005df80c8a8 131
dudmuck 22:2005df80c8a8 132 void rfsw_callback()
dudmuck 22:2005df80c8a8 133 {
dudmuck 22:2005df80c8a8 134 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 22:2005df80c8a8 135 Vctl1 = 0;
dudmuck 22:2005df80c8a8 136 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 22:2005df80c8a8 137 Vctl2 = 0;
dudmuck 22:2005df80c8a8 138 Vctl3 = 1;
dudmuck 22:2005df80c8a8 139 } else {
dudmuck 22:2005df80c8a8 140 Vctl2 = 1;
dudmuck 22:2005df80c8a8 141 Vctl3 = 0;
dudmuck 22:2005df80c8a8 142 }
dudmuck 22:2005df80c8a8 143 } else {
dudmuck 22:2005df80c8a8 144 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE)
dudmuck 22:2005df80c8a8 145 Vctl1 = 1;
dudmuck 22:2005df80c8a8 146 else
dudmuck 22:2005df80c8a8 147 Vctl1 = 0;
dudmuck 22:2005df80c8a8 148
dudmuck 22:2005df80c8a8 149 Vctl2 = 0;
dudmuck 22:2005df80c8a8 150 Vctl3 = 0;
dudmuck 22:2005df80c8a8 151 }
dudmuck 22:2005df80c8a8 152 }
dudmuck 22:2005df80c8a8 153 #else /***************** ..Type-ABZ and L073RZ *************/
dudmuck 23:821b4f426ee6 154 SPI spi(D11, D12, D13); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 155 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 156 SX127x radio( D2, D3, D10, spi, A0); // sx1276 arduino shield
dudmuck 0:be215de91a68 157
dudmuck 15:c69b942685ea 158 // for SX1276 arduino shield:
dudmuck 7:c3c54f222ced 159 #ifdef TARGET_LPC11U6X
dudmuck 15:c69b942685ea 160 DigitalInOut rfsw(P0_23);
dudmuck 7:c3c54f222ced 161 #else
dudmuck 15:c69b942685ea 162 DigitalInOut rfsw(A4);
dudmuck 7:c3c54f222ced 163 #endif
dudmuck 6:fe16f96ee335 164
dudmuck 21:b84a77dfb43c 165 InterruptIn dio0int(D2);
dudmuck 21:b84a77dfb43c 166 InterruptIn dio1int(D3);
dudmuck 21:b84a77dfb43c 167 InterruptIn dio2int(D4);
dudmuck 21:b84a77dfb43c 168 InterruptIn dio4int(D8);
dudmuck 14:c57ea544dc18 169 DigitalIn dio2(D4);
dudmuck 21:b84a77dfb43c 170 DigitalIn dio3(D5);
dudmuck 20:b11592c9ba5f 171 DigitalIn dio4(D8);
dudmuck 22:2005df80c8a8 172 DigitalIn dio5(D9);
dudmuck 22:2005df80c8a8 173
dudmuck 22:2005df80c8a8 174 #if defined(TARGET_STM)
dudmuck 21:b84a77dfb43c 175 DigitalOut pc3(PC_3); // nucleo corner pin for misc indication
dudmuck 21:b84a77dfb43c 176 #endif
dudmuck 21:b84a77dfb43c 177
dudmuck 6:fe16f96ee335 178 void rfsw_callback()
dudmuck 6:fe16f96ee335 179 {
dudmuck 6:fe16f96ee335 180 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER)
dudmuck 6:fe16f96ee335 181 rfsw = 1;
dudmuck 6:fe16f96ee335 182 else
dudmuck 6:fe16f96ee335 183 rfsw = 0;
dudmuck 6:fe16f96ee335 184 }
dudmuck 6:fe16f96ee335 185
dudmuck 15:c69b942685ea 186 #define FSK_RSSI_OFFSET 5
dudmuck 15:c69b942685ea 187 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 188
dudmuck 15:c69b942685ea 189 typedef enum {
dudmuck 15:c69b942685ea 190 SHIELD_TYPE_NONE = 0,
dudmuck 15:c69b942685ea 191 SHIELD_TYPE_LAS,
dudmuck 15:c69b942685ea 192 SHIELD_TYPE_MAS,
dudmuck 15:c69b942685ea 193 } shield_type_e;
dudmuck 15:c69b942685ea 194 shield_type_e shield_type;
dudmuck 15:c69b942685ea 195
dudmuck 9:2f13a9ef27b4 196 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 9:2f13a9ef27b4 197
dudmuck 9:2f13a9ef27b4 198 SX127x_fsk fsk(radio);
dudmuck 9:2f13a9ef27b4 199 SX127x_lora lora(radio);
dudmuck 18:9530d682fd9a 200 //Kermit kermit(lora);
dudmuck 9:2f13a9ef27b4 201
dudmuck 22:2005df80c8a8 202 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 203 volatile bool saved_dio4;
dudmuck 22:2005df80c8a8 204 #endif
dudmuck 20:b11592c9ba5f 205
dudmuck 21:b84a77dfb43c 206 uint32_t crcTable[256];
dudmuck 21:b84a77dfb43c 207 void make_crc_table()
dudmuck 21:b84a77dfb43c 208 {
dudmuck 21:b84a77dfb43c 209 const uint32_t POLYNOMIAL = 0xEDB88320;
dudmuck 21:b84a77dfb43c 210 uint32_t remainder;
dudmuck 21:b84a77dfb43c 211 uint8_t b = 0;
dudmuck 21:b84a77dfb43c 212 do{
dudmuck 21:b84a77dfb43c 213 // Start with the data byte
dudmuck 21:b84a77dfb43c 214 remainder = b;
dudmuck 21:b84a77dfb43c 215 for (unsigned long bit = 8; bit > 0; --bit)
dudmuck 21:b84a77dfb43c 216 {
dudmuck 21:b84a77dfb43c 217 if (remainder & 1)
dudmuck 21:b84a77dfb43c 218 remainder = (remainder >> 1) ^ POLYNOMIAL;
dudmuck 21:b84a77dfb43c 219 else
dudmuck 21:b84a77dfb43c 220 remainder = (remainder >> 1);
dudmuck 21:b84a77dfb43c 221 }
dudmuck 21:b84a77dfb43c 222 crcTable[(size_t)b] = remainder;
dudmuck 21:b84a77dfb43c 223 } while(0 != ++b);
dudmuck 21:b84a77dfb43c 224 }
dudmuck 21:b84a77dfb43c 225
dudmuck 21:b84a77dfb43c 226 uint32_t gen_crc(const uint8_t *p, size_t n)
dudmuck 21:b84a77dfb43c 227 {
dudmuck 21:b84a77dfb43c 228 uint32_t crc = 0xffffffff;
dudmuck 21:b84a77dfb43c 229 size_t i;
dudmuck 21:b84a77dfb43c 230 for(i = 0; i < n; i++) {
dudmuck 21:b84a77dfb43c 231 crc = crcTable[*p++ ^ (crc&0xff)] ^ (crc>>8);
dudmuck 21:b84a77dfb43c 232 }
dudmuck 21:b84a77dfb43c 233
dudmuck 21:b84a77dfb43c 234 return(~crc);
dudmuck 21:b84a77dfb43c 235 }
dudmuck 21:b84a77dfb43c 236
dudmuck 21:b84a77dfb43c 237
dudmuck 0:be215de91a68 238 void printLoraIrqs_(bool clear)
dudmuck 0:be215de91a68 239 {
dudmuck 0:be215de91a68 240 //in radio class -- RegIrqFlags_t RegIrqFlags;
dudmuck 0:be215de91a68 241
dudmuck 0:be215de91a68 242 //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 243 printf("\r\nIrqFlags:");
dudmuck 1:1cd0afbed23c 244 if (lora.RegIrqFlags.bits.CadDetected)
dudmuck 0:be215de91a68 245 printf("CadDetected ");
dudmuck 1:1cd0afbed23c 246 if (lora.RegIrqFlags.bits.FhssChangeChannel) {
dudmuck 0:be215de91a68 247 //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 1:1cd0afbed23c 248 printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 0:be215de91a68 249 }
dudmuck 1:1cd0afbed23c 250 if (lora.RegIrqFlags.bits.CadDone)
dudmuck 0:be215de91a68 251 printf("CadDone ");
dudmuck 1:1cd0afbed23c 252 if (lora.RegIrqFlags.bits.TxDone)
dudmuck 0:be215de91a68 253 printf("TxDone ");
dudmuck 1:1cd0afbed23c 254 if (lora.RegIrqFlags.bits.ValidHeader)
dudmuck 0:be215de91a68 255 printf("ValidHeader ");
dudmuck 1:1cd0afbed23c 256 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 0:be215de91a68 257 printf("PayloadCrcError ");
dudmuck 1:1cd0afbed23c 258 if (lora.RegIrqFlags.bits.RxDone)
dudmuck 0:be215de91a68 259 printf("RxDone ");
dudmuck 1:1cd0afbed23c 260 if (lora.RegIrqFlags.bits.RxTimeout)
dudmuck 0:be215de91a68 261 printf("RxTimeout ");
dudmuck 0:be215de91a68 262
dudmuck 0:be215de91a68 263 printf("\r\n");
dudmuck 0:be215de91a68 264
dudmuck 0:be215de91a68 265 if (clear)
dudmuck 1:1cd0afbed23c 266 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 0:be215de91a68 267
dudmuck 0:be215de91a68 268 }
dudmuck 0:be215de91a68 269
dudmuck 1:1cd0afbed23c 270 void lora_printCodingRate(bool from_rx)
dudmuck 0:be215de91a68 271 {
dudmuck 1:1cd0afbed23c 272 uint8_t d = lora.getCodingRate(from_rx);
dudmuck 0:be215de91a68 273 printf("CodingRate:");
dudmuck 0:be215de91a68 274 switch (d) {
dudmuck 0:be215de91a68 275 case 1: printf("4/5 "); break;
dudmuck 0:be215de91a68 276 case 2: printf("4/6 "); break;
dudmuck 0:be215de91a68 277 case 3: printf("4/7 "); break;
dudmuck 0:be215de91a68 278 case 4: printf("4/8 "); break;
dudmuck 0:be215de91a68 279 default:
dudmuck 0:be215de91a68 280 printf("%d ", d);
dudmuck 0:be215de91a68 281 break;
dudmuck 0:be215de91a68 282 }
dudmuck 0:be215de91a68 283 }
dudmuck 0:be215de91a68 284
dudmuck 1:1cd0afbed23c 285 void lora_printHeaderMode()
dudmuck 0:be215de91a68 286 {
dudmuck 1:1cd0afbed23c 287 if (lora.getHeaderMode())
dudmuck 0:be215de91a68 288 printf("implicit ");
dudmuck 0:be215de91a68 289 else
dudmuck 0:be215de91a68 290 printf("explicit ");
dudmuck 0:be215de91a68 291 }
dudmuck 0:be215de91a68 292
dudmuck 1:1cd0afbed23c 293 void lora_printBw()
dudmuck 0:be215de91a68 294 {
dudmuck 19:be8a8b0e7320 295 (void)lora.getBw();
dudmuck 0:be215de91a68 296
dudmuck 0:be215de91a68 297 printf("Bw:");
dudmuck 0:be215de91a68 298 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 299 switch (lora.RegModemConfig.sx1276bits.Bw) {
dudmuck 0:be215de91a68 300 case 0: printf("7.8KHz "); break;
dudmuck 0:be215de91a68 301 case 1: printf("10.4KHz "); break;
dudmuck 0:be215de91a68 302 case 2: printf("15.6KHz "); break;
dudmuck 0:be215de91a68 303 case 3: printf("20.8KHz "); break;
dudmuck 0:be215de91a68 304 case 4: printf("31.25KHz "); break;
dudmuck 0:be215de91a68 305 case 5: printf("41.7KHz "); break;
dudmuck 0:be215de91a68 306 case 6: printf("62.5KHz "); break;
dudmuck 0:be215de91a68 307 case 7: printf("125KHz "); break;
dudmuck 0:be215de91a68 308 case 8: printf("250KHz "); break;
dudmuck 0:be215de91a68 309 case 9: printf("500KHz "); break;
dudmuck 1:1cd0afbed23c 310 default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break;
dudmuck 0:be215de91a68 311 }
dudmuck 0:be215de91a68 312 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 313 switch (lora.RegModemConfig.sx1272bits.Bw) {
dudmuck 0:be215de91a68 314 case 0: printf("125KHz "); break;
dudmuck 0:be215de91a68 315 case 1: printf("250KHz "); break;
dudmuck 0:be215de91a68 316 case 2: printf("500KHz "); break;
dudmuck 0:be215de91a68 317 case 3: printf("11b "); break;
dudmuck 0:be215de91a68 318 }
dudmuck 0:be215de91a68 319 }
dudmuck 0:be215de91a68 320 }
dudmuck 0:be215de91a68 321
dudmuck 1:1cd0afbed23c 322 void lora_printAllBw()
dudmuck 0:be215de91a68 323 {
dudmuck 0:be215de91a68 324 int i, s;
dudmuck 0:be215de91a68 325
dudmuck 0:be215de91a68 326 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 327 s = lora.RegModemConfig.sx1276bits.Bw;
dudmuck 0:be215de91a68 328 for (i = 0; i < 10; i++ ) {
dudmuck 1:1cd0afbed23c 329 lora.RegModemConfig.sx1276bits.Bw = i;
dudmuck 0:be215de91a68 330 printf("%d ", i);
dudmuck 1:1cd0afbed23c 331 lora_printBw();
dudmuck 0:be215de91a68 332 printf("\r\n");
dudmuck 0:be215de91a68 333 }
dudmuck 1:1cd0afbed23c 334 lora.RegModemConfig.sx1276bits.Bw = s;
dudmuck 0:be215de91a68 335 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 336 s = lora.RegModemConfig.sx1272bits.Bw;
dudmuck 0:be215de91a68 337 for (i = 0; i < 3; i++ ) {
dudmuck 1:1cd0afbed23c 338 lora.RegModemConfig.sx1272bits.Bw = i;
dudmuck 0:be215de91a68 339 printf("%d ", i);
dudmuck 1:1cd0afbed23c 340 lora_printBw();
dudmuck 0:be215de91a68 341 printf("\r\n");
dudmuck 0:be215de91a68 342 }
dudmuck 1:1cd0afbed23c 343 lora.RegModemConfig.sx1272bits.Bw = s;
dudmuck 0:be215de91a68 344 }
dudmuck 0:be215de91a68 345 }
dudmuck 0:be215de91a68 346
dudmuck 1:1cd0afbed23c 347 void lora_printSf()
dudmuck 0:be215de91a68 348 {
dudmuck 0:be215de91a68 349 // spreading factor same between sx127[26]
dudmuck 1:1cd0afbed23c 350 printf("sf:%d ", lora.getSf());
dudmuck 0:be215de91a68 351 }
dudmuck 0:be215de91a68 352
dudmuck 1:1cd0afbed23c 353 void lora_printRxPayloadCrcOn()
dudmuck 0:be215de91a68 354 {
dudmuck 1:1cd0afbed23c 355 bool on = lora.getRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 356 printf("RxPayloadCrcOn:%d = ", on);
dudmuck 18:9530d682fd9a 357 if (lora.getHeaderMode())
dudmuck 18:9530d682fd9a 358 printf("Rx/"); // implicit mode
dudmuck 18:9530d682fd9a 359
dudmuck 0:be215de91a68 360 if (on)
dudmuck 18:9530d682fd9a 361 printf("Tx CRC Enabled\r\n");
dudmuck 0:be215de91a68 362 else
dudmuck 18:9530d682fd9a 363 printf("Tx CRC disabled\r\n");
dudmuck 0:be215de91a68 364 }
dudmuck 0:be215de91a68 365
dudmuck 1:1cd0afbed23c 366 void lora_printTxContinuousMode()
dudmuck 0:be215de91a68 367 {
dudmuck 1:1cd0afbed23c 368 printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276
dudmuck 0:be215de91a68 369 }
dudmuck 0:be215de91a68 370
dudmuck 1:1cd0afbed23c 371 void lora_printAgcAutoOn()
dudmuck 0:be215de91a68 372 {
dudmuck 1:1cd0afbed23c 373 printf("AgcAutoOn:%d", lora.getAgcAutoOn());
dudmuck 0:be215de91a68 374 }
dudmuck 0:be215de91a68 375
dudmuck 1:1cd0afbed23c 376 void lora_print_dio()
dudmuck 0:be215de91a68 377 {
dudmuck 1:1cd0afbed23c 378 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 0:be215de91a68 379 printf("DIO5:");
dudmuck 0:be215de91a68 380 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 0:be215de91a68 381 case 0: printf("ModeReady"); break;
dudmuck 0:be215de91a68 382 case 1: printf("ClkOut"); break;
dudmuck 0:be215de91a68 383 case 2: printf("ClkOut"); break;
dudmuck 0:be215de91a68 384 }
dudmuck 0:be215de91a68 385 printf(" DIO4:");
dudmuck 0:be215de91a68 386 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 0:be215de91a68 387 case 0: printf("CadDetected"); break;
dudmuck 0:be215de91a68 388 case 1: printf("PllLock"); break;
dudmuck 0:be215de91a68 389 case 2: printf("PllLock"); break;
dudmuck 0:be215de91a68 390 }
dudmuck 0:be215de91a68 391 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 0:be215de91a68 392 printf(" DIO3:");
dudmuck 0:be215de91a68 393 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 0:be215de91a68 394 case 0: printf("CadDone"); break;
dudmuck 0:be215de91a68 395 case 1: printf("ValidHeader"); break;
dudmuck 0:be215de91a68 396 case 2: printf("PayloadCrcError"); break;
dudmuck 0:be215de91a68 397 }
dudmuck 0:be215de91a68 398 printf(" DIO2:");
dudmuck 0:be215de91a68 399 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 0:be215de91a68 400 case 0:
dudmuck 0:be215de91a68 401 case 1:
dudmuck 0:be215de91a68 402 case 2:
dudmuck 0:be215de91a68 403 printf("FhssChangeChannel");
dudmuck 0:be215de91a68 404 break;
dudmuck 0:be215de91a68 405 }
dudmuck 0:be215de91a68 406 printf(" DIO1:");
dudmuck 0:be215de91a68 407 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 0:be215de91a68 408 case 0: printf("RxTimeout"); break;
dudmuck 0:be215de91a68 409 case 1: printf("FhssChangeChannel"); break;
dudmuck 0:be215de91a68 410 case 2: printf("CadDetected"); break;
dudmuck 0:be215de91a68 411 }
dudmuck 0:be215de91a68 412 printf(" DIO0:");
dudmuck 0:be215de91a68 413 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 0:be215de91a68 414 case 0: printf("RxDone"); break;
dudmuck 0:be215de91a68 415 case 1: printf("TxDone"); break;
dudmuck 0:be215de91a68 416 case 2: printf("CadDone"); break;
dudmuck 0:be215de91a68 417 }
dudmuck 0:be215de91a68 418
dudmuck 0:be215de91a68 419 printf("\r\n");
dudmuck 0:be215de91a68 420 }
dudmuck 0:be215de91a68 421
dudmuck 1:1cd0afbed23c 422 void fsk_print_dio()
dudmuck 1:1cd0afbed23c 423 {
dudmuck 1:1cd0afbed23c 424 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 1:1cd0afbed23c 425
dudmuck 2:c6b23a43a9d9 426 printf("DIO5:");
dudmuck 1:1cd0afbed23c 427 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 1:1cd0afbed23c 428 case 0: printf("ClkOut"); break;
dudmuck 1:1cd0afbed23c 429 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 430 case 2:
dudmuck 1:1cd0afbed23c 431 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 1:1cd0afbed23c 432 printf("data");
dudmuck 1:1cd0afbed23c 433 else {
dudmuck 1:1cd0afbed23c 434 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 435 printf("preamble");
dudmuck 1:1cd0afbed23c 436 else
dudmuck 1:1cd0afbed23c 437 printf("rssi");
dudmuck 1:1cd0afbed23c 438 }
dudmuck 1:1cd0afbed23c 439 break;
dudmuck 1:1cd0afbed23c 440 case 3: printf("ModeReady"); break;
dudmuck 1:1cd0afbed23c 441 }
dudmuck 1:1cd0afbed23c 442
dudmuck 2:c6b23a43a9d9 443 printf(" DIO4:");
dudmuck 1:1cd0afbed23c 444 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 1:1cd0afbed23c 445 case 0: printf("temp/eol"); break;
dudmuck 1:1cd0afbed23c 446 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 447 case 2: printf("TimeOut"); break;
dudmuck 1:1cd0afbed23c 448 case 3:
dudmuck 1:1cd0afbed23c 449 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 450 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 451 printf("preamble");
dudmuck 1:1cd0afbed23c 452 else
dudmuck 1:1cd0afbed23c 453 printf("rssi");
dudmuck 1:1cd0afbed23c 454 } else
dudmuck 1:1cd0afbed23c 455 printf("ModeReady");
dudmuck 1:1cd0afbed23c 456 break;
dudmuck 1:1cd0afbed23c 457 }
dudmuck 1:1cd0afbed23c 458
dudmuck 1:1cd0afbed23c 459 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 1:1cd0afbed23c 460
dudmuck 2:c6b23a43a9d9 461 printf(" DIO3:");
dudmuck 21:b84a77dfb43c 462 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 21:b84a77dfb43c 463 if (radio.RegDioMapping1.bits.Dio3Mapping == 1)
dudmuck 21:b84a77dfb43c 464 printf("TxReady");
dudmuck 21:b84a77dfb43c 465 else
dudmuck 21:b84a77dfb43c 466 printf("FifoEmpty");
dudmuck 21:b84a77dfb43c 467 } else {
dudmuck 21:b84a77dfb43c 468 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 21:b84a77dfb43c 469 case 0: printf("Timeout"); break;
dudmuck 21:b84a77dfb43c 470 case 1:
dudmuck 21:b84a77dfb43c 471 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 21:b84a77dfb43c 472 printf("preamble");
dudmuck 21:b84a77dfb43c 473 else
dudmuck 21:b84a77dfb43c 474 printf("rssi");
dudmuck 21:b84a77dfb43c 475 break;
dudmuck 21:b84a77dfb43c 476 case 2: printf("?automode_status?"); break;
dudmuck 21:b84a77dfb43c 477 case 3: printf("TempChange/LowBat"); break;
dudmuck 21:b84a77dfb43c 478 }
dudmuck 1:1cd0afbed23c 479 }
dudmuck 1:1cd0afbed23c 480
dudmuck 2:c6b23a43a9d9 481 printf(" DIO2:");
dudmuck 1:1cd0afbed23c 482 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 483 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 1:1cd0afbed23c 484 case 0: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 485 case 1: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 486 case 2: printf("FifoFull/rx-timeout"); break;
dudmuck 1:1cd0afbed23c 487 case 3: printf("FifoFull/rx-syncadrs"); break;
dudmuck 1:1cd0afbed23c 488 }
dudmuck 1:1cd0afbed23c 489 } else {
dudmuck 1:1cd0afbed23c 490 printf("Data");
dudmuck 1:1cd0afbed23c 491 }
dudmuck 1:1cd0afbed23c 492
dudmuck 2:c6b23a43a9d9 493 printf(" DIO1:");
dudmuck 1:1cd0afbed23c 494 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 495 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 496 case 0: printf("FifoThresh"); break;
dudmuck 1:1cd0afbed23c 497 case 1: printf("FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 498 case 2: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 499 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 500 }
dudmuck 1:1cd0afbed23c 501 } else {
dudmuck 1:1cd0afbed23c 502 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 503 case 0: printf("Dclk"); break;
dudmuck 1:1cd0afbed23c 504 case 1:
dudmuck 1:1cd0afbed23c 505 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 506 printf("preamble");
dudmuck 1:1cd0afbed23c 507 else
dudmuck 1:1cd0afbed23c 508 printf("rssi");
dudmuck 1:1cd0afbed23c 509 break;
dudmuck 1:1cd0afbed23c 510 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 511 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 512 }
dudmuck 1:1cd0afbed23c 513 }
dudmuck 1:1cd0afbed23c 514
dudmuck 2:c6b23a43a9d9 515 printf(" DIO0:");
dudmuck 1:1cd0afbed23c 516 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 517 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 518 case 0: printf("PayloadReady/PacketSent"); break;
dudmuck 1:1cd0afbed23c 519 case 1: printf("CrcOk"); break;
dudmuck 1:1cd0afbed23c 520 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 521 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 522 }
dudmuck 1:1cd0afbed23c 523 } else {
dudmuck 1:1cd0afbed23c 524 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 525 case 0: printf("SyncAdrs/TxReady"); break;
dudmuck 1:1cd0afbed23c 526 case 1:
dudmuck 1:1cd0afbed23c 527 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 528 printf("preamble");
dudmuck 1:1cd0afbed23c 529 else
dudmuck 1:1cd0afbed23c 530 printf("rssi");
dudmuck 1:1cd0afbed23c 531 break;
dudmuck 1:1cd0afbed23c 532 case 2: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 533 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 534 }
dudmuck 1:1cd0afbed23c 535 }
dudmuck 1:1cd0afbed23c 536 printf("\r\n");
dudmuck 1:1cd0afbed23c 537 }
dudmuck 1:1cd0afbed23c 538
dudmuck 0:be215de91a68 539 void lora_print_status()
dudmuck 15:c69b942685ea 540 {
dudmuck 0:be215de91a68 541 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 542 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 0:be215de91a68 543 printf("FSK\r\n");
dudmuck 0:be215de91a68 544 return;
dudmuck 0:be215de91a68 545 }
dudmuck 0:be215de91a68 546
dudmuck 1:1cd0afbed23c 547 lora_print_dio();
dudmuck 0:be215de91a68 548 printf("LoRa ");
dudmuck 0:be215de91a68 549
dudmuck 0:be215de91a68 550 // printing LoRa registers at 0x0d -> 0x3f
dudmuck 0:be215de91a68 551
dudmuck 1:1cd0afbed23c 552 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 1:1cd0afbed23c 553 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 0:be215de91a68 554
dudmuck 1:1cd0afbed23c 555 lora_printCodingRate(false); // false: transmitted coding rate
dudmuck 1:1cd0afbed23c 556 lora_printHeaderMode();
dudmuck 1:1cd0afbed23c 557 lora_printBw();
dudmuck 1:1cd0afbed23c 558 lora_printSf();
dudmuck 1:1cd0afbed23c 559 lora_printRxPayloadCrcOn();
dudmuck 0:be215de91a68 560 // RegModemStat
dudmuck 0:be215de91a68 561 printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT));
dudmuck 0:be215de91a68 562
dudmuck 0:be215de91a68 563 // fifo ptrs:
dudmuck 1:1cd0afbed23c 564 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 1:1cd0afbed23c 565 lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH);
dudmuck 0:be215de91a68 566 printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x",
dudmuck 0:be215de91a68 567 radio.read_reg(REG_LR_FIFOADDRPTR),
dudmuck 0:be215de91a68 568 radio.read_reg(REG_LR_FIFOTXBASEADDR),
dudmuck 0:be215de91a68 569 radio.read_reg(REG_LR_FIFORXBASEADDR),
dudmuck 1:1cd0afbed23c 570 lora.RegPayloadLength,
dudmuck 1:1cd0afbed23c 571 lora.RegRxMaxPayloadLength
dudmuck 0:be215de91a68 572 );
dudmuck 0:be215de91a68 573
dudmuck 1:1cd0afbed23c 574 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 575 printLoraIrqs_(false);
dudmuck 0:be215de91a68 576
dudmuck 1:1cd0afbed23c 577 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 1:1cd0afbed23c 578 if (lora.RegHopPeriod != 0) {
dudmuck 1:1cd0afbed23c 579 printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 0:be215de91a68 580 }
dudmuck 0:be215de91a68 581
dudmuck 18:9530d682fd9a 582 printf("SymbTimeout:%d ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff);
dudmuck 0:be215de91a68 583
dudmuck 1:1cd0afbed23c 584 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 4:7a9007dfc0e5 585 printf("PreambleLength:%d ", lora.RegPreamble);
dudmuck 0:be215de91a68 586
dudmuck 0:be215de91a68 587 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) {
dudmuck 15:c69b942685ea 588 printf("rssi:%ddBm ", lora.get_current_rssi());
dudmuck 0:be215de91a68 589 }
dudmuck 0:be215de91a68 590
dudmuck 1:1cd0afbed23c 591 lora_printTxContinuousMode();
dudmuck 0:be215de91a68 592
dudmuck 0:be215de91a68 593 printf("\r\n");
dudmuck 1:1cd0afbed23c 594 lora_printAgcAutoOn();
dudmuck 0:be215de91a68 595 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 596 printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 597 }
dudmuck 0:be215de91a68 598
dudmuck 0:be215de91a68 599 printf("\r\nHeaderCount:%d PacketCount:%d, ",
dudmuck 0:be215de91a68 600 radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB));
dudmuck 0:be215de91a68 601
dudmuck 0:be215de91a68 602 printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD));
dudmuck 1:1cd0afbed23c 603 lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31);
dudmuck 1:1cd0afbed23c 604 printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb);
dudmuck 0:be215de91a68 605
dudmuck 0:be215de91a68 606 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 607 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 6:fe16f96ee335 608 printf("LowDataRateOptimize:%d ", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 609 } else if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 610 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 6:fe16f96ee335 611 printf("LowDataRateOptimize:%d ", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 612 }
dudmuck 0:be215de91a68 613
dudmuck 6:fe16f96ee335 614 printf(" invert: rx=%d tx=%d\r\n", lora.RegTest33.bits.invert_i_q, !lora.RegTest33.bits.chirp_invert_tx);
dudmuck 6:fe16f96ee335 615
dudmuck 0:be215de91a68 616 printf("\r\n");
dudmuck 0:be215de91a68 617 //printf("A %02x\r\n", radio.RegModemConfig2.octet);
dudmuck 0:be215de91a68 618 }
dudmuck 0:be215de91a68 619
dudmuck 1:1cd0afbed23c 620 uint16_t
dudmuck 1:1cd0afbed23c 621 fsk_get_PayloadLength(void)
dudmuck 1:1cd0afbed23c 622 {
dudmuck 1:1cd0afbed23c 623 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 624
dudmuck 1:1cd0afbed23c 625 return fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 1:1cd0afbed23c 626 }
dudmuck 1:1cd0afbed23c 627
dudmuck 1:1cd0afbed23c 628 void fsk_printAddressFiltering()
dudmuck 1:1cd0afbed23c 629 {
dudmuck 1:1cd0afbed23c 630 uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs;
dudmuck 1:1cd0afbed23c 631
dudmuck 1:1cd0afbed23c 632 printf(" AddressFiltering:");
dudmuck 1:1cd0afbed23c 633 switch (fsk.RegPktConfig1.bits.AddressFiltering) {
dudmuck 1:1cd0afbed23c 634 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 635 case 1: // NodeAddress
dudmuck 1:1cd0afbed23c 636 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 6:fe16f96ee335 637 printf("NodeAdrs:%02x\r\n", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 638 break;
dudmuck 1:1cd0afbed23c 639 case 2: // NodeAddress & BroadcastAddress
dudmuck 1:1cd0afbed23c 640 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 1:1cd0afbed23c 641 printf("NodeAdrs:%02x ", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 642 FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS);
dudmuck 6:fe16f96ee335 643 printf("BroadcastAdrs:%02x\r\n", FSKRegBroadcastAdrs );
dudmuck 1:1cd0afbed23c 644 break;
dudmuck 1:1cd0afbed23c 645 default:
dudmuck 1:1cd0afbed23c 646 printf("%d", fsk.RegPktConfig1.bits.AddressFiltering);
dudmuck 1:1cd0afbed23c 647 break;
dudmuck 1:1cd0afbed23c 648 }
dudmuck 1:1cd0afbed23c 649 }
dudmuck 1:1cd0afbed23c 650
dudmuck 1:1cd0afbed23c 651 void fsk_print_IrqFlags2()
dudmuck 1:1cd0afbed23c 652 {
dudmuck 2:c6b23a43a9d9 653 RegIrqFlags2_t RegIrqFlags2;
dudmuck 1:1cd0afbed23c 654
dudmuck 1:1cd0afbed23c 655 printf("IrqFlags2: ");
dudmuck 2:c6b23a43a9d9 656 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:c6b23a43a9d9 657 if (RegIrqFlags2.bits.FifoFull)
dudmuck 1:1cd0afbed23c 658 printf("FifoFull ");
dudmuck 2:c6b23a43a9d9 659 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 1:1cd0afbed23c 660 printf("FifoEmpty ");
dudmuck 2:c6b23a43a9d9 661 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 1:1cd0afbed23c 662 printf("FifoLevel ");
dudmuck 2:c6b23a43a9d9 663 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 1:1cd0afbed23c 664 printf("FifoOverrun ");
dudmuck 2:c6b23a43a9d9 665 if (RegIrqFlags2.bits.PacketSent)
dudmuck 1:1cd0afbed23c 666 printf("PacketSent ");
dudmuck 2:c6b23a43a9d9 667 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 1:1cd0afbed23c 668 printf("PayloadReady ");
dudmuck 2:c6b23a43a9d9 669 if (RegIrqFlags2.bits.CrcOk)
dudmuck 1:1cd0afbed23c 670 printf("CrcOk ");
dudmuck 2:c6b23a43a9d9 671 if (RegIrqFlags2.bits.LowBat)
dudmuck 1:1cd0afbed23c 672 printf("LowBat ");
dudmuck 2:c6b23a43a9d9 673 printf("\r\n");
dudmuck 1:1cd0afbed23c 674 }
dudmuck 1:1cd0afbed23c 675
dudmuck 1:1cd0afbed23c 676 void
dudmuck 1:1cd0afbed23c 677 fsk_print_status()
dudmuck 1:1cd0afbed23c 678 {
dudmuck 1:1cd0afbed23c 679 //uint16_t s;
dudmuck 2:c6b23a43a9d9 680 RegIrqFlags1_t RegIrqFlags1;
dudmuck 1:1cd0afbed23c 681
dudmuck 1:1cd0afbed23c 682 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 1:1cd0afbed23c 683 printf("LoRa\r\n");
dudmuck 1:1cd0afbed23c 684 return;
dudmuck 1:1cd0afbed23c 685 }
dudmuck 1:1cd0afbed23c 686
dudmuck 1:1cd0afbed23c 687 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 1:1cd0afbed23c 688 printf("FSK ");
dudmuck 1:1cd0afbed23c 689 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 1:1cd0afbed23c 690 case 1: printf("BT1.0 "); break;
dudmuck 1:1cd0afbed23c 691 case 2: printf("BT0.5 "); break;
dudmuck 1:1cd0afbed23c 692 case 3: printf("BT0.3 "); break;
dudmuck 1:1cd0afbed23c 693 }
dudmuck 1:1cd0afbed23c 694 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 1:1cd0afbed23c 695 printf("OOK ");
dudmuck 18:9530d682fd9a 696 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 18:9530d682fd9a 697 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 698 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 699 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 700 }
dudmuck 1:1cd0afbed23c 701 }
dudmuck 1:1cd0afbed23c 702
dudmuck 19:be8a8b0e7320 703 printf("%" PRIu32 "bps fdev:%" PRIu32 "Hz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 1:1cd0afbed23c 704
dudmuck 1:1cd0afbed23c 705 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 706
dudmuck 1:1cd0afbed23c 707 fsk_print_dio();
dudmuck 1:1cd0afbed23c 708
dudmuck 19:be8a8b0e7320 709 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 710 printf("afcbw:%" PRIu32 "Hz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW));
dudmuck 1:1cd0afbed23c 711
dudmuck 1:1cd0afbed23c 712 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 1:1cd0afbed23c 713 printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1));
dudmuck 1:1cd0afbed23c 714
dudmuck 1:1cd0afbed23c 715
dudmuck 1:1cd0afbed23c 716 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 1:1cd0afbed23c 717
dudmuck 1:1cd0afbed23c 718 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 719 uint16_t len;
dudmuck 1:1cd0afbed23c 720 /* packet mode */
dudmuck 1:1cd0afbed23c 721 len = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 722 printf("packet RegPayloadLength:0x%03x ", len);
dudmuck 1:1cd0afbed23c 723
dudmuck 1:1cd0afbed23c 724 if (fsk.RegPktConfig2.bits.BeaconOn)
dudmuck 1:1cd0afbed23c 725 printf("BeaconOn ");
dudmuck 1:1cd0afbed23c 726
dudmuck 1:1cd0afbed23c 727 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 1:1cd0afbed23c 728 printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 1:1cd0afbed23c 729 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 1:1cd0afbed23c 730 printf("!FifoEmpty");
dudmuck 1:1cd0afbed23c 731 else
dudmuck 1:1cd0afbed23c 732 printf("FifoLevel");
dudmuck 1:1cd0afbed23c 733
dudmuck 1:1cd0afbed23c 734 printf("\r\nAutoRestartRxMode:");
dudmuck 1:1cd0afbed23c 735 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 1:1cd0afbed23c 736 case 0: printf("off "); break;
dudmuck 1:1cd0afbed23c 737 case 1: printf("no-pll-wait "); break;
dudmuck 1:1cd0afbed23c 738 case 2: printf("pll-wait "); break;
dudmuck 1:1cd0afbed23c 739 case 3: printf("3 "); break;
dudmuck 1:1cd0afbed23c 740 }
dudmuck 1:1cd0afbed23c 741 //...todo
dudmuck 1:1cd0afbed23c 742
dudmuck 1:1cd0afbed23c 743 printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 1:1cd0afbed23c 744
dudmuck 1:1cd0afbed23c 745 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 1:1cd0afbed23c 746 if (fsk.RegOokPeak.bits.barker_en)
dudmuck 1:1cd0afbed23c 747 printf("barker ");
dudmuck 1:1cd0afbed23c 748 if (!fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 1:1cd0afbed23c 749 printf("BitSyncOff ");
dudmuck 1:1cd0afbed23c 750 //...todo
dudmuck 1:1cd0afbed23c 751
dudmuck 1:1cd0afbed23c 752 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 1:1cd0afbed23c 753 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 1:1cd0afbed23c 754 printf("variable");
dudmuck 1:1cd0afbed23c 755 else
dudmuck 1:1cd0afbed23c 756 printf("fixed");
dudmuck 1:1cd0afbed23c 757 printf("-length\r\ncrc");
dudmuck 1:1cd0afbed23c 758 if (fsk.RegPktConfig1.bits.CrcOn) {
dudmuck 1:1cd0afbed23c 759 printf("On");
dudmuck 1:1cd0afbed23c 760 } else
dudmuck 1:1cd0afbed23c 761 printf("Off");
dudmuck 1:1cd0afbed23c 762 printf(" crctype:");
dudmuck 1:1cd0afbed23c 763 if (fsk.RegPktConfig1.bits.CrCWhiteningType)
dudmuck 1:1cd0afbed23c 764 printf("IBM");
dudmuck 1:1cd0afbed23c 765 else
dudmuck 1:1cd0afbed23c 766 printf("CCITT");
dudmuck 1:1cd0afbed23c 767 printf(" dcFree:");
dudmuck 1:1cd0afbed23c 768 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 1:1cd0afbed23c 769 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 770 case 1: printf("Manchester "); break;
dudmuck 1:1cd0afbed23c 771 case 2: printf("Whitening "); break;
dudmuck 1:1cd0afbed23c 772 case 3: printf("reserved "); break;
dudmuck 1:1cd0afbed23c 773 }
dudmuck 1:1cd0afbed23c 774 fsk_printAddressFiltering();
dudmuck 1:1cd0afbed23c 775
dudmuck 1:1cd0afbed23c 776 printf("\r\n");
dudmuck 1:1cd0afbed23c 777 fsk_print_IrqFlags2();
dudmuck 1:1cd0afbed23c 778 } else {
dudmuck 1:1cd0afbed23c 779 /* continuous mode */
dudmuck 1:1cd0afbed23c 780 printf("continuous ");
dudmuck 1:1cd0afbed23c 781 }
dudmuck 1:1cd0afbed23c 782
dudmuck 1:1cd0afbed23c 783 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 1:1cd0afbed23c 784 printf("PreambleDetect:");
dudmuck 1:1cd0afbed23c 785 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) {
dudmuck 1:1cd0afbed23c 786 printf("size=%d,tol=%d ",
dudmuck 1:1cd0afbed23c 787 fsk.RegPreambleDetect.bits.PreambleDetectorSize,
dudmuck 1:1cd0afbed23c 788 fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 1:1cd0afbed23c 789 } else
dudmuck 1:1cd0afbed23c 790 printf("Off ");
dudmuck 1:1cd0afbed23c 791
dudmuck 18:9530d682fd9a 792 if (fsk.RegSyncConfig.bits.SyncOn) {
dudmuck 18:9530d682fd9a 793 printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 794 printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1));
dudmuck 18:9530d682fd9a 795 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2));
dudmuck 18:9530d682fd9a 796 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3));
dudmuck 18:9530d682fd9a 797 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4));
dudmuck 18:9530d682fd9a 798 } else
dudmuck 18:9530d682fd9a 799 printf("Sync Off");
dudmuck 1:1cd0afbed23c 800 printf("\r\n"); // end sync config
dudmuck 1:1cd0afbed23c 801
dudmuck 1:1cd0afbed23c 802 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 1:1cd0afbed23c 803 printf("afcAutoClear:");
dudmuck 1:1cd0afbed23c 804 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 1:1cd0afbed23c 805 printf("On");
dudmuck 1:1cd0afbed23c 806 else
dudmuck 1:1cd0afbed23c 807 printf("OFF");
dudmuck 1:1cd0afbed23c 808 printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 1:1cd0afbed23c 809
dudmuck 1:1cd0afbed23c 810 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 1:1cd0afbed23c 811
dudmuck 1:1cd0afbed23c 812 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 1:1cd0afbed23c 813 printf("RxTrigger:");
dudmuck 1:1cd0afbed23c 814 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 1:1cd0afbed23c 815 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 816 case 1: printf("rssi "); break;
dudmuck 1:1cd0afbed23c 817 case 6: printf("preamble "); break;
dudmuck 1:1cd0afbed23c 818 case 7: printf("both "); break;
dudmuck 1:1cd0afbed23c 819 default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break;
dudmuck 1:1cd0afbed23c 820 }
dudmuck 1:1cd0afbed23c 821 printf("AfcAuto:");
dudmuck 1:1cd0afbed23c 822 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 1:1cd0afbed23c 823 printf("On ");
dudmuck 1:1cd0afbed23c 824 else
dudmuck 1:1cd0afbed23c 825 printf("OFF ");
dudmuck 15:c69b942685ea 826
dudmuck 15:c69b942685ea 827 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 1:1cd0afbed23c 828 if (!fsk.RegRxConfig.bits.AgcAutoOn) {
dudmuck 1:1cd0afbed23c 829 printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain);
dudmuck 1:1cd0afbed23c 830 }
dudmuck 15:c69b942685ea 831 printf("LnaBoostHF:%d ", radio.RegLna.bits.LnaBoostHF);
dudmuck 1:1cd0afbed23c 832
dudmuck 1:1cd0afbed23c 833 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 834 if (fsk.RegTimerResol.bits.hlm_started)
dudmuck 1:1cd0afbed23c 835 printf("hlm_started ");
dudmuck 1:1cd0afbed23c 836 else
dudmuck 1:1cd0afbed23c 837 printf("hlm_stopped ");
dudmuck 1:1cd0afbed23c 838
dudmuck 1:1cd0afbed23c 839 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 840 printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 841
dudmuck 1:1cd0afbed23c 842 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 1:1cd0afbed23c 843 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER ||
dudmuck 1:1cd0afbed23c 844 radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX)
dudmuck 1:1cd0afbed23c 845 {
dudmuck 1:1cd0afbed23c 846 printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 1:1cd0afbed23c 847 }
dudmuck 1:1cd0afbed23c 848
dudmuck 1:1cd0afbed23c 849 fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1);
dudmuck 1:1cd0afbed23c 850 printf("\r\nsequencer: ");
dudmuck 1:1cd0afbed23c 851 printf("FromStart:");
dudmuck 1:1cd0afbed23c 852 switch (fsk.RegSeqConfig1.bits.FromStart) {
dudmuck 1:1cd0afbed23c 853 case 0:
dudmuck 1:1cd0afbed23c 854 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 855 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 856 printf("idle");
dudmuck 1:1cd0afbed23c 857 else
dudmuck 1:1cd0afbed23c 858 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 859 break;
dudmuck 1:1cd0afbed23c 860 case 1: printf("rx"); break;
dudmuck 1:1cd0afbed23c 861 case 2: printf("tx"); break;
dudmuck 1:1cd0afbed23c 862 case 3: printf("tx on fifolevel"); break;
dudmuck 1:1cd0afbed23c 863 }
dudmuck 1:1cd0afbed23c 864 printf(" lowPowerSelection:");
dudmuck 1:1cd0afbed23c 865 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 866 printf("idle");
dudmuck 1:1cd0afbed23c 867 else
dudmuck 1:1cd0afbed23c 868 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 869 if (fsk.RegSeqConfig1.bits.FromStart != 0 &&
dudmuck 1:1cd0afbed23c 870 fsk.RegSeqConfig1.bits.LowPowerSelection != 0)
dudmuck 1:1cd0afbed23c 871 { // if sequencer enabled:
dudmuck 1:1cd0afbed23c 872 printf("\r\nsequencer: IdleMode:");
dudmuck 1:1cd0afbed23c 873 if (fsk.RegSeqConfig1.bits.IdleMode)
dudmuck 1:1cd0afbed23c 874 printf("Sleep");
dudmuck 1:1cd0afbed23c 875 else
dudmuck 1:1cd0afbed23c 876 printf("standby");
dudmuck 1:1cd0afbed23c 877 printf("\r\nsequencer: FromIdle to:");
dudmuck 1:1cd0afbed23c 878 if (fsk.RegSeqConfig1.bits.FromIdle)
dudmuck 1:1cd0afbed23c 879 printf("rx");
dudmuck 1:1cd0afbed23c 880 else
dudmuck 1:1cd0afbed23c 881 printf("tx");
dudmuck 1:1cd0afbed23c 882 printf("\r\nsequencer: FromTransmit to:");
dudmuck 1:1cd0afbed23c 883 if (fsk.RegSeqConfig1.bits.FromTransmit)
dudmuck 1:1cd0afbed23c 884 printf("rx-on-PacketSent");
dudmuck 1:1cd0afbed23c 885 else {
dudmuck 1:1cd0afbed23c 886 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 887 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 888 printf("idle");
dudmuck 1:1cd0afbed23c 889 else
dudmuck 1:1cd0afbed23c 890 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 891 printf("-on-PacketSent");
dudmuck 1:1cd0afbed23c 892 }
dudmuck 1:1cd0afbed23c 893 fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2);
dudmuck 1:1cd0afbed23c 894 printf("\r\nsequencer: FromReceive:");
dudmuck 1:1cd0afbed23c 895 switch (fsk.RegSeqConfig2.bits.FromReceive) {
dudmuck 1:1cd0afbed23c 896 case 1: printf("PacketRecevied on PayloadReady"); break;
dudmuck 1:1cd0afbed23c 897 case 2:
dudmuck 1:1cd0afbed23c 898 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 899 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 900 printf("idle");
dudmuck 1:1cd0afbed23c 901 else
dudmuck 1:1cd0afbed23c 902 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 903 printf("-on-payloadReady");
dudmuck 1:1cd0afbed23c 904 break;
dudmuck 1:1cd0afbed23c 905 case 3: printf("PacketRecevied-on-CrcOk"); break;
dudmuck 1:1cd0afbed23c 906 case 4: printf("SequencerOff-on-Rssi"); break;
dudmuck 1:1cd0afbed23c 907 case 5: printf("SequencerOff-on-SyncAddress"); break;
dudmuck 1:1cd0afbed23c 908 case 6: printf("SequencerOff-PreambleDetect"); break;
dudmuck 1:1cd0afbed23c 909 default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break;
dudmuck 1:1cd0afbed23c 910 }
dudmuck 1:1cd0afbed23c 911 printf("\r\nsequencer: FromRxTimeout:");
dudmuck 1:1cd0afbed23c 912 switch (fsk.RegSeqConfig2.bits.FromRxTimeout) {
dudmuck 1:1cd0afbed23c 913 case 0: printf("rx"); break;
dudmuck 1:1cd0afbed23c 914 case 1: printf("tx"); break;
dudmuck 1:1cd0afbed23c 915 case 2:
dudmuck 1:1cd0afbed23c 916 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 917 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 918 printf("idle");
dudmuck 1:1cd0afbed23c 919 else
dudmuck 1:1cd0afbed23c 920 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 921 break;
dudmuck 1:1cd0afbed23c 922 case 3: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 923 }
dudmuck 1:1cd0afbed23c 924 printf("\r\nsequencer: FromPacketReceived to:");
dudmuck 1:1cd0afbed23c 925 switch (fsk.RegSeqConfig2.bits.FromPacketReceived) {
dudmuck 1:1cd0afbed23c 926 case 0: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 927 case 1: printf("tx on FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 928 case 2:
dudmuck 1:1cd0afbed23c 929 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 930 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 931 printf("idle");
dudmuck 1:1cd0afbed23c 932 else
dudmuck 1:1cd0afbed23c 933 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 934 break;
dudmuck 1:1cd0afbed23c 935 case 3: printf("rx via fs"); break;
dudmuck 1:1cd0afbed23c 936 case 4: printf("rx"); break;
dudmuck 1:1cd0afbed23c 937 }
dudmuck 1:1cd0afbed23c 938
dudmuck 1:1cd0afbed23c 939 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 940 printf("\r\nsequencer: timer1:");
dudmuck 1:1cd0afbed23c 941 switch (fsk.RegTimerResol.bits.timer1_resol) {
dudmuck 1:1cd0afbed23c 942 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 943 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break;
dudmuck 1:1cd0afbed23c 944 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 945 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 946 }
dudmuck 1:1cd0afbed23c 947
dudmuck 1:1cd0afbed23c 948 printf(" timer2:");
dudmuck 1:1cd0afbed23c 949 switch (fsk.RegTimerResol.bits.timer2_resol) {
dudmuck 1:1cd0afbed23c 950 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 951 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break;
dudmuck 1:1cd0afbed23c 952 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 953 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 954 }
dudmuck 1:1cd0afbed23c 955 } // ..if sequencer enabled
dudmuck 1:1cd0afbed23c 956
dudmuck 1:1cd0afbed23c 957 printf("\r\nIrqFlags1:");
dudmuck 2:c6b23a43a9d9 958 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 2:c6b23a43a9d9 959 if (RegIrqFlags1.bits.ModeReady)
dudmuck 1:1cd0afbed23c 960 printf("ModeReady ");
dudmuck 2:c6b23a43a9d9 961 if (RegIrqFlags1.bits.RxReady)
dudmuck 1:1cd0afbed23c 962 printf("RxReady ");
dudmuck 2:c6b23a43a9d9 963 if (RegIrqFlags1.bits.TxReady)
dudmuck 1:1cd0afbed23c 964 printf("TxReady ");
dudmuck 2:c6b23a43a9d9 965 if (RegIrqFlags1.bits.PllLock)
dudmuck 1:1cd0afbed23c 966 printf("PllLock ");
dudmuck 2:c6b23a43a9d9 967 if (RegIrqFlags1.bits.Rssi)
dudmuck 1:1cd0afbed23c 968 printf("Rssi ");
dudmuck 2:c6b23a43a9d9 969 if (RegIrqFlags1.bits.Timeout)
dudmuck 1:1cd0afbed23c 970 printf("Timeout ");
dudmuck 2:c6b23a43a9d9 971 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 1:1cd0afbed23c 972 printf("PreambleDetect ");
dudmuck 2:c6b23a43a9d9 973 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 1:1cd0afbed23c 974 printf("SyncAddressMatch ");
dudmuck 1:1cd0afbed23c 975
dudmuck 1:1cd0afbed23c 976 printf("\r\n");
dudmuck 1:1cd0afbed23c 977
dudmuck 1:1cd0afbed23c 978 /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format:
dudmuck 1:1cd0afbed23c 979 s = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 980 if (s > FSK_LARGE_PKT_THRESHOLD)
dudmuck 1:1cd0afbed23c 981 flags.fifo_flow_ctl = 1;
dudmuck 1:1cd0afbed23c 982 else
dudmuck 1:1cd0afbed23c 983 flags.fifo_flow_ctl = 0;
dudmuck 1:1cd0afbed23c 984 }*/
dudmuck 1:1cd0afbed23c 985
dudmuck 1:1cd0afbed23c 986 fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL);
dudmuck 1:1cd0afbed23c 987 if (fsk.RegImageCal.bits.TempMonitorOff) {
dudmuck 1:1cd0afbed23c 988 printf("TempMonitorOff[\r0m\n");
dudmuck 1:1cd0afbed23c 989 } else {
dudmuck 1:1cd0afbed23c 990 printf("TempThreshold:");
dudmuck 1:1cd0afbed23c 991 switch (fsk.RegImageCal.bits.TempThreshold) {
dudmuck 1:1cd0afbed23c 992 case 0: printf("5C"); break;
dudmuck 1:1cd0afbed23c 993 case 1: printf("10C"); break;
dudmuck 1:1cd0afbed23c 994 case 2: printf("15C"); break;
dudmuck 1:1cd0afbed23c 995 case 3: printf("20C"); break;
dudmuck 1:1cd0afbed23c 996 }
dudmuck 1:1cd0afbed23c 997 printf("\r\n");
dudmuck 1:1cd0afbed23c 998 }
dudmuck 1:1cd0afbed23c 999 if (fsk.RegImageCal.bits.ImageCalRunning)
dudmuck 1:1cd0afbed23c 1000 printf("ImageCalRunning[\r0m\n");
dudmuck 21:b84a77dfb43c 1001
dudmuck 21:b84a77dfb43c 1002 if (rx_payloadReady_int_en) {
dudmuck 22:2005df80c8a8 1003 #ifdef TYPE_ABZ
dudmuck 22:2005df80c8a8 1004 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u\r\n", n_rx_pkts, dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 1005 #else
dudmuck 21:b84a77dfb43c 1006 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u,%u\r\n", n_rx_pkts, dio4.read(), dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 1007 #endif
dudmuck 21:b84a77dfb43c 1008 }
dudmuck 1:1cd0afbed23c 1009 }
dudmuck 1:1cd0afbed23c 1010
dudmuck 0:be215de91a68 1011 void printOpMode()
dudmuck 0:be215de91a68 1012 {
dudmuck 0:be215de91a68 1013 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 1014 switch (radio.RegOpMode.bits.Mode) {
dudmuck 0:be215de91a68 1015 case RF_OPMODE_SLEEP: printf("sleep"); break;
dudmuck 0:be215de91a68 1016 case RF_OPMODE_STANDBY: printf("stby"); break;
dudmuck 0:be215de91a68 1017 case RF_OPMODE_SYNTHESIZER_TX: printf("fstx"); break;
dudmuck 0:be215de91a68 1018 case RF_OPMODE_TRANSMITTER: printf("tx"); break;
dudmuck 0:be215de91a68 1019 case RF_OPMODE_SYNTHESIZER_RX: printf("fsrx"); break;
dudmuck 0:be215de91a68 1020 case RF_OPMODE_RECEIVER: printf("rx"); break;
dudmuck 0:be215de91a68 1021 case 6:
dudmuck 0:be215de91a68 1022 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1023 printf("rxs");
dudmuck 0:be215de91a68 1024 else
dudmuck 0:be215de91a68 1025 printf("-6-");
dudmuck 0:be215de91a68 1026 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1027 case 7:
dudmuck 0:be215de91a68 1028 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1029 printf("cad");
dudmuck 0:be215de91a68 1030 else
dudmuck 0:be215de91a68 1031 printf("-7-");
dudmuck 0:be215de91a68 1032 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1033 }
dudmuck 0:be215de91a68 1034 }
dudmuck 0:be215de91a68 1035
dudmuck 0:be215de91a68 1036 void
dudmuck 0:be215de91a68 1037 printPa()
dudmuck 0:be215de91a68 1038 {
dudmuck 0:be215de91a68 1039 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 0:be215de91a68 1040 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 0:be215de91a68 1041 float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 1042 printf(" PABOOST OutputPower=%.1fdBm", output_dBm);
dudmuck 0:be215de91a68 1043 } else {
dudmuck 0:be215de91a68 1044 float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8;
dudmuck 0:be215de91a68 1045 float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 20:b11592c9ba5f 1046 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 20:b11592c9ba5f 1047 printf(" \x1b[31mRFO pmax=%.1fdBm OutputPower=%.1fdBm\x1b[0m", pmax, output_dBm); // not connected
dudmuck 20:b11592c9ba5f 1048 #else
dudmuck 0:be215de91a68 1049 printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm);
dudmuck 20:b11592c9ba5f 1050 #endif
dudmuck 0:be215de91a68 1051 }
dudmuck 0:be215de91a68 1052 }
dudmuck 0:be215de91a68 1053
dudmuck 0:be215de91a68 1054 void /* things always present, whether lora or fsk */
dudmuck 0:be215de91a68 1055 common_print_status()
dudmuck 0:be215de91a68 1056 {
dudmuck 0:be215de91a68 1057 printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz());
dudmuck 0:be215de91a68 1058 printOpMode();
dudmuck 0:be215de91a68 1059
dudmuck 0:be215de91a68 1060 printPa();
dudmuck 0:be215de91a68 1061
dudmuck 0:be215de91a68 1062 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 0:be215de91a68 1063 if (radio.RegOcp.bits.OcpOn) {
dudmuck 0:be215de91a68 1064 int imax = 0;
dudmuck 0:be215de91a68 1065 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 0:be215de91a68 1066 imax = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1067 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 0:be215de91a68 1068 imax = -30 + (10 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1069 else
dudmuck 0:be215de91a68 1070 imax = 240;
dudmuck 0:be215de91a68 1071 printf(" OcpOn %dmA ", imax);
dudmuck 0:be215de91a68 1072 } else
dudmuck 0:be215de91a68 1073 printf(" OcpOFF ");
dudmuck 0:be215de91a68 1074
dudmuck 0:be215de91a68 1075 printf("\r\n");
dudmuck 8:227605e4a760 1076
dudmuck 8:227605e4a760 1077 if (per_en) {
dudmuck 18:9530d682fd9a 1078 if (cadper_enable) {
dudmuck 19:be8a8b0e7320 1079 printf("cadper %" PRIu32 ", ", num_cads);
dudmuck 18:9530d682fd9a 1080 }
dudmuck 8:227605e4a760 1081 printf("per_tx_delay:%f\r\n", per_tx_delay);
dudmuck 8:227605e4a760 1082 printf("PER device ID:%d\r\n", per_id);
dudmuck 8:227605e4a760 1083 }
dudmuck 18:9530d682fd9a 1084
dudmuck 20:b11592c9ba5f 1085 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 1086 printf("poll_irq_en\r\n");
dudmuck 20:b11592c9ba5f 1087 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 20:b11592c9ba5f 1088 printf("saved irqs: %02x %02x\r\n", fsk_RegIrqFlags1_prev.octet, fsk_RegIrqFlags2_prev.octet);
dudmuck 20:b11592c9ba5f 1089 }
dudmuck 20:b11592c9ba5f 1090 }
dudmuck 0:be215de91a68 1091
dudmuck 0:be215de91a68 1092 }
dudmuck 0:be215de91a68 1093
dudmuck 0:be215de91a68 1094 void print_rx_buf(int len)
dudmuck 0:be215de91a68 1095 {
dudmuck 0:be215de91a68 1096 int i;
dudmuck 0:be215de91a68 1097
dudmuck 0:be215de91a68 1098 printf("000:");
dudmuck 0:be215de91a68 1099 for (i = 0; i < len; i++) {
dudmuck 0:be215de91a68 1100 //printf("(%d)%02x ", i % 16, rx_buf[i]);
dudmuck 0:be215de91a68 1101 printf("%02x ", radio.rx_buf[i]);
dudmuck 0:be215de91a68 1102 if (i % 16 == 15 && i != len-1)
dudmuck 0:be215de91a68 1103 printf("\r\n%03d:", i+1);
dudmuck 0:be215de91a68 1104
dudmuck 0:be215de91a68 1105 }
dudmuck 0:be215de91a68 1106 printf("\r\n");
dudmuck 0:be215de91a68 1107 }
dudmuck 0:be215de91a68 1108
dudmuck 21:b84a77dfb43c 1109 void lora_print_rx_verbose(uint8_t dlen)
dudmuck 7:c3c54f222ced 1110 {
dudmuck 7:c3c54f222ced 1111 float dbm;
dudmuck 7:c3c54f222ced 1112 printLoraIrqs_(false);
dudmuck 7:c3c54f222ced 1113 if (lora.RegHopPeriod > 0) {
dudmuck 7:c3c54f222ced 1114 lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 7:c3c54f222ced 1115 printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 7:c3c54f222ced 1116 }
dudmuck 7:c3c54f222ced 1117 printf("%dHz ", lora.get_freq_error_Hz());
dudmuck 7:c3c54f222ced 1118 lora_printCodingRate(true); // true: of received packet
dudmuck 7:c3c54f222ced 1119 dbm = lora.get_pkt_rssi();
dudmuck 7:c3c54f222ced 1120 printf(" crc%s %.1fdB %.1fdBm\r\n",
dudmuck 7:c3c54f222ced 1121 lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF",
dudmuck 7:c3c54f222ced 1122 lora.RegPktSnrValue / 4.0,
dudmuck 7:c3c54f222ced 1123 dbm
dudmuck 7:c3c54f222ced 1124 );
dudmuck 7:c3c54f222ced 1125 print_rx_buf(dlen);
dudmuck 18:9530d682fd9a 1126 }
dudmuck 7:c3c54f222ced 1127
dudmuck 18:9530d682fd9a 1128 void set_per_en(bool en)
dudmuck 18:9530d682fd9a 1129 {
dudmuck 18:9530d682fd9a 1130 if (en) {
dudmuck 18:9530d682fd9a 1131 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1132 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 1133 lora.RegModemConfig.sx1272bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1134 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 1135 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 1136 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1137 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 1138 }
dudmuck 18:9530d682fd9a 1139 lora.RegPayloadLength = 9;
dudmuck 18:9530d682fd9a 1140 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1141 radio.RegDioMapping1.bits.Dio3Mapping = 1; // to ValidHeader
dudmuck 18:9530d682fd9a 1142 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 1143 } else { // fsk..
dudmuck 18:9530d682fd9a 1144 //fsk_tx_length = 9;
dudmuck 7:c3c54f222ced 1145 }
dudmuck 20:b11592c9ba5f 1146 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 1147 //PacketRxSequence = 0;
dudmuck 18:9530d682fd9a 1148 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1149 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1150 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1151 } // ..if (per_en)
dudmuck 18:9530d682fd9a 1152 else {
dudmuck 18:9530d682fd9a 1153 per_timeout.detach();
dudmuck 18:9530d682fd9a 1154 }
dudmuck 18:9530d682fd9a 1155
dudmuck 18:9530d682fd9a 1156 per_en = en;
dudmuck 18:9530d682fd9a 1157 }
dudmuck 7:c3c54f222ced 1158
dudmuck 8:227605e4a760 1159 void per_cb()
dudmuck 8:227605e4a760 1160 {
dudmuck 8:227605e4a760 1161 int i;
dudmuck 8:227605e4a760 1162
dudmuck 8:227605e4a760 1163 PacketTxCnt++;
dudmuck 8:227605e4a760 1164
dudmuck 8:227605e4a760 1165 radio.tx_buf[0] = per_id;
dudmuck 8:227605e4a760 1166 radio.tx_buf[1] = PacketTxCnt >> 24;
dudmuck 8:227605e4a760 1167 radio.tx_buf[2] = PacketTxCnt >> 16;
dudmuck 8:227605e4a760 1168 radio.tx_buf[3] = PacketTxCnt >> 8;
dudmuck 8:227605e4a760 1169 radio.tx_buf[4] = PacketTxCnt;
dudmuck 8:227605e4a760 1170 radio.tx_buf[5] = 'P';
dudmuck 8:227605e4a760 1171 radio.tx_buf[6] = 'E';
dudmuck 8:227605e4a760 1172 radio.tx_buf[7] = 'R';
dudmuck 8:227605e4a760 1173 radio.tx_buf[8] = 0;
dudmuck 8:227605e4a760 1174 for (i = 0; i < 8; i++)
dudmuck 8:227605e4a760 1175 radio.tx_buf[8] += radio.tx_buf[i];
dudmuck 8:227605e4a760 1176
dudmuck 13:c73caaee93a5 1177 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 13:c73caaee93a5 1178 lora.start_tx(lora.RegPayloadLength);
dudmuck 13:c73caaee93a5 1179 } else {
dudmuck 13:c73caaee93a5 1180 fsk.start_tx(9);
dudmuck 13:c73caaee93a5 1181 }
dudmuck 10:d9bb2ce57f05 1182
dudmuck 10:d9bb2ce57f05 1183 led1 = !led1.read();
dudmuck 18:9530d682fd9a 1184
dudmuck 18:9530d682fd9a 1185 if (PacketTxCnt == PacketTxCntEnd) {
dudmuck 18:9530d682fd9a 1186 set_per_en(false);
dudmuck 18:9530d682fd9a 1187 return;
dudmuck 18:9530d682fd9a 1188 }
dudmuck 8:227605e4a760 1189 }
dudmuck 8:227605e4a760 1190
dudmuck 13:c73caaee93a5 1191 int per_parse_rx(uint8_t len)
dudmuck 13:c73caaee93a5 1192 {
dudmuck 13:c73caaee93a5 1193 if (len > 8 && radio.rx_buf[5] == 'P' && radio.rx_buf[6] == 'E' && radio.rx_buf[7] == 'R') {
dudmuck 13:c73caaee93a5 1194 int i;
dudmuck 13:c73caaee93a5 1195 float per;
dudmuck 13:c73caaee93a5 1196
dudmuck 13:c73caaee93a5 1197 /* this is PER packet */
dudmuck 19:be8a8b0e7320 1198 int PacketRxSequence = (radio.rx_buf[1] << 24) | (radio.rx_buf[2] << 16) | (radio.rx_buf[3] << 8) | radio.rx_buf[4];
dudmuck 13:c73caaee93a5 1199 PacketPerOkCnt++;
dudmuck 13:c73caaee93a5 1200
dudmuck 13:c73caaee93a5 1201 if( PacketRxSequence <= PacketRxSequencePrev )
dudmuck 13:c73caaee93a5 1202 { // Sequence went back => resynchronization
dudmuck 13:c73caaee93a5 1203 // dont count missed packets this time
dudmuck 13:c73caaee93a5 1204 i = 0;
dudmuck 13:c73caaee93a5 1205 }
dudmuck 13:c73caaee93a5 1206 else
dudmuck 13:c73caaee93a5 1207 {
dudmuck 13:c73caaee93a5 1208 // determine number of missed packets
dudmuck 13:c73caaee93a5 1209 i = PacketRxSequence - PacketRxSequencePrev - 1;
dudmuck 13:c73caaee93a5 1210 }
dudmuck 13:c73caaee93a5 1211
dudmuck 13:c73caaee93a5 1212 led1 = !led1.read();
dudmuck 13:c73caaee93a5 1213 // be ready for the next
dudmuck 13:c73caaee93a5 1214 PacketRxSequencePrev = PacketRxSequence;
dudmuck 13:c73caaee93a5 1215 // increment 'missed' counter for the RX session
dudmuck 13:c73caaee93a5 1216 PacketPerKoCnt += i;
dudmuck 18:9530d682fd9a 1217 per = ( (float)1.0 - ( float )PacketPerOkCnt / ( float )( PacketPerOkCnt + PacketPerKoCnt ) ) * (float)100.0;
dudmuck 19:be8a8b0e7320 1218 printf("%d, ok=%" PRIu32 " missed=%" PRIu32 " normal=%" PRIu32 " per:%.3f ", PacketRxSequence, PacketPerOkCnt, PacketPerKoCnt, PacketNormalCnt, per);
dudmuck 15:c69b942685ea 1219 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 15:c69b942685ea 1220 printf("pkt:%ddBm, snr:%.1fdB, %ddBm\r\n", lora.get_pkt_rssi(), lora.RegPktSnrValue / 4.0, lora.get_current_rssi());
dudmuck 15:c69b942685ea 1221 else {
dudmuck 16:b9d36c60f2d3 1222 wait_us(10000);
dudmuck 15:c69b942685ea 1223 printf(" -%.1fdBm\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 15:c69b942685ea 1224 }
dudmuck 15:c69b942685ea 1225
dudmuck 13:c73caaee93a5 1226 return 1;
dudmuck 13:c73caaee93a5 1227 } else {
dudmuck 13:c73caaee93a5 1228 return 0;
dudmuck 13:c73caaee93a5 1229 }
dudmuck 13:c73caaee93a5 1230 }
dudmuck 13:c73caaee93a5 1231
dudmuck 18:9530d682fd9a 1232 typedef enum {
dudmuck 18:9530d682fd9a 1233 ON_TXDONE_STATE_NONE = 0,
dudmuck 18:9530d682fd9a 1234 ON_TXDONE_STATE_SYNC_HI_NIBBLE,
dudmuck 18:9530d682fd9a 1235 ON_TXDONE_STATE_SYNC_LO_NIBBLE,
dudmuck 18:9530d682fd9a 1236 ON_TXDONE_STATE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1237 } on_txdone_state_e;
dudmuck 18:9530d682fd9a 1238
dudmuck 18:9530d682fd9a 1239 on_txdone_state_e on_txdone_state;
dudmuck 18:9530d682fd9a 1240
dudmuck 18:9530d682fd9a 1241 uint8_t lora_sync_byte;
dudmuck 18:9530d682fd9a 1242 float on_txdone_delay;
dudmuck 18:9530d682fd9a 1243 Timeout on_txdone_timeout;
dudmuck 18:9530d682fd9a 1244 uint8_t on_txdone_repeat_cnt;
dudmuck 18:9530d682fd9a 1245
dudmuck 18:9530d682fd9a 1246 void txdone_timeout_cb()
dudmuck 18:9530d682fd9a 1247 {
dudmuck 18:9530d682fd9a 1248 uint8_t nib;
dudmuck 18:9530d682fd9a 1249
dudmuck 18:9530d682fd9a 1250 switch (on_txdone_state) {
dudmuck 18:9530d682fd9a 1251 case ON_TXDONE_STATE_SYNC_HI_NIBBLE:
dudmuck 18:9530d682fd9a 1252 nib = lora_sync_byte >> 4;
dudmuck 18:9530d682fd9a 1253 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1254 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1255 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1256 } else
dudmuck 18:9530d682fd9a 1257 nib++;
dudmuck 18:9530d682fd9a 1258
dudmuck 18:9530d682fd9a 1259 lora_sync_byte = nib << 4;
dudmuck 18:9530d682fd9a 1260
dudmuck 18:9530d682fd9a 1261 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1262 printf("upper %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1263 break;
dudmuck 18:9530d682fd9a 1264 case ON_TXDONE_STATE_SYNC_LO_NIBBLE:
dudmuck 18:9530d682fd9a 1265 nib = lora_sync_byte & 0x0f;
dudmuck 18:9530d682fd9a 1266 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1267 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1268 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1269 } else
dudmuck 18:9530d682fd9a 1270 nib++;
dudmuck 18:9530d682fd9a 1271
dudmuck 18:9530d682fd9a 1272 lora_sync_byte = nib & 0x0f;
dudmuck 18:9530d682fd9a 1273
dudmuck 18:9530d682fd9a 1274 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1275 printf("lower %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1276 break;
dudmuck 18:9530d682fd9a 1277 case ON_TXDONE_STATE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1278 if (++on_txdone_repeat_cnt >= 10) {
dudmuck 18:9530d682fd9a 1279 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 1280 if (lora.RegPayloadLength == 255) {
dudmuck 18:9530d682fd9a 1281 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 1282 printf("done\r\n");
dudmuck 18:9530d682fd9a 1283 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 1284 return;
dudmuck 18:9530d682fd9a 1285 }
dudmuck 18:9530d682fd9a 1286 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1287 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1288 printf("pl %d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1289 }
dudmuck 18:9530d682fd9a 1290 tx_cnt++;
dudmuck 18:9530d682fd9a 1291 radio.tx_buf[0] = tx_cnt;
dudmuck 18:9530d682fd9a 1292 radio.tx_buf[1] = ~tx_cnt;
dudmuck 18:9530d682fd9a 1293 break;
dudmuck 18:9530d682fd9a 1294 default:
dudmuck 18:9530d682fd9a 1295 return;
dudmuck 18:9530d682fd9a 1296 } // ..switch (on_txdone_state)
dudmuck 18:9530d682fd9a 1297
dudmuck 18:9530d682fd9a 1298 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1299 }
dudmuck 18:9530d682fd9a 1300
dudmuck 20:b11592c9ba5f 1301
dudmuck 18:9530d682fd9a 1302 void
dudmuck 18:9530d682fd9a 1303 poll_service_radio()
dudmuck 18:9530d682fd9a 1304 {
dudmuck 18:9530d682fd9a 1305 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1306 } else { // fsk:
dudmuck 21:b84a77dfb43c 1307 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1308 return;
dudmuck 21:b84a77dfb43c 1309
dudmuck 20:b11592c9ba5f 1310 /*RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1311 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1312 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1313 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 18:9530d682fd9a 1314 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 1315 printf("poll mode fsk tx done\r\n");
dudmuck 18:9530d682fd9a 1316 }
dudmuck 20:b11592c9ba5f 1317 }*/
dudmuck 20:b11592c9ba5f 1318 static uint8_t rssi;
dudmuck 20:b11592c9ba5f 1319 RegIrqFlags2_t RegIrqFlags2;
dudmuck 20:b11592c9ba5f 1320 RegIrqFlags1_t RegIrqFlags1;
dudmuck 20:b11592c9ba5f 1321 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 20:b11592c9ba5f 1322 if (RegIrqFlags1.octet != fsk_RegIrqFlags1_prev.octet) {
dudmuck 20:b11592c9ba5f 1323 printf("iF1:");
dudmuck 20:b11592c9ba5f 1324 if (RegIrqFlags1.bits.ModeReady ^ fsk_RegIrqFlags1_prev.bits.ModeReady) {
dudmuck 20:b11592c9ba5f 1325 printf("ModeReady-");
dudmuck 20:b11592c9ba5f 1326 if (RegIrqFlags1.bits.ModeReady)
dudmuck 20:b11592c9ba5f 1327 printf("on ");
dudmuck 20:b11592c9ba5f 1328 else
dudmuck 20:b11592c9ba5f 1329 printf("off ");
dudmuck 20:b11592c9ba5f 1330 }
dudmuck 20:b11592c9ba5f 1331 if (RegIrqFlags1.bits.RxReady ^ fsk_RegIrqFlags1_prev.bits.RxReady) {
dudmuck 20:b11592c9ba5f 1332 printf("RxReady-");
dudmuck 20:b11592c9ba5f 1333 if (RegIrqFlags1.bits.RxReady)
dudmuck 20:b11592c9ba5f 1334 printf("on ");
dudmuck 20:b11592c9ba5f 1335 else
dudmuck 20:b11592c9ba5f 1336 printf("off ");
dudmuck 20:b11592c9ba5f 1337 }
dudmuck 20:b11592c9ba5f 1338 if (RegIrqFlags1.bits.TxReady ^ fsk_RegIrqFlags1_prev.bits.TxReady) {
dudmuck 20:b11592c9ba5f 1339 printf("TxReady-");
dudmuck 20:b11592c9ba5f 1340 if (RegIrqFlags1.bits.TxReady)
dudmuck 20:b11592c9ba5f 1341 printf("on ");
dudmuck 20:b11592c9ba5f 1342 else
dudmuck 20:b11592c9ba5f 1343 printf("off ");
dudmuck 20:b11592c9ba5f 1344 }
dudmuck 20:b11592c9ba5f 1345 if (RegIrqFlags1.bits.PllLock ^ fsk_RegIrqFlags1_prev.bits.PllLock) {
dudmuck 20:b11592c9ba5f 1346 printf("PllLock-");
dudmuck 20:b11592c9ba5f 1347 if (RegIrqFlags1.bits.PllLock)
dudmuck 20:b11592c9ba5f 1348 printf("on ");
dudmuck 20:b11592c9ba5f 1349 else
dudmuck 20:b11592c9ba5f 1350 printf("off ");
dudmuck 20:b11592c9ba5f 1351 }
dudmuck 20:b11592c9ba5f 1352 if (RegIrqFlags1.bits.Rssi ^ fsk_RegIrqFlags1_prev.bits.Rssi) {
dudmuck 20:b11592c9ba5f 1353 printf("Rssi-");
dudmuck 20:b11592c9ba5f 1354 if (RegIrqFlags1.bits.Rssi)
dudmuck 20:b11592c9ba5f 1355 printf("on ");
dudmuck 20:b11592c9ba5f 1356 else
dudmuck 20:b11592c9ba5f 1357 printf("off ");
dudmuck 20:b11592c9ba5f 1358 }
dudmuck 20:b11592c9ba5f 1359 if (RegIrqFlags1.bits.Timeout ^ fsk_RegIrqFlags1_prev.bits.Timeout) {
dudmuck 20:b11592c9ba5f 1360 printf("Timeout-");
dudmuck 20:b11592c9ba5f 1361 if (RegIrqFlags1.bits.Timeout)
dudmuck 20:b11592c9ba5f 1362 printf("on ");
dudmuck 20:b11592c9ba5f 1363 else
dudmuck 20:b11592c9ba5f 1364 printf("off ");
dudmuck 20:b11592c9ba5f 1365 }
dudmuck 20:b11592c9ba5f 1366 if (RegIrqFlags1.bits.PreambleDetect ^ fsk_RegIrqFlags1_prev.bits.PreambleDetect) {
dudmuck 20:b11592c9ba5f 1367 printf("PreambleDetect-");
dudmuck 20:b11592c9ba5f 1368 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 20:b11592c9ba5f 1369 printf("on ");
dudmuck 20:b11592c9ba5f 1370 else
dudmuck 20:b11592c9ba5f 1371 printf("off ");
dudmuck 20:b11592c9ba5f 1372 }
dudmuck 20:b11592c9ba5f 1373 if (RegIrqFlags1.bits.SyncAddressMatch ^ fsk_RegIrqFlags1_prev.bits.SyncAddressMatch) {
dudmuck 20:b11592c9ba5f 1374 printf("SyncAddressMatch-");
dudmuck 20:b11592c9ba5f 1375 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 20:b11592c9ba5f 1376 printf("on ");
dudmuck 20:b11592c9ba5f 1377 else
dudmuck 20:b11592c9ba5f 1378 printf("off ");
dudmuck 20:b11592c9ba5f 1379 }
dudmuck 20:b11592c9ba5f 1380 fsk_RegIrqFlags1_prev.octet = RegIrqFlags1.octet;
dudmuck 20:b11592c9ba5f 1381 printf("\r\n");
dudmuck 20:b11592c9ba5f 1382 fflush(stdout);
dudmuck 20:b11592c9ba5f 1383 }
dudmuck 20:b11592c9ba5f 1384 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 20:b11592c9ba5f 1385 if (RegIrqFlags2.octet != fsk_RegIrqFlags2_prev.octet) {
dudmuck 20:b11592c9ba5f 1386 printf("iF2:");
dudmuck 20:b11592c9ba5f 1387 if (RegIrqFlags2.bits.FifoFull ^ fsk_RegIrqFlags2_prev.bits.FifoFull) {
dudmuck 20:b11592c9ba5f 1388 printf("FifoFull-");
dudmuck 20:b11592c9ba5f 1389 if (RegIrqFlags2.bits.FifoFull)
dudmuck 20:b11592c9ba5f 1390 printf("on ");
dudmuck 20:b11592c9ba5f 1391 else
dudmuck 20:b11592c9ba5f 1392 printf("off ");
dudmuck 20:b11592c9ba5f 1393 }
dudmuck 20:b11592c9ba5f 1394 if (RegIrqFlags2.bits.FifoEmpty ^ fsk_RegIrqFlags2_prev.bits.FifoEmpty) {
dudmuck 20:b11592c9ba5f 1395 printf("FifoEmpty-");
dudmuck 20:b11592c9ba5f 1396 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 20:b11592c9ba5f 1397 printf("on ");
dudmuck 20:b11592c9ba5f 1398 else {
dudmuck 20:b11592c9ba5f 1399 printf("off ");
dudmuck 20:b11592c9ba5f 1400 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 20:b11592c9ba5f 1401 }
dudmuck 20:b11592c9ba5f 1402 }
dudmuck 20:b11592c9ba5f 1403 if (RegIrqFlags2.bits.FifoLevel ^ fsk_RegIrqFlags2_prev.bits.FifoLevel) {
dudmuck 20:b11592c9ba5f 1404 printf("FifoLevel-");
dudmuck 20:b11592c9ba5f 1405 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 20:b11592c9ba5f 1406 printf("on ");
dudmuck 20:b11592c9ba5f 1407 else
dudmuck 20:b11592c9ba5f 1408 printf("off ");
dudmuck 20:b11592c9ba5f 1409 }
dudmuck 20:b11592c9ba5f 1410 if (RegIrqFlags2.bits.FifoOverrun ^ fsk_RegIrqFlags2_prev.bits.FifoOverrun) {
dudmuck 20:b11592c9ba5f 1411 printf("FifoOverrun-");
dudmuck 20:b11592c9ba5f 1412 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 20:b11592c9ba5f 1413 printf("on ");
dudmuck 20:b11592c9ba5f 1414 else
dudmuck 20:b11592c9ba5f 1415 printf("off ");
dudmuck 20:b11592c9ba5f 1416 }
dudmuck 20:b11592c9ba5f 1417 if (RegIrqFlags2.bits.PacketSent ^ fsk_RegIrqFlags2_prev.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1418 printf("PacketSent-");
dudmuck 20:b11592c9ba5f 1419 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1420 printf("on ");
dudmuck 20:b11592c9ba5f 1421 } else
dudmuck 20:b11592c9ba5f 1422 printf("off ");
dudmuck 20:b11592c9ba5f 1423 }
dudmuck 20:b11592c9ba5f 1424 if (RegIrqFlags2.bits.PayloadReady ^ fsk_RegIrqFlags2_prev.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1425 printf("PayloadReady-");
dudmuck 20:b11592c9ba5f 1426 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 20:b11592c9ba5f 1427 printf("on ");
dudmuck 20:b11592c9ba5f 1428 else
dudmuck 20:b11592c9ba5f 1429 printf("off ");
dudmuck 20:b11592c9ba5f 1430 }
dudmuck 20:b11592c9ba5f 1431 if (RegIrqFlags2.bits.CrcOk ^ fsk_RegIrqFlags2_prev.bits.CrcOk) {
dudmuck 20:b11592c9ba5f 1432 printf("CrcOk-");
dudmuck 20:b11592c9ba5f 1433 if (RegIrqFlags2.bits.CrcOk)
dudmuck 20:b11592c9ba5f 1434 printf("on ");
dudmuck 20:b11592c9ba5f 1435 else
dudmuck 20:b11592c9ba5f 1436 printf("off ");
dudmuck 20:b11592c9ba5f 1437 }
dudmuck 20:b11592c9ba5f 1438 if (RegIrqFlags2.bits.LowBat ^ fsk_RegIrqFlags2_prev.bits.LowBat) {
dudmuck 20:b11592c9ba5f 1439 printf("LowBat-");
dudmuck 20:b11592c9ba5f 1440 if (RegIrqFlags2.bits.LowBat)
dudmuck 20:b11592c9ba5f 1441 printf("on ");
dudmuck 20:b11592c9ba5f 1442 else
dudmuck 20:b11592c9ba5f 1443 printf("off ");
dudmuck 20:b11592c9ba5f 1444 }
dudmuck 20:b11592c9ba5f 1445 fsk_RegIrqFlags2_prev.octet = RegIrqFlags2.octet;
dudmuck 20:b11592c9ba5f 1446 printf("\r\n");
dudmuck 20:b11592c9ba5f 1447 fflush(stdout);
dudmuck 20:b11592c9ba5f 1448
dudmuck 20:b11592c9ba5f 1449 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1450 if (fsk.tx_done_sleep)
dudmuck 20:b11592c9ba5f 1451 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 20:b11592c9ba5f 1452 else
dudmuck 20:b11592c9ba5f 1453 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 20:b11592c9ba5f 1454 }
dudmuck 20:b11592c9ba5f 1455
dudmuck 20:b11592c9ba5f 1456 if (RegIrqFlags2.bits.CrcOk || RegIrqFlags2.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1457 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 20:b11592c9ba5f 1458 fsk.RegAfcValue = radio.read_s16(REG_FSK_AFCMSB);
dudmuck 20:b11592c9ba5f 1459 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 20:b11592c9ba5f 1460 if (rssi != 0) {
dudmuck 20:b11592c9ba5f 1461 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 20:b11592c9ba5f 1462 rssi = 0;
dudmuck 20:b11592c9ba5f 1463 }
dudmuck 20:b11592c9ba5f 1464 }
dudmuck 20:b11592c9ba5f 1465 if (fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 20:b11592c9ba5f 1466 fsk.rx_buf_length = radio.read_reg(REG_FIFO);
dudmuck 20:b11592c9ba5f 1467 } else {
dudmuck 20:b11592c9ba5f 1468 fsk.rx_buf_length = fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 20:b11592c9ba5f 1469 }
dudmuck 20:b11592c9ba5f 1470
dudmuck 20:b11592c9ba5f 1471 radio.m_cs = 0;
dudmuck 20:b11592c9ba5f 1472 radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
dudmuck 20:b11592c9ba5f 1473 for (int i = 0; i < fsk.rx_buf_length; i++) {
dudmuck 20:b11592c9ba5f 1474 radio.rx_buf[i] = radio.m_spi.write(0);
dudmuck 20:b11592c9ba5f 1475 }
dudmuck 20:b11592c9ba5f 1476 radio.m_cs = 1;
dudmuck 20:b11592c9ba5f 1477 /****/
dudmuck 20:b11592c9ba5f 1478 if (per_en) {
dudmuck 20:b11592c9ba5f 1479 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 20:b11592c9ba5f 1480 PacketNormalCnt++;
dudmuck 20:b11592c9ba5f 1481 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1482 }
dudmuck 20:b11592c9ba5f 1483 } else {
dudmuck 20:b11592c9ba5f 1484 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1485 }
dudmuck 20:b11592c9ba5f 1486 fflush(stdout);
dudmuck 20:b11592c9ba5f 1487 } // ..if CrcOk or PayloadReady
dudmuck 20:b11592c9ba5f 1488 } // ..if RegIrqFlags2 changed
dudmuck 20:b11592c9ba5f 1489 } // ...fsk
dudmuck 18:9530d682fd9a 1490 }
dudmuck 18:9530d682fd9a 1491
dudmuck 18:9530d682fd9a 1492 void cadper_service()
dudmuck 18:9530d682fd9a 1493 {
dudmuck 18:9530d682fd9a 1494 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1495
dudmuck 18:9530d682fd9a 1496
dudmuck 18:9530d682fd9a 1497 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1498 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1499 do {
dudmuck 18:9530d682fd9a 1500 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1501 if (lora.RegIrqFlags.bits.RxDone) {
dudmuck 18:9530d682fd9a 1502 service_action_e act = lora.service();
dudmuck 18:9530d682fd9a 1503 if (act == SERVICE_READ_FIFO) {
dudmuck 18:9530d682fd9a 1504 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 18:9530d682fd9a 1505 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1506 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 18:9530d682fd9a 1507 }
dudmuck 18:9530d682fd9a 1508 }
dudmuck 18:9530d682fd9a 1509 break;
dudmuck 18:9530d682fd9a 1510 }
dudmuck 18:9530d682fd9a 1511 } while (!lora.RegIrqFlags.bits.RxTimeout);
dudmuck 18:9530d682fd9a 1512 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1513 }
dudmuck 18:9530d682fd9a 1514
dudmuck 18:9530d682fd9a 1515 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1516 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1517 num_cads++;
dudmuck 18:9530d682fd9a 1518 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1519 }
dudmuck 18:9530d682fd9a 1520
dudmuck 18:9530d682fd9a 1521 }
dudmuck 18:9530d682fd9a 1522
dudmuck 20:b11592c9ba5f 1523 void cmd_restart_rx(uint8_t);
dudmuck 22:2005df80c8a8 1524 int preamble_to_sync_us;
dudmuck 22:2005df80c8a8 1525 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 1526 Timeout timeout_syncAddress;
dudmuck 20:b11592c9ba5f 1527 bool get_syncAddress;
dudmuck 22:2005df80c8a8 1528 #endif
dudmuck 20:b11592c9ba5f 1529 float preamble_detect_at;
dudmuck 20:b11592c9ba5f 1530
dudmuck 20:b11592c9ba5f 1531 void callback_sa_timeout()
dudmuck 20:b11592c9ba5f 1532 {
dudmuck 20:b11592c9ba5f 1533 printf("syncAddress timeout ");
dudmuck 20:b11592c9ba5f 1534 if (dio2.read() == 0) {
dudmuck 20:b11592c9ba5f 1535 //cmd_restart_rx(0);
dudmuck 20:b11592c9ba5f 1536 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 1537 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 23:821b4f426ee6 1538 printf("(false preamble detect at %f, secs:%lu)\r\n", preamble_detect_at, time(NULL) - secs_rx_start);
dudmuck 20:b11592c9ba5f 1539 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 1540 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 20:b11592c9ba5f 1541 } else
dudmuck 20:b11592c9ba5f 1542 printf("\r\n");
dudmuck 20:b11592c9ba5f 1543 }
dudmuck 20:b11592c9ba5f 1544
dudmuck 0:be215de91a68 1545 void
dudmuck 0:be215de91a68 1546 service_radio()
dudmuck 0:be215de91a68 1547 {
dudmuck 1:1cd0afbed23c 1548 service_action_e act;
dudmuck 14:c57ea544dc18 1549 static uint8_t rssi = 0;
dudmuck 1:1cd0afbed23c 1550
dudmuck 1:1cd0afbed23c 1551 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 21:b84a77dfb43c 1552 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 23:821b4f426ee6 1553 rssi = lora.get_current_rssi(); // dBm returned, negative value
dudmuck 23:821b4f426ee6 1554 #if defined(TARGET_STM) && !defined(TYPE_ABZ) && !defined(TARGET_MTS_MDOT_F411RE)
dudmuck 21:b84a77dfb43c 1555 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1556 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1557 else
dudmuck 21:b84a77dfb43c 1558 pc3 = 1; // signal stronger than threshold
dudmuck 21:b84a77dfb43c 1559 #endif
dudmuck 21:b84a77dfb43c 1560 }
dudmuck 21:b84a77dfb43c 1561
dudmuck 18:9530d682fd9a 1562 if (cadper_enable) {
dudmuck 18:9530d682fd9a 1563 cadper_service();
dudmuck 18:9530d682fd9a 1564 }
dudmuck 4:7a9007dfc0e5 1565
dudmuck 1:1cd0afbed23c 1566 act = lora.service();
dudmuck 0:be215de91a68 1567
dudmuck 1:1cd0afbed23c 1568 switch (act) {
dudmuck 1:1cd0afbed23c 1569 case SERVICE_READ_FIFO:
dudmuck 8:227605e4a760 1570 if (app == APP_NONE) {
dudmuck 8:227605e4a760 1571 if (per_en) {
dudmuck 13:c73caaee93a5 1572 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 8:227605e4a760 1573 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1574 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 8:227605e4a760 1575 }
dudmuck 8:227605e4a760 1576 } else
dudmuck 21:b84a77dfb43c 1577 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 15:c69b942685ea 1578 fflush(stdout);
dudmuck 1:1cd0afbed23c 1579 } else if (app == APP_CHAT) {
dudmuck 1:1cd0afbed23c 1580 if (lora.RegHopChannel.bits.RxPayloadCrcOn) {
dudmuck 1:1cd0afbed23c 1581 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 1:1cd0afbed23c 1582 printf("crcError\r\n");
dudmuck 1:1cd0afbed23c 1583 else {
dudmuck 1:1cd0afbed23c 1584 int n = lora.RegRxNbBytes;
dudmuck 1:1cd0afbed23c 1585 radio.rx_buf[n++] = '\r';
dudmuck 1:1cd0afbed23c 1586 radio.rx_buf[n++] = '\n';
dudmuck 1:1cd0afbed23c 1587 radio.rx_buf[n] = 0; // null terminate
dudmuck 1:1cd0afbed23c 1588 printf((char *)radio.rx_buf);
dudmuck 1:1cd0afbed23c 1589 }
dudmuck 1:1cd0afbed23c 1590 } else
dudmuck 1:1cd0afbed23c 1591 printf("crcOff\r\n");
dudmuck 1:1cd0afbed23c 1592
dudmuck 1:1cd0afbed23c 1593 // clear Irq flags
dudmuck 1:1cd0afbed23c 1594 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 1:1cd0afbed23c 1595 // should still be in receive mode
dudmuck 0:be215de91a68 1596 }
dudmuck 1:1cd0afbed23c 1597 break;
dudmuck 1:1cd0afbed23c 1598 case SERVICE_TX_DONE:
dudmuck 1:1cd0afbed23c 1599 if (app == APP_CHAT) {
dudmuck 18:9530d682fd9a 1600 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 8:227605e4a760 1601 } else if (per_en) {
dudmuck 18:9530d682fd9a 1602 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 18:9530d682fd9a 1603 } else if (on_txdone_state != ON_TXDONE_STATE_NONE) {
dudmuck 18:9530d682fd9a 1604 on_txdone_timeout.attach(&txdone_timeout_cb, on_txdone_delay);
dudmuck 1:1cd0afbed23c 1605 }
dudmuck 1:1cd0afbed23c 1606 break;
dudmuck 1:1cd0afbed23c 1607 case SERVICE_ERROR:
dudmuck 1:1cd0afbed23c 1608 printf("error\r\n");
dudmuck 1:1cd0afbed23c 1609 break;
dudmuck 19:be8a8b0e7320 1610 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1611 break;
dudmuck 1:1cd0afbed23c 1612 } // ...switch (act)
dudmuck 1:1cd0afbed23c 1613 } else {
dudmuck 1:1cd0afbed23c 1614 /* FSK: */
dudmuck 21:b84a77dfb43c 1615
dudmuck 21:b84a77dfb43c 1616 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1617 return; // radio service by ISR only
dudmuck 21:b84a77dfb43c 1618
dudmuck 21:b84a77dfb43c 1619 if (ulrx_enable)
dudmuck 21:b84a77dfb43c 1620 return;
dudmuck 21:b84a77dfb43c 1621
dudmuck 1:1cd0afbed23c 1622 act = fsk.service();
dudmuck 1:1cd0afbed23c 1623
dudmuck 1:1cd0afbed23c 1624 switch (act) {
dudmuck 1:1cd0afbed23c 1625 case SERVICE_READ_FIFO:
dudmuck 2:c6b23a43a9d9 1626 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1627 int n = fsk.rx_buf_length;
dudmuck 2:c6b23a43a9d9 1628 radio.rx_buf[n++] = '\r';
dudmuck 2:c6b23a43a9d9 1629 radio.rx_buf[n++] = '\n';
dudmuck 2:c6b23a43a9d9 1630 radio.rx_buf[n] = 0; // null terminate
dudmuck 2:c6b23a43a9d9 1631 printf((char *)radio.rx_buf);
dudmuck 2:c6b23a43a9d9 1632 } else {
dudmuck 21:b84a77dfb43c 1633 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 14:c57ea544dc18 1634 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 14:c57ea544dc18 1635 if (rssi != 0) {
dudmuck 15:c69b942685ea 1636 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 14:c57ea544dc18 1637 rssi = 0;
dudmuck 15:c69b942685ea 1638 }
dudmuck 21:b84a77dfb43c 1639 }
dudmuck 13:c73caaee93a5 1640 if (per_en) {
dudmuck 13:c73caaee93a5 1641 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 13:c73caaee93a5 1642 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1643 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1644 }
dudmuck 13:c73caaee93a5 1645 } else {
dudmuck 13:c73caaee93a5 1646 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1647 }
dudmuck 21:b84a77dfb43c 1648
dudmuck 2:c6b23a43a9d9 1649 }
dudmuck 21:b84a77dfb43c 1650 if (crc32_en) {
dudmuck 21:b84a77dfb43c 1651 uint32_t c, *u32_ptr = (uint32_t*)&radio.rx_buf[fsk.rx_buf_length-4];
dudmuck 23:821b4f426ee6 1652 printf("rx crc:%08x, ", (unsigned int)(*u32_ptr));
dudmuck 21:b84a77dfb43c 1653 c = gen_crc(radio.rx_buf, fsk.rx_buf_length-4);
dudmuck 23:821b4f426ee6 1654 printf("calc crc:%08x\r\n", (unsigned int)c);
dudmuck 21:b84a77dfb43c 1655 }
dudmuck 21:b84a77dfb43c 1656 fflush(stdout);
dudmuck 1:1cd0afbed23c 1657 break;
dudmuck 2:c6b23a43a9d9 1658 case SERVICE_TX_DONE:
dudmuck 18:9530d682fd9a 1659 if (ook_test_en)
dudmuck 18:9530d682fd9a 1660 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:c6b23a43a9d9 1661 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1662 fsk.start_rx();
dudmuck 13:c73caaee93a5 1663 } else if (per_en) {
dudmuck 13:c73caaee93a5 1664 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 13:c73caaee93a5 1665 }
dudmuck 2:c6b23a43a9d9 1666 break;
dudmuck 19:be8a8b0e7320 1667 case SERVICE_ERROR:
dudmuck 19:be8a8b0e7320 1668 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1669 break;
dudmuck 20:b11592c9ba5f 1670 } // ...switch (act)
dudmuck 22:2005df80c8a8 1671
dudmuck 22:2005df80c8a8 1672 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 1673 /* FSK receiver handling of preamble detection */
dudmuck 20:b11592c9ba5f 1674 if (radio.RegDioMapping2.bits.MapPreambleDetect && radio.RegDioMapping2.bits.Dio4Mapping == 3) {
dudmuck 20:b11592c9ba5f 1675 if (saved_dio4 != dio4.read()) {
dudmuck 20:b11592c9ba5f 1676 //printf("predet-dio4:%d\r\n", dio4.read());
dudmuck 20:b11592c9ba5f 1677 /* FSK: preamble detect state change */
dudmuck 20:b11592c9ba5f 1678 if (dio4.read()) {
dudmuck 20:b11592c9ba5f 1679 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) { // if we can see SyncAddress
dudmuck 20:b11592c9ba5f 1680 get_syncAddress = true;
dudmuck 20:b11592c9ba5f 1681 timeout_syncAddress.attach_us(callback_sa_timeout, preamble_to_sync_us);
dudmuck 20:b11592c9ba5f 1682 }
dudmuck 20:b11592c9ba5f 1683 /* how long after RX start is preamble detection occuring? */
dudmuck 20:b11592c9ba5f 1684 //printf("preamble detect at %f\r\n", rx_start_timer.read());
dudmuck 20:b11592c9ba5f 1685 preamble_detect_at = rx_start_timer.read();
dudmuck 20:b11592c9ba5f 1686 } else {
dudmuck 20:b11592c9ba5f 1687 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1688 //printf("preamble detect clear\r\n");
dudmuck 20:b11592c9ba5f 1689 }
dudmuck 20:b11592c9ba5f 1690 saved_dio4 = dio4.read();
dudmuck 20:b11592c9ba5f 1691 }
dudmuck 20:b11592c9ba5f 1692 } // ..if dio4 is
dudmuck 22:2005df80c8a8 1693
dudmuck 20:b11592c9ba5f 1694 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) {
dudmuck 20:b11592c9ba5f 1695 if (dio2.read()) {
dudmuck 20:b11592c9ba5f 1696 if (get_syncAddress) {
dudmuck 20:b11592c9ba5f 1697 timeout_syncAddress.detach();
dudmuck 20:b11592c9ba5f 1698 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1699 }
dudmuck 15:c69b942685ea 1700 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 14:c57ea544dc18 1701 }
dudmuck 14:c57ea544dc18 1702 }
dudmuck 22:2005df80c8a8 1703 #endif /* !TYPE_ABZ */
dudmuck 22:2005df80c8a8 1704
dudmuck 21:b84a77dfb43c 1705 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 21:b84a77dfb43c 1706 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 21:b84a77dfb43c 1707 rssi = -rssi;
dudmuck 23:821b4f426ee6 1708 #if defined(TARGET_STM) && !defined(TYPE_ABZ) && !defined(TARGET_MTS_MDOT_F411RE)
dudmuck 21:b84a77dfb43c 1709 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1710 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1711 else
dudmuck 21:b84a77dfb43c 1712 pc3 = 1; // signal stronger than threshold
dudmuck 22:2005df80c8a8 1713 #endif
dudmuck 21:b84a77dfb43c 1714 }
dudmuck 22:2005df80c8a8 1715
dudmuck 14:c57ea544dc18 1716 } // ...!radio.RegOpMode.bits.LongRangeMode
dudmuck 0:be215de91a68 1717 }
dudmuck 0:be215de91a68 1718
dudmuck 5:360069ec9953 1719 /*int get_kbd_str(char* buf, int size)
dudmuck 0:be215de91a68 1720 {
dudmuck 0:be215de91a68 1721 char c;
dudmuck 0:be215de91a68 1722 int i;
dudmuck 0:be215de91a68 1723 static int prev_len;
dudmuck 0:be215de91a68 1724
dudmuck 0:be215de91a68 1725 for (i = 0;;) {
dudmuck 0:be215de91a68 1726 if (pc.readable()) {
dudmuck 0:be215de91a68 1727 c = pc.getc();
dudmuck 0:be215de91a68 1728 if (c == 8 && i > 0) {
dudmuck 0:be215de91a68 1729 pc.putc(8);
dudmuck 0:be215de91a68 1730 pc.putc(' ');
dudmuck 0:be215de91a68 1731 pc.putc(8);
dudmuck 0:be215de91a68 1732 i--;
dudmuck 0:be215de91a68 1733 } else if (c == '\r') {
dudmuck 0:be215de91a68 1734 if (i == 0) {
dudmuck 0:be215de91a68 1735 return prev_len; // repeat previous
dudmuck 0:be215de91a68 1736 } else {
dudmuck 0:be215de91a68 1737 buf[i] = 0; // null terminate
dudmuck 0:be215de91a68 1738 prev_len = i;
dudmuck 0:be215de91a68 1739 return i;
dudmuck 0:be215de91a68 1740 }
dudmuck 0:be215de91a68 1741 } else if (c == 3) {
dudmuck 0:be215de91a68 1742 // ctrl-C abort
dudmuck 0:be215de91a68 1743 return -1;
dudmuck 0:be215de91a68 1744 } else if (i < size) {
dudmuck 0:be215de91a68 1745 buf[i++] = c;
dudmuck 0:be215de91a68 1746 pc.putc(c);
dudmuck 0:be215de91a68 1747 }
dudmuck 4:7a9007dfc0e5 1748 } else {
dudmuck 0:be215de91a68 1749 service_radio();
dudmuck 4:7a9007dfc0e5 1750 }
dudmuck 0:be215de91a68 1751 } // ...for()
dudmuck 5:360069ec9953 1752 }*/
dudmuck 0:be215de91a68 1753
dudmuck 0:be215de91a68 1754 void
dudmuck 0:be215de91a68 1755 console_chat()
dudmuck 0:be215de91a68 1756 {
dudmuck 5:360069ec9953 1757 //int i, len = get_kbd_str(pcbuf, sizeof(pcbuf));
dudmuck 5:360069ec9953 1758
dudmuck 5:360069ec9953 1759 service_radio();
dudmuck 5:360069ec9953 1760
dudmuck 5:360069ec9953 1761 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 1762 printf("chat abort\r\n");
dudmuck 5:360069ec9953 1763 pcbuf_len = 0;
dudmuck 0:be215de91a68 1764 app = APP_NONE;
dudmuck 0:be215de91a68 1765 return;
dudmuck 5:360069ec9953 1766 } else if (pcbuf_len == 0) {
dudmuck 5:360069ec9953 1767 return;
dudmuck 0:be215de91a68 1768 } else {
dudmuck 5:360069ec9953 1769 int i;
dudmuck 5:360069ec9953 1770 for (i = 0; i < pcbuf_len; i++)
dudmuck 0:be215de91a68 1771 radio.tx_buf[i] = pcbuf[i];
dudmuck 1:1cd0afbed23c 1772 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 5:360069ec9953 1773 lora.RegPayloadLength = pcbuf_len;
dudmuck 1:1cd0afbed23c 1774 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 5:360069ec9953 1775 lora.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1776 } else {
dudmuck 5:360069ec9953 1777 fsk.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1778 }
dudmuck 5:360069ec9953 1779 pcbuf_len = 0;
dudmuck 0:be215de91a68 1780 printf("\r\n");
dudmuck 0:be215de91a68 1781 }
dudmuck 0:be215de91a68 1782 }
dudmuck 0:be215de91a68 1783
dudmuck 22:2005df80c8a8 1784 const uint8_t ookt_tx_payload[29] = {
dudmuck 21:b84a77dfb43c 1785 0x55, 0x55, 0x55, 0x55, 0xA9, 0x66, 0x69, 0x65,
dudmuck 21:b84a77dfb43c 1786 0x39, 0x53, 0xAA, 0xC3, 0xA6, 0x95, 0xC6, 0x3C,
dudmuck 21:b84a77dfb43c 1787 0x6A, 0x33, 0x33, 0xC6, 0xCA, 0xA6, 0x33, 0x33,
dudmuck 21:b84a77dfb43c 1788 0x55, 0x6A, 0xA6, 0xAA, 0x53
dudmuck 21:b84a77dfb43c 1789 };
dudmuck 23:821b4f426ee6 1790 volatile unsigned int ook_tx_cnt = 0;
dudmuck 21:b84a77dfb43c 1791
dudmuck 21:b84a77dfb43c 1792 void callback_ook_tx_test()
dudmuck 21:b84a77dfb43c 1793 {
dudmuck 23:821b4f426ee6 1794 unsigned int i;
dudmuck 21:b84a77dfb43c 1795
dudmuck 21:b84a77dfb43c 1796 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 1797
dudmuck 21:b84a77dfb43c 1798 printf("%u ookTx: ", ook_tx_cnt++);
dudmuck 21:b84a77dfb43c 1799 for (i = 0; i < sizeof(ookt_tx_payload); i++) {
dudmuck 21:b84a77dfb43c 1800 radio.tx_buf[i] = ookt_tx_payload[i];
dudmuck 21:b84a77dfb43c 1801 printf("%02x ", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 1802 }
dudmuck 21:b84a77dfb43c 1803 printf("\r\n");
dudmuck 21:b84a77dfb43c 1804
dudmuck 21:b84a77dfb43c 1805 //printf("syncConf:%x\r\n", radio.read_reg(REG_FSK_SYNCCONFIG));
dudmuck 21:b84a77dfb43c 1806 fsk.start_tx(sizeof(ookt_tx_payload));
dudmuck 21:b84a77dfb43c 1807 }
dudmuck 21:b84a77dfb43c 1808
dudmuck 18:9530d682fd9a 1809 typedef enum {
dudmuck 18:9530d682fd9a 1810 TXTICKER_STATE_OFF = 0,
dudmuck 18:9530d682fd9a 1811 TXTICKER_STATE_TOGGLE_PAYLOAD_BIT,
dudmuck 18:9530d682fd9a 1812 TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1813 TXTICKER_STATE_CYCLE_CODING_RATE,
dudmuck 18:9530d682fd9a 1814 TXTICKER_STATE_TOG_HEADER_MODE,
dudmuck 18:9530d682fd9a 1815 TXTICKER_STATE_TOG_CRC_ON,
dudmuck 18:9530d682fd9a 1816 TXTICKER_STATE_CYCLE_SYNC_1,
dudmuck 18:9530d682fd9a 1817 TXTICKER_STATE_CYCLE_SYNC_2,
dudmuck 18:9530d682fd9a 1818 TXTICKER_STATE_RAMP_PAYLOAD_DATA_START,
dudmuck 18:9530d682fd9a 1819 TXTICKER_STATE_RAMP_PAYLOAD_DATA,
dudmuck 18:9530d682fd9a 1820 TXTICKER_STATE_SYMBOL_SWEEP,
dudmuck 18:9530d682fd9a 1821 TXTICKER_STATE_TOGGLE_ALL_BITS_START,
dudmuck 18:9530d682fd9a 1822 TXTICKER_STATE_TOGGLE_ALL_BITS,
dudmuck 18:9530d682fd9a 1823 } txticker_state_e;
dudmuck 18:9530d682fd9a 1824
dudmuck 18:9530d682fd9a 1825 txticker_state_e txticker_state;
dudmuck 18:9530d682fd9a 1826 float tx_ticker_rate = 0.5;
dudmuck 18:9530d682fd9a 1827 Ticker tx_ticker;
dudmuck 18:9530d682fd9a 1828
dudmuck 18:9530d682fd9a 1829 uint8_t txticker_sync_byte;
dudmuck 18:9530d682fd9a 1830 uint8_t payload_length_stop;
dudmuck 18:9530d682fd9a 1831 uint8_t symbol_num;
dudmuck 18:9530d682fd9a 1832 uint32_t symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 1833 unsigned int symbol_sweep_bit_counter_stop;
dudmuck 18:9530d682fd9a 1834 uint8_t symbol_sweep_nbits;
dudmuck 18:9530d682fd9a 1835 uint8_t byte_pad_length;
dudmuck 18:9530d682fd9a 1836
dudmuck 18:9530d682fd9a 1837 uint8_t tab_current_byte_num;
dudmuck 18:9530d682fd9a 1838 uint8_t tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1839
dudmuck 18:9530d682fd9a 1840 void fp_cb()
dudmuck 18:9530d682fd9a 1841 {
dudmuck 18:9530d682fd9a 1842 int i;
dudmuck 18:9530d682fd9a 1843 if (!radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1844 return;
dudmuck 18:9530d682fd9a 1845
dudmuck 18:9530d682fd9a 1846 switch (txticker_state) {
dudmuck 18:9530d682fd9a 1847 case TXTICKER_STATE_TOGGLE_PAYLOAD_BIT:
dudmuck 18:9530d682fd9a 1848 /*
dudmuck 18:9530d682fd9a 1849 {
dudmuck 18:9530d682fd9a 1850 if (fp_tog_bit_ < 32) {
dudmuck 18:9530d682fd9a 1851 uint32_t bp = 1 << fp_tog_bit_;
dudmuck 18:9530d682fd9a 1852 fp_data ^= bp;
dudmuck 18:9530d682fd9a 1853 //printf("bp%02x ", bp);
dudmuck 18:9530d682fd9a 1854 }
dudmuck 18:9530d682fd9a 1855 memcpy(radio.tx_buf, &fp_data, fp_data_length);
dudmuck 18:9530d682fd9a 1856 printf("TX ");
dudmuck 18:9530d682fd9a 1857 for (i = 0; i < fp_data_length; i++)
dudmuck 18:9530d682fd9a 1858 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1859
dudmuck 18:9530d682fd9a 1860 printf("\r\n");
dudmuck 18:9530d682fd9a 1861 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1862 break;
dudmuck 18:9530d682fd9a 1863 }
dudmuck 18:9530d682fd9a 1864 */
dudmuck 18:9530d682fd9a 1865 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1866 break;
dudmuck 18:9530d682fd9a 1867 case TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1868 {
dudmuck 18:9530d682fd9a 1869 if (lora.RegPayloadLength > payload_length_stop)
dudmuck 18:9530d682fd9a 1870 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 1871 else
dudmuck 18:9530d682fd9a 1872 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1873
dudmuck 18:9530d682fd9a 1874 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1875 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1876 printf("RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1877 break;
dudmuck 18:9530d682fd9a 1878 }
dudmuck 18:9530d682fd9a 1879 case TXTICKER_STATE_CYCLE_CODING_RATE:
dudmuck 18:9530d682fd9a 1880 {
dudmuck 18:9530d682fd9a 1881 uint8_t cr = lora.getCodingRate(false); // false: TX coding rate
dudmuck 18:9530d682fd9a 1882 if (cr == 4)
dudmuck 18:9530d682fd9a 1883 cr = 0;
dudmuck 18:9530d682fd9a 1884 else
dudmuck 18:9530d682fd9a 1885 cr++;
dudmuck 18:9530d682fd9a 1886
dudmuck 18:9530d682fd9a 1887 lora.setCodingRate(cr);
dudmuck 18:9530d682fd9a 1888 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1889 printf("tx cr:%d\r\n", cr);
dudmuck 18:9530d682fd9a 1890 break;
dudmuck 18:9530d682fd9a 1891 }
dudmuck 18:9530d682fd9a 1892 case TXTICKER_STATE_TOG_HEADER_MODE:
dudmuck 18:9530d682fd9a 1893 {
dudmuck 18:9530d682fd9a 1894 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 1895 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1896 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 1897 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 1898 printf("\r\n");
dudmuck 18:9530d682fd9a 1899 break;
dudmuck 18:9530d682fd9a 1900 }
dudmuck 18:9530d682fd9a 1901 case TXTICKER_STATE_TOG_CRC_ON:
dudmuck 18:9530d682fd9a 1902 {
dudmuck 18:9530d682fd9a 1903 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1904 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1905 printf("crc on:%d\r\n", lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1906 break;
dudmuck 18:9530d682fd9a 1907 }
dudmuck 18:9530d682fd9a 1908 case TXTICKER_STATE_CYCLE_SYNC_1:
dudmuck 18:9530d682fd9a 1909 {
dudmuck 18:9530d682fd9a 1910 /* cycle hi nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1911 if ((txticker_sync_byte & 0xf0) == 0xf0)
dudmuck 18:9530d682fd9a 1912 txticker_sync_byte &= 0x0f;
dudmuck 18:9530d682fd9a 1913 else
dudmuck 18:9530d682fd9a 1914 txticker_sync_byte += 0x10;
dudmuck 18:9530d682fd9a 1915 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1916 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1917 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1918 break;
dudmuck 18:9530d682fd9a 1919 }
dudmuck 18:9530d682fd9a 1920 case TXTICKER_STATE_CYCLE_SYNC_2:
dudmuck 18:9530d682fd9a 1921 {
dudmuck 18:9530d682fd9a 1922 /* cycle lo nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1923 if ((txticker_sync_byte & 0x0f) == 0x0f)
dudmuck 18:9530d682fd9a 1924 txticker_sync_byte &= 0xf0;
dudmuck 18:9530d682fd9a 1925 else
dudmuck 18:9530d682fd9a 1926 txticker_sync_byte += 0x01;
dudmuck 18:9530d682fd9a 1927 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1928 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1929 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1930 break;
dudmuck 18:9530d682fd9a 1931 }
dudmuck 18:9530d682fd9a 1932 case TXTICKER_STATE_RAMP_PAYLOAD_DATA_START:
dudmuck 18:9530d682fd9a 1933 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA;
dudmuck 18:9530d682fd9a 1934 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1935 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1936
dudmuck 18:9530d682fd9a 1937 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1938 printf("payload start, len:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1939 break;
dudmuck 18:9530d682fd9a 1940 case TXTICKER_STATE_RAMP_PAYLOAD_DATA:
dudmuck 18:9530d682fd9a 1941 for (i = lora.RegPayloadLength-1; i >= 0; i--) {
dudmuck 18:9530d682fd9a 1942 //printf("i:%d ", i);
dudmuck 18:9530d682fd9a 1943 if (radio.tx_buf[i] == 255) {
dudmuck 18:9530d682fd9a 1944 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1945 } else {
dudmuck 18:9530d682fd9a 1946 radio.tx_buf[i]++;
dudmuck 18:9530d682fd9a 1947 break;
dudmuck 18:9530d682fd9a 1948 }
dudmuck 18:9530d682fd9a 1949 }
dudmuck 18:9530d682fd9a 1950 //printf("\r\n");
dudmuck 18:9530d682fd9a 1951 printf("send:");
dudmuck 18:9530d682fd9a 1952 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1953 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1954 }
dudmuck 18:9530d682fd9a 1955 printf("\r\n");
dudmuck 18:9530d682fd9a 1956 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1957 if (radio.tx_buf[0] == 255) {
dudmuck 18:9530d682fd9a 1958 printf("payload ramp done\r\n");
dudmuck 18:9530d682fd9a 1959 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1960 }
dudmuck 18:9530d682fd9a 1961 break;
dudmuck 18:9530d682fd9a 1962 case TXTICKER_STATE_SYMBOL_SWEEP: // fpsNL command, where N=symbol num, L=nbytes
dudmuck 18:9530d682fd9a 1963 {
dudmuck 18:9530d682fd9a 1964 uint32_t mask;
dudmuck 18:9530d682fd9a 1965 /*for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1966 radio.tx_buf[i] = 0;*/
dudmuck 18:9530d682fd9a 1967 i = byte_pad_length;
dudmuck 19:be8a8b0e7320 1968 printf("bit_counter 0x%" PRIx32 " : ", symbol_sweep_bit_counter);
dudmuck 18:9530d682fd9a 1969 for (int bn = 0; bn < symbol_sweep_nbits; bn += 2) {
dudmuck 18:9530d682fd9a 1970 /* 2 lsbits going into first byte */
dudmuck 18:9530d682fd9a 1971 mask = 1 << bn;
dudmuck 18:9530d682fd9a 1972 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1973 radio.tx_buf[i] |= 1 << symbol_num;
dudmuck 18:9530d682fd9a 1974 else
dudmuck 18:9530d682fd9a 1975 radio.tx_buf[i] &= ~(1 << symbol_num);
dudmuck 18:9530d682fd9a 1976 mask = 2 << bn;
dudmuck 18:9530d682fd9a 1977 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1978 radio.tx_buf[i] |= 0x10 << symbol_num;
dudmuck 18:9530d682fd9a 1979 else
dudmuck 18:9530d682fd9a 1980 radio.tx_buf[i] &= ~(0x10 << symbol_num);
dudmuck 18:9530d682fd9a 1981 //printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1982 i++;
dudmuck 18:9530d682fd9a 1983 }
dudmuck 18:9530d682fd9a 1984 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1985 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1986 printf("\r\n");
dudmuck 18:9530d682fd9a 1987 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1988 if (++symbol_sweep_bit_counter == symbol_sweep_bit_counter_stop) {
dudmuck 18:9530d682fd9a 1989 printf("stop\r\n");
dudmuck 18:9530d682fd9a 1990 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1991 }
dudmuck 18:9530d682fd9a 1992 }
dudmuck 18:9530d682fd9a 1993 break;
dudmuck 18:9530d682fd9a 1994 case TXTICKER_STATE_TOGGLE_ALL_BITS_START:
dudmuck 18:9530d682fd9a 1995 tab_current_byte_num = byte_pad_length;
dudmuck 18:9530d682fd9a 1996 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1997 printf("tx ");
dudmuck 18:9530d682fd9a 1998 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1999 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 2000 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 2001 }
dudmuck 18:9530d682fd9a 2002 printf("\r\n");
dudmuck 18:9530d682fd9a 2003 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS;
dudmuck 18:9530d682fd9a 2004 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2005 break;
dudmuck 18:9530d682fd9a 2006 case TXTICKER_STATE_TOGGLE_ALL_BITS:
dudmuck 18:9530d682fd9a 2007 {
dudmuck 18:9530d682fd9a 2008 uint8_t mask = 1 << tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 2009 radio.tx_buf[tab_current_byte_num] = mask;
dudmuck 18:9530d682fd9a 2010 printf("bit%d in [%d]: tx ", tab_current_bit_in_byte, tab_current_byte_num);
dudmuck 18:9530d682fd9a 2011 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 2012 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 2013 }
dudmuck 18:9530d682fd9a 2014 printf("\r\n");
dudmuck 18:9530d682fd9a 2015 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2016 if (++tab_current_bit_in_byte == 8) {
dudmuck 18:9530d682fd9a 2017 radio.tx_buf[tab_current_byte_num] = 0;
dudmuck 18:9530d682fd9a 2018 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 2019 if (++tab_current_byte_num == lora.RegPayloadLength) {
dudmuck 18:9530d682fd9a 2020 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2021 }
dudmuck 18:9530d682fd9a 2022 }
dudmuck 18:9530d682fd9a 2023 }
dudmuck 18:9530d682fd9a 2024 break;
dudmuck 18:9530d682fd9a 2025 default:
dudmuck 18:9530d682fd9a 2026 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2027 break;
dudmuck 18:9530d682fd9a 2028 } // ...switch (txticker_state)
dudmuck 18:9530d682fd9a 2029 }
dudmuck 18:9530d682fd9a 2030
dudmuck 18:9530d682fd9a 2031 void ook_test_tx(int len)
dudmuck 18:9530d682fd9a 2032 {
dudmuck 18:9530d682fd9a 2033 int i;
dudmuck 18:9530d682fd9a 2034 /*
dudmuck 18:9530d682fd9a 2035 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2036 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2037 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 2038 */
dudmuck 18:9530d682fd9a 2039 for (i = 0; i < 4; i++) {
dudmuck 18:9530d682fd9a 2040 radio.tx_buf[i] = 0xaa;
dudmuck 18:9530d682fd9a 2041 }
dudmuck 18:9530d682fd9a 2042
dudmuck 18:9530d682fd9a 2043 printf("ooktx:");
dudmuck 18:9530d682fd9a 2044 for (i = 0; i < len; i++) {
dudmuck 18:9530d682fd9a 2045 radio.tx_buf[i+4] = rand() & 0xff;
dudmuck 18:9530d682fd9a 2046 printf("%02x ", radio.tx_buf[i+4]);
dudmuck 18:9530d682fd9a 2047 }
dudmuck 18:9530d682fd9a 2048 printf("\r\n");
dudmuck 18:9530d682fd9a 2049 fsk.start_tx(len+4);
dudmuck 18:9530d682fd9a 2050
dudmuck 18:9530d682fd9a 2051 while (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 2052 if (poll_irq_en)
dudmuck 18:9530d682fd9a 2053 poll_service_radio();
dudmuck 18:9530d682fd9a 2054 else
dudmuck 18:9530d682fd9a 2055 service_radio();
dudmuck 18:9530d682fd9a 2056 }
dudmuck 18:9530d682fd9a 2057 }
dudmuck 18:9530d682fd9a 2058
dudmuck 18:9530d682fd9a 2059 void cmd_init(uint8_t args_at)
dudmuck 10:d9bb2ce57f05 2060 {
dudmuck 18:9530d682fd9a 2061 printf("init\r\n");
dudmuck 18:9530d682fd9a 2062 radio.init();
dudmuck 18:9530d682fd9a 2063 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2064 fsk.init(); // put FSK modem to some functioning default
dudmuck 18:9530d682fd9a 2065 } else {
dudmuck 18:9530d682fd9a 2066 // lora configuration is more simple
dudmuck 18:9530d682fd9a 2067 }
dudmuck 18:9530d682fd9a 2068 }
dudmuck 18:9530d682fd9a 2069
dudmuck 18:9530d682fd9a 2070 void cmd_per_tx_delay(uint8_t idx)
dudmuck 18:9530d682fd9a 2071 {
dudmuck 18:9530d682fd9a 2072 int i;
dudmuck 18:9530d682fd9a 2073 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2074 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2075 per_tx_delay = i / 1000.0;
dudmuck 18:9530d682fd9a 2076 }
dudmuck 18:9530d682fd9a 2077 printf("per_tx_delay:%dms\r\n", (int)(per_tx_delay * 1000));
dudmuck 18:9530d682fd9a 2078 }
dudmuck 18:9530d682fd9a 2079
dudmuck 21:b84a77dfb43c 2080 const uint8_t test_payload_A[7] = {
dudmuck 21:b84a77dfb43c 2081 0x80, 0x02, 0x58, 0xF5, 0xDF, 0xB8, 0x9E
dudmuck 21:b84a77dfb43c 2082 };
dudmuck 21:b84a77dfb43c 2083
dudmuck 21:b84a77dfb43c 2084 const uint8_t test_payload_B[] = {
dudmuck 21:b84a77dfb43c 2085 0xca, 0xfe, 0xba, 0xbe
dudmuck 21:b84a77dfb43c 2086 };
dudmuck 21:b84a77dfb43c 2087
dudmuck 21:b84a77dfb43c 2088 const uint8_t test_payload_C[0x1a] = {
dudmuck 21:b84a77dfb43c 2089 0x88, 0x39, 0x1F, 0xC6, 0xD3, 0xEB, 0xA4, 0xAC,
dudmuck 21:b84a77dfb43c 2090 0xFB, 0xB9, 0xBA, 0xB9, 0xBE, 0x13, 0x61, 0x4C,
dudmuck 21:b84a77dfb43c 2091 0x43, 0x83, 0x00, 0x92, 0x84, 0x00, 0x6F, 0x87,
dudmuck 21:b84a77dfb43c 2092 0x7C, 0xB2
dudmuck 21:b84a77dfb43c 2093 };
dudmuck 21:b84a77dfb43c 2094
dudmuck 18:9530d682fd9a 2095 void cmd_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2096 {
dudmuck 18:9530d682fd9a 2097 int i;
dudmuck 18:9530d682fd9a 2098 static uint16_t fsk_tx_length;
dudmuck 18:9530d682fd9a 2099
dudmuck 18:9530d682fd9a 2100 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2101 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2102 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2103 lora.RegPayloadLength = i;
dudmuck 18:9530d682fd9a 2104 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2105 }
dudmuck 18:9530d682fd9a 2106
dudmuck 21:b84a77dfb43c 2107 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2108 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2109 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2110 } else {
dudmuck 21:b84a77dfb43c 2111 tx_cnt++;
dudmuck 21:b84a77dfb43c 2112 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2113
dudmuck 21:b84a77dfb43c 2114 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 21:b84a77dfb43c 2115 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2116 }
dudmuck 21:b84a77dfb43c 2117
dudmuck 18:9530d682fd9a 2118 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2119 } else { // FSK:
dudmuck 21:b84a77dfb43c 2120
dudmuck 21:b84a77dfb43c 2121 /* always variable-length format */
dudmuck 21:b84a77dfb43c 2122 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2123 if (!fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 21:b84a77dfb43c 2124 printf("fsk fixed->variable\r\n");
dudmuck 21:b84a77dfb43c 2125 fsk.RegPktConfig1.bits.PacketFormatVariable = 1;
dudmuck 21:b84a77dfb43c 2126 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2127 }
dudmuck 21:b84a77dfb43c 2128
dudmuck 18:9530d682fd9a 2129 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2130 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2131 fsk_tx_length = i;
dudmuck 18:9530d682fd9a 2132 }
dudmuck 18:9530d682fd9a 2133 if (ook_test_en) {
dudmuck 18:9530d682fd9a 2134 ook_test_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2135 } else {
dudmuck 18:9530d682fd9a 2136 if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting
dudmuck 21:b84a77dfb43c 2137 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2138 fsk_tx_length = sizeof(test_payload_A);
dudmuck 21:b84a77dfb43c 2139 memcpy(radio.tx_buf, test_payload_A, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2140 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2141 fsk_tx_length = sizeof(test_payload_B);
dudmuck 21:b84a77dfb43c 2142 memcpy(radio.tx_buf, test_payload_B, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2143 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2144 fsk_tx_length = sizeof(test_payload_C);
dudmuck 21:b84a77dfb43c 2145 memcpy(radio.tx_buf, test_payload_C, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2146 } else {
dudmuck 21:b84a77dfb43c 2147 tx_cnt++;
dudmuck 21:b84a77dfb43c 2148 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2149 for (i = 0; i < fsk_tx_length; i++) {
dudmuck 21:b84a77dfb43c 2150 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2151 }
dudmuck 18:9530d682fd9a 2152 }
dudmuck 21:b84a77dfb43c 2153
dudmuck 18:9530d682fd9a 2154 fsk.start_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2155 }
dudmuck 18:9530d682fd9a 2156 }
dudmuck 18:9530d682fd9a 2157 } // !LoRa
dudmuck 18:9530d682fd9a 2158
dudmuck 18:9530d682fd9a 2159 }
dudmuck 18:9530d682fd9a 2160
dudmuck 21:b84a77dfb43c 2161 volatile uint16_t long_byte_count, long_byte_count_at_full;
dudmuck 21:b84a77dfb43c 2162
dudmuck 21:b84a77dfb43c 2163 const uint8_t test_preamble_sync[] = {
dudmuck 21:b84a77dfb43c 2164 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x33, 0xcb, 0x82
dudmuck 21:b84a77dfb43c 2165 };
dudmuck 21:b84a77dfb43c 2166
dudmuck 21:b84a77dfb43c 2167 void _ulm_write_fifo(uint8_t len)
dudmuck 21:b84a77dfb43c 2168 {
dudmuck 21:b84a77dfb43c 2169 uint8_t i;
dudmuck 21:b84a77dfb43c 2170
dudmuck 21:b84a77dfb43c 2171 //dio2 is FifoFull
dudmuck 21:b84a77dfb43c 2172 radio.m_cs = 0;
dudmuck 21:b84a77dfb43c 2173 radio.m_spi.write(REG_FIFO | 0x80); // bit7 is high for writing to radio
dudmuck 21:b84a77dfb43c 2174
dudmuck 21:b84a77dfb43c 2175 for (i = 0; i < len; ) {
dudmuck 21:b84a77dfb43c 2176 //printf("_%02x\r\n", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 2177 radio.m_spi.write(radio.tx_buf[i++]);
dudmuck 21:b84a77dfb43c 2178 long_byte_count++;
dudmuck 21:b84a77dfb43c 2179 if (dio2) {
dudmuck 21:b84a77dfb43c 2180 long_byte_count_at_full = long_byte_count;
dudmuck 21:b84a77dfb43c 2181 while (radio.dio1)
dudmuck 21:b84a77dfb43c 2182 ;
dudmuck 21:b84a77dfb43c 2183 }
dudmuck 21:b84a77dfb43c 2184 }
dudmuck 21:b84a77dfb43c 2185 radio.m_cs = 1;
dudmuck 21:b84a77dfb43c 2186 }
dudmuck 21:b84a77dfb43c 2187
dudmuck 21:b84a77dfb43c 2188 int write_buf_to_fifo(const uint8_t* send_buf, uint8_t target_length)
dudmuck 21:b84a77dfb43c 2189 {
dudmuck 21:b84a77dfb43c 2190 /* block until all is written */
dudmuck 21:b84a77dfb43c 2191 uint8_t total_sent = 0;
dudmuck 21:b84a77dfb43c 2192
dudmuck 21:b84a77dfb43c 2193 //printf("wbtf %u\r\n", target_length);
dudmuck 21:b84a77dfb43c 2194 while (target_length > total_sent) {
dudmuck 21:b84a77dfb43c 2195 uint8_t this_length = target_length - total_sent;
dudmuck 21:b84a77dfb43c 2196 memcpy(radio.tx_buf+total_sent, send_buf+total_sent, this_length);
dudmuck 21:b84a77dfb43c 2197 _ulm_write_fifo(this_length);
dudmuck 21:b84a77dfb43c 2198 total_sent += this_length;
dudmuck 21:b84a77dfb43c 2199 }
dudmuck 21:b84a77dfb43c 2200 return total_sent;
dudmuck 21:b84a77dfb43c 2201 }
dudmuck 21:b84a77dfb43c 2202
dudmuck 21:b84a77dfb43c 2203 #define TEST_PAYLOAD test_payload_C
dudmuck 21:b84a77dfb43c 2204 //#define TEST_PAYLOAD test_payload_A
dudmuck 21:b84a77dfb43c 2205 void cmd_long_tx(uint8_t idx)
dudmuck 21:b84a77dfb43c 2206 {
dudmuck 21:b84a77dfb43c 2207 unsigned int pkt_cnt = 0;
dudmuck 21:b84a77dfb43c 2208 bool first_pkt;
dudmuck 21:b84a77dfb43c 2209 /* transmit multipe packets without any time between packets (back to back) */
dudmuck 21:b84a77dfb43c 2210
dudmuck 21:b84a77dfb43c 2211 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 2212 sscanf(pcbuf+idx, "%u", &pkt_cnt);
dudmuck 21:b84a77dfb43c 2213 }
dudmuck 21:b84a77dfb43c 2214
dudmuck 21:b84a77dfb43c 2215 printf("tx %u pkts\r\n", pkt_cnt);
dudmuck 21:b84a77dfb43c 2216 if (pkt_cnt < 1)
dudmuck 21:b84a77dfb43c 2217 return;
dudmuck 21:b84a77dfb43c 2218
dudmuck 21:b84a77dfb43c 2219 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 2220 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 21:b84a77dfb43c 2221 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 21:b84a77dfb43c 2222 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 21:b84a77dfb43c 2223 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 2224
dudmuck 21:b84a77dfb43c 2225 //unlimited packet length mode
dudmuck 21:b84a77dfb43c 2226 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2227 fsk.RegPktConfig1.bits.PacketFormatVariable = 0; // fixed length format
dudmuck 21:b84a77dfb43c 2228 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2229
dudmuck 21:b84a77dfb43c 2230 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 21:b84a77dfb43c 2231 fsk.RegPktConfig2.bits.PayloadLength = 0;
dudmuck 21:b84a77dfb43c 2232 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 21:b84a77dfb43c 2233 //DIO3 to FifoEmpty (for end of tx)
dudmuck 21:b84a77dfb43c 2234 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2235 radio.RegDioMapping1.bits.Dio3Mapping = 0; // FifoEmpty
dudmuck 21:b84a77dfb43c 2236 //DIO2 to FifoFull
dudmuck 21:b84a77dfb43c 2237 radio.RegDioMapping1.bits.Dio2Mapping = 0; // FIfoFull
dudmuck 21:b84a77dfb43c 2238 //DIO1 to FifoLevel
dudmuck 21:b84a77dfb43c 2239 radio.RegDioMapping1.bits.Dio1Mapping = 0; // FifoLevel
dudmuck 21:b84a77dfb43c 2240 radio.RegDioMapping1.bits.Dio0Mapping = 0; // PacketSent
dudmuck 21:b84a77dfb43c 2241 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 2242 //FifoThreshold to approx 1/5th full
dudmuck 21:b84a77dfb43c 2243 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 21:b84a77dfb43c 2244 fsk.RegFifoThreshold.bits.FifoThreshold = sizeof(TEST_PAYLOAD)-1; // allow single packet
dudmuck 21:b84a77dfb43c 2245 // tx start condition to FifoLevel
dudmuck 21:b84a77dfb43c 2246 fsk.RegFifoThreshold.bits.TxStartCondition = 0; // start on FifoLevel
dudmuck 21:b84a77dfb43c 2247 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 21:b84a77dfb43c 2248
dudmuck 21:b84a77dfb43c 2249 long_byte_count = 0;
dudmuck 21:b84a77dfb43c 2250 long_byte_count_at_full = 0xffff;
dudmuck 21:b84a77dfb43c 2251
dudmuck 21:b84a77dfb43c 2252 radio.set_opmode(RF_OPMODE_TRANSMITTER);
dudmuck 21:b84a77dfb43c 2253 first_pkt = true; // preamble+sync sent by packet engine only for first packet
dudmuck 21:b84a77dfb43c 2254 for (; pkt_cnt > 0; pkt_cnt--) {
dudmuck 21:b84a77dfb43c 2255 uint8_t len;
dudmuck 21:b84a77dfb43c 2256 if (first_pkt)
dudmuck 21:b84a77dfb43c 2257 first_pkt = false;
dudmuck 21:b84a77dfb43c 2258 else {
dudmuck 21:b84a77dfb43c 2259 if (dio3) {
dudmuck 21:b84a77dfb43c 2260 printf("fail-empty\r\n");
dudmuck 21:b84a77dfb43c 2261 }
dudmuck 21:b84a77dfb43c 2262 write_buf_to_fifo(test_preamble_sync, sizeof(test_preamble_sync));
dudmuck 21:b84a77dfb43c 2263 }
dudmuck 21:b84a77dfb43c 2264
dudmuck 21:b84a77dfb43c 2265 len = sizeof(TEST_PAYLOAD); //TEST_PAYLOAD doesnt start with length
dudmuck 21:b84a77dfb43c 2266 write_buf_to_fifo(&len, 1);
dudmuck 21:b84a77dfb43c 2267 write_buf_to_fifo(TEST_PAYLOAD, sizeof(TEST_PAYLOAD));
dudmuck 21:b84a77dfb43c 2268 } // ..
dudmuck 21:b84a77dfb43c 2269
dudmuck 21:b84a77dfb43c 2270 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2271 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2272 while (!dio3) {
dudmuck 21:b84a77dfb43c 2273 if (rx_start_timer.read() > 1) {
dudmuck 21:b84a77dfb43c 2274 printf("fifoEmpty fail\r\n");
dudmuck 21:b84a77dfb43c 2275 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2276 return;
dudmuck 21:b84a77dfb43c 2277 }
dudmuck 21:b84a77dfb43c 2278 }
dudmuck 21:b84a77dfb43c 2279
dudmuck 21:b84a77dfb43c 2280 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2281 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2282 while (!radio.dio0) {
dudmuck 21:b84a77dfb43c 2283 if (rx_start_timer.read() > 3) {
dudmuck 21:b84a77dfb43c 2284 printf("PacketSent fail\r\n");
dudmuck 21:b84a77dfb43c 2285 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2286 return;
dudmuck 21:b84a77dfb43c 2287 }
dudmuck 21:b84a77dfb43c 2288 }
dudmuck 21:b84a77dfb43c 2289 wait_us(100);
dudmuck 21:b84a77dfb43c 2290 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2291 printf("done ok %u, %u\r\n", long_byte_count, long_byte_count_at_full);
dudmuck 21:b84a77dfb43c 2292
dudmuck 21:b84a77dfb43c 2293 }
dudmuck 21:b84a77dfb43c 2294
dudmuck 18:9530d682fd9a 2295 void cmd_hw_reset(uint8_t idx)
dudmuck 18:9530d682fd9a 2296 {
dudmuck 18:9530d682fd9a 2297 printf("hw_reset()\r\n");
dudmuck 18:9530d682fd9a 2298 radio.hw_reset();
dudmuck 18:9530d682fd9a 2299 ook_test_en = false;
dudmuck 18:9530d682fd9a 2300 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2301 }
dudmuck 18:9530d682fd9a 2302
dudmuck 18:9530d682fd9a 2303 void cmd_read_all_regs(uint8_t idx)
dudmuck 18:9530d682fd9a 2304 {
dudmuck 18:9530d682fd9a 2305 uint8_t a, d;
dudmuck 18:9530d682fd9a 2306
dudmuck 18:9530d682fd9a 2307 // read all registers
dudmuck 18:9530d682fd9a 2308 for (a = 1; a < 0x71; a++) {
dudmuck 18:9530d682fd9a 2309 d = radio.read_reg(a);
dudmuck 18:9530d682fd9a 2310 printf("%02x: %02x\r\n", a, d);
dudmuck 18:9530d682fd9a 2311 }
dudmuck 18:9530d682fd9a 2312 }
dudmuck 18:9530d682fd9a 2313
dudmuck 18:9530d682fd9a 2314 void cmd_read_current_rssi(uint8_t idx)
dudmuck 18:9530d682fd9a 2315 {
dudmuck 18:9530d682fd9a 2316 if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2317 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2318 wait_us(10000);
dudmuck 18:9530d682fd9a 2319 }
dudmuck 18:9530d682fd9a 2320 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2321 printf("rssi:%ddBm\r\n", lora.get_current_rssi());
dudmuck 18:9530d682fd9a 2322 else
dudmuck 18:9530d682fd9a 2323 printf("rssi:-%.1f\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 18:9530d682fd9a 2324 }
dudmuck 18:9530d682fd9a 2325
dudmuck 21:b84a77dfb43c 2326 void cmd_rssi_polling(uint8_t idx)
dudmuck 21:b84a77dfb43c 2327 {
dudmuck 21:b84a77dfb43c 2328 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 21:b84a77dfb43c 2329 sscanf(pcbuf+idx, "%d", &rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2330 }
dudmuck 21:b84a77dfb43c 2331 printf("rssi_polling_thresh:%d\r\n", rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2332 }
dudmuck 21:b84a77dfb43c 2333
dudmuck 18:9530d682fd9a 2334 void cmd_lora_continuous_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2335 {
dudmuck 18:9530d682fd9a 2336 /* TxContinuousMode same for sx1272 and sx1276 */
dudmuck 18:9530d682fd9a 2337 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2338 lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1;
dudmuck 18:9530d682fd9a 2339 radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet);
dudmuck 18:9530d682fd9a 2340 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 13:c73caaee93a5 2341
dudmuck 18:9530d682fd9a 2342 lora_printTxContinuousMode();
dudmuck 18:9530d682fd9a 2343 printf("\r\n");
dudmuck 18:9530d682fd9a 2344 }
dudmuck 18:9530d682fd9a 2345
dudmuck 18:9530d682fd9a 2346 void cmd_fsk_test_case(uint8_t idx)
dudmuck 18:9530d682fd9a 2347 {
dudmuck 18:9530d682fd9a 2348 if (pcbuf[idx] < '0' || pcbuf[idx] > '9') {
dudmuck 19:be8a8b0e7320 2349 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2350 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 2351 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 2352 } else {
dudmuck 18:9530d682fd9a 2353 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2354 per_tx_delay = 0.3;
dudmuck 18:9530d682fd9a 2355
dudmuck 18:9530d682fd9a 2356 if (radio.read_reg(REG_FSK_SYNCVALUE1) == 0x55 && radio.read_reg(REG_FSK_SYNCVALUE2)) {
dudmuck 18:9530d682fd9a 2357 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2358 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 18:9530d682fd9a 2359 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2360 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 18:9530d682fd9a 2361 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 18:9530d682fd9a 2362 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 18:9530d682fd9a 2363 }
dudmuck 18:9530d682fd9a 2364
dudmuck 18:9530d682fd9a 2365 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 18:9530d682fd9a 2366 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2367 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2368
dudmuck 18:9530d682fd9a 2369 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2370 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 18:9530d682fd9a 2371 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 20:b11592c9ba5f 2372 fsk.RegRxConfig.bits.RxTrigger = 7; // both
dudmuck 18:9530d682fd9a 2373 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2374
dudmuck 18:9530d682fd9a 2375 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2376 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 18:9530d682fd9a 2377 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 18:9530d682fd9a 2378 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2379
dudmuck 18:9530d682fd9a 2380 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 2381 case '0':
dudmuck 18:9530d682fd9a 2382 fsk.set_bitrate(4800);
dudmuck 18:9530d682fd9a 2383 fsk.set_tx_fdev_hz(5005);
dudmuck 18:9530d682fd9a 2384 fsk.set_rx_dcc_bw_hz(10417, 0); // rxbw
dudmuck 18:9530d682fd9a 2385 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2386 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2387 break;
dudmuck 18:9530d682fd9a 2388 case '1':
dudmuck 18:9530d682fd9a 2389 fsk.set_bitrate(50000);
dudmuck 18:9530d682fd9a 2390 fsk.set_tx_fdev_hz(25000);
dudmuck 18:9530d682fd9a 2391 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 18:9530d682fd9a 2392 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2393 radio.write_u16(REG_FSK_PREAMBLEMSB, 9);
dudmuck 18:9530d682fd9a 2394 break;
dudmuck 18:9530d682fd9a 2395 case '2':
dudmuck 18:9530d682fd9a 2396 fsk.set_bitrate(38400);
dudmuck 18:9530d682fd9a 2397 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2398 fsk.set_rx_dcc_bw_hz(50000, 0); // rxbw
dudmuck 18:9530d682fd9a 2399 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2400 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2401 break;
dudmuck 18:9530d682fd9a 2402 case '3':
dudmuck 18:9530d682fd9a 2403 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2404 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2405 fsk.set_rx_dcc_bw_hz(25000, 0); // rxbw
dudmuck 18:9530d682fd9a 2406 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2407 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2408 break;
dudmuck 18:9530d682fd9a 2409 case '4':
dudmuck 18:9530d682fd9a 2410 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2411 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2412 fsk.set_rx_dcc_bw_hz(7813, 0); // rxbw
dudmuck 18:9530d682fd9a 2413 fsk.set_rx_dcc_bw_hz(25000, 1); // afcbw
dudmuck 18:9530d682fd9a 2414 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2415 break;
dudmuck 18:9530d682fd9a 2416 case '5':
dudmuck 18:9530d682fd9a 2417 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2418 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2419 fsk.set_rx_dcc_bw_hz(5208, 0); // rxbw
dudmuck 18:9530d682fd9a 2420 fsk.set_rx_dcc_bw_hz(10417, 1); // afcbw
dudmuck 18:9530d682fd9a 2421 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 20:b11592c9ba5f 2422 break;
dudmuck 20:b11592c9ba5f 2423 case '6':
dudmuck 20:b11592c9ba5f 2424 fsk.set_bitrate(65536);
dudmuck 20:b11592c9ba5f 2425 fsk.set_tx_fdev_hz(16384);
dudmuck 20:b11592c9ba5f 2426 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 20:b11592c9ba5f 2427 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 21:b84a77dfb43c 2428
dudmuck 21:b84a77dfb43c 2429 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2430 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 2431 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2432
dudmuck 20:b11592c9ba5f 2433 radio.write_u16(REG_FSK_PREAMBLEMSB, 5);
dudmuck 20:b11592c9ba5f 2434 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 20:b11592c9ba5f 2435 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 21:b84a77dfb43c 2436 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 20:b11592c9ba5f 2437 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 2438 radio.write_reg(REG_FSK_SYNCVALUE1, 0x33);
dudmuck 20:b11592c9ba5f 2439 radio.write_reg(REG_FSK_SYNCVALUE2, 0xcb);
dudmuck 21:b84a77dfb43c 2440 radio.write_reg(REG_FSK_SYNCVALUE3, 0x82);
dudmuck 21:b84a77dfb43c 2441
dudmuck 21:b84a77dfb43c 2442 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 2443 radio.RegOpMode.bits.ModulationType = 0; // 0 = FSK
dudmuck 21:b84a77dfb43c 2444 radio.RegOpMode.bits.ModulationShaping = 2; // 2=BT0.5
dudmuck 21:b84a77dfb43c 2445 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 2446
dudmuck 21:b84a77dfb43c 2447 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 21:b84a77dfb43c 2448 fsk.RegAfcFei.bits.AfcAutoClearOn = 0;
dudmuck 21:b84a77dfb43c 2449 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 20:b11592c9ba5f 2450
dudmuck 20:b11592c9ba5f 2451 fsk.RegRxConfig.bits.RxTrigger = 6; // preamble
dudmuck 20:b11592c9ba5f 2452 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2453 radio.RegDioMapping2.bits.Dio4Mapping = 3;
dudmuck 20:b11592c9ba5f 2454 radio.RegDioMapping2.bits.MapPreambleDetect = 1; // dio4 to preambleDetect in RX
dudmuck 20:b11592c9ba5f 2455 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 20:b11592c9ba5f 2456 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to SyncAddress in RX
dudmuck 20:b11592c9ba5f 2457 radio.RegDioMapping1.bits.Dio1Mapping = 1; // to FifoEmpty
dudmuck 20:b11592c9ba5f 2458 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 20:b11592c9ba5f 2459 break;
dudmuck 18:9530d682fd9a 2460 } // ...switch (pcbuf[idx])
dudmuck 19:be8a8b0e7320 2461 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2462 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 20:b11592c9ba5f 2463 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 20:b11592c9ba5f 2464
dudmuck 20:b11592c9ba5f 2465 /* time between preamble occurring and syncAddress occuring
dudmuck 20:b11592c9ba5f 2466 * = bitrate in microseconds * 8 * (preamble bytes + sync bytes)
dudmuck 20:b11592c9ba5f 2467 */
dudmuck 20:b11592c9ba5f 2468 preamble_to_sync_us = (1.0 / fsk.get_bitrate())*1e6 * 8 * (radio.read_u16(REG_FSK_PREAMBLEMSB)+1 + fsk.RegSyncConfig.bits.SyncSize+2);
dudmuck 20:b11592c9ba5f 2469 //printf("bitrate:%d, %f\r\n", fsk.get_bitrate(), 1.0 / fsk.get_bitrate()*1e6);
dudmuck 20:b11592c9ba5f 2470 printf("preamble_to_sync_us:%d\r\n", preamble_to_sync_us);
dudmuck 18:9530d682fd9a 2471 }
dudmuck 18:9530d682fd9a 2472 }
dudmuck 18:9530d682fd9a 2473
dudmuck 20:b11592c9ba5f 2474 void cmd_restart_rx(uint8_t idx)
dudmuck 20:b11592c9ba5f 2475 {
dudmuck 20:b11592c9ba5f 2476 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 20:b11592c9ba5f 2477 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 20:b11592c9ba5f 2478 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2479 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 2480 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 2481 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 0;
dudmuck 20:b11592c9ba5f 2482 printf("RestartRxWithoutPllLock\r\n");
dudmuck 20:b11592c9ba5f 2483 }
dudmuck 20:b11592c9ba5f 2484
dudmuck 18:9530d682fd9a 2485 void cmd_toggle_modem(uint8_t idx)
dudmuck 18:9530d682fd9a 2486 {
dudmuck 18:9530d682fd9a 2487 ook_test_en = false;
dudmuck 18:9530d682fd9a 2488 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2489 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2490 fsk.enable(false);
dudmuck 18:9530d682fd9a 2491 else
dudmuck 18:9530d682fd9a 2492 lora.enable();
dudmuck 18:9530d682fd9a 2493
dudmuck 18:9530d682fd9a 2494 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2495 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2496 printf("LoRa\r\n");
dudmuck 18:9530d682fd9a 2497 else
dudmuck 18:9530d682fd9a 2498 printf("FSK\r\n");
dudmuck 18:9530d682fd9a 2499 }
dudmuck 18:9530d682fd9a 2500
dudmuck 18:9530d682fd9a 2501 void cmd_empty_fifo(uint8_t idx)
dudmuck 18:9530d682fd9a 2502 {
dudmuck 18:9530d682fd9a 2503 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 2504 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2505 while (!RegIrqFlags2.bits.FifoEmpty) {
dudmuck 18:9530d682fd9a 2506 if (pc.readable())
dudmuck 18:9530d682fd9a 2507 break;
dudmuck 18:9530d682fd9a 2508 printf("%02x\r\n", radio.read_reg(REG_FIFO));
dudmuck 18:9530d682fd9a 2509 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2510 }
dudmuck 18:9530d682fd9a 2511 }
dudmuck 18:9530d682fd9a 2512
dudmuck 18:9530d682fd9a 2513 void cmd_print_status(uint8_t idx)
dudmuck 18:9530d682fd9a 2514 {
dudmuck 18:9530d682fd9a 2515 if (radio.type == SX1276) {
dudmuck 22:2005df80c8a8 2516 #if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
dudmuck 18:9530d682fd9a 2517 printf("\r\nSX1276 ");
dudmuck 18:9530d682fd9a 2518 #else
dudmuck 18:9530d682fd9a 2519 if (shield_type == SHIELD_TYPE_LAS)
dudmuck 18:9530d682fd9a 2520 printf("\r\nSX1276LAS ");
dudmuck 18:9530d682fd9a 2521 if (shield_type == SHIELD_TYPE_MAS)
dudmuck 18:9530d682fd9a 2522 printf("\r\nSX1276MAS ");
dudmuck 18:9530d682fd9a 2523 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 2524 } else if (radio.type == SX1272)
dudmuck 18:9530d682fd9a 2525 printf("\r\nSX1272 ");
dudmuck 18:9530d682fd9a 2526
dudmuck 18:9530d682fd9a 2527 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2528 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2529 lora_print_status();
dudmuck 18:9530d682fd9a 2530 else
dudmuck 18:9530d682fd9a 2531 fsk_print_status();
dudmuck 18:9530d682fd9a 2532 common_print_status();
dudmuck 18:9530d682fd9a 2533 }
dudmuck 18:9530d682fd9a 2534
dudmuck 18:9530d682fd9a 2535 void cmd_hop_period(uint8_t idx)
dudmuck 18:9530d682fd9a 2536 {
dudmuck 18:9530d682fd9a 2537 int i;
dudmuck 18:9530d682fd9a 2538 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2539 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2540 lora.RegHopPeriod = i;
dudmuck 18:9530d682fd9a 2541 radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2542 if (radio.RegDioMapping1.bits.Dio1Mapping != 1) {
dudmuck 18:9530d682fd9a 2543 radio.RegDioMapping1.bits.Dio1Mapping = 1;
dudmuck 18:9530d682fd9a 2544 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2545 }
dudmuck 18:9530d682fd9a 2546 }
dudmuck 18:9530d682fd9a 2547 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 18:9530d682fd9a 2548 printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2549 }
dudmuck 18:9530d682fd9a 2550
dudmuck 18:9530d682fd9a 2551 void cmd_lora_ppg(uint8_t idx)
dudmuck 18:9530d682fd9a 2552 {
dudmuck 18:9530d682fd9a 2553 int i;
dudmuck 18:9530d682fd9a 2554 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 2555 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2556 radio.write_reg(REG_LR_SYNC_BYTE, i);
dudmuck 18:9530d682fd9a 2557 }
dudmuck 18:9530d682fd9a 2558 printf("lora sync:0x%02x\r\n", radio.read_reg(REG_LR_SYNC_BYTE));
dudmuck 18:9530d682fd9a 2559 }
dudmuck 18:9530d682fd9a 2560
dudmuck 18:9530d682fd9a 2561 void cmd_rssi_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 2562 {
dudmuck 18:9530d682fd9a 2563 int i;
dudmuck 18:9530d682fd9a 2564 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2565 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2566 fsk.RegRssiConfig.bits.RssiOffset = i;
dudmuck 18:9530d682fd9a 2567 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2568 }
dudmuck 18:9530d682fd9a 2569 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2570 printf("RssiOffset:%d\r\n", fsk.RegRssiConfig.bits.RssiOffset);
dudmuck 18:9530d682fd9a 2571 }
dudmuck 18:9530d682fd9a 2572
dudmuck 18:9530d682fd9a 2573 void cmd_rssi_smoothing(uint8_t idx)
dudmuck 18:9530d682fd9a 2574 {
dudmuck 18:9530d682fd9a 2575 int i;
dudmuck 18:9530d682fd9a 2576 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2577 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2578 fsk.RegRssiConfig.bits.RssiSmoothing = i;
dudmuck 18:9530d682fd9a 2579 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2580 }
dudmuck 18:9530d682fd9a 2581 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2582 printf("RssiSmoothing:%d\r\n", fsk.RegRssiConfig.bits.RssiSmoothing);
dudmuck 18:9530d682fd9a 2583 }
dudmuck 18:9530d682fd9a 2584
dudmuck 18:9530d682fd9a 2585 void cmd_rssi_threshold(uint8_t idx)
dudmuck 18:9530d682fd9a 2586 {
dudmuck 19:be8a8b0e7320 2587 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 2588 float dbm;
dudmuck 18:9530d682fd9a 2589 sscanf(pcbuf+idx, "%f", &dbm);
dudmuck 18:9530d682fd9a 2590 dbm *= (float)2.0;
dudmuck 18:9530d682fd9a 2591 fsk.RegRssiThresh = (int)fabs(dbm);
dudmuck 18:9530d682fd9a 2592 radio.write_reg(REG_FSK_RSSITHRESH, fsk.RegRssiThresh);
dudmuck 18:9530d682fd9a 2593 }
dudmuck 18:9530d682fd9a 2594 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 18:9530d682fd9a 2595 printf("rssiThreshold:-%.1f\r\n", fsk.RegRssiThresh / 2.0);
dudmuck 18:9530d682fd9a 2596 }
dudmuck 18:9530d682fd9a 2597
dudmuck 18:9530d682fd9a 2598 void cmd_rx_trigger(uint8_t idx)
dudmuck 18:9530d682fd9a 2599 {
dudmuck 18:9530d682fd9a 2600 printf("RxTrigger:");
dudmuck 18:9530d682fd9a 2601 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 18:9530d682fd9a 2602 case 0: fsk.RegRxConfig.bits.RxTrigger = 1;
dudmuck 18:9530d682fd9a 2603 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2604 break;
dudmuck 18:9530d682fd9a 2605 case 1: fsk.RegRxConfig.bits.RxTrigger = 6;
dudmuck 18:9530d682fd9a 2606 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2607 break;
dudmuck 18:9530d682fd9a 2608 case 6: fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 2609 printf("both\r\n");
dudmuck 18:9530d682fd9a 2610 break;
dudmuck 18:9530d682fd9a 2611 case 7: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2612 printf("none\r\n");
dudmuck 18:9530d682fd9a 2613 break;
dudmuck 18:9530d682fd9a 2614 default: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2615 printf("none\r\n");
dudmuck 18:9530d682fd9a 2616 break;
dudmuck 18:9530d682fd9a 2617 }
dudmuck 18:9530d682fd9a 2618 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2619 }
dudmuck 18:9530d682fd9a 2620
dudmuck 18:9530d682fd9a 2621 void cmd_cadper(uint8_t idx)
dudmuck 18:9530d682fd9a 2622 {
dudmuck 18:9530d682fd9a 2623 set_per_en(true);
dudmuck 18:9530d682fd9a 2624
dudmuck 18:9530d682fd9a 2625 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 2626 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 2627 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 2628 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 2629
dudmuck 18:9530d682fd9a 2630 cadper_enable = true;
dudmuck 18:9530d682fd9a 2631
dudmuck 18:9530d682fd9a 2632 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2633 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2634 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2635
dudmuck 18:9530d682fd9a 2636 /* start first CAD */
dudmuck 18:9530d682fd9a 2637 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2638 num_cads = 0;
dudmuck 18:9530d682fd9a 2639 }
dudmuck 18:9530d682fd9a 2640
dudmuck 18:9530d682fd9a 2641 #if 0
dudmuck 18:9530d682fd9a 2642 void cmd_cadrx(uint8_t idx)
dudmuck 18:9530d682fd9a 2643 {
dudmuck 18:9530d682fd9a 2644 int n_tries = 1;
dudmuck 18:9530d682fd9a 2645 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2646 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2647 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2648
dudmuck 18:9530d682fd9a 2649 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2650 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2651 }
dudmuck 18:9530d682fd9a 2652
dudmuck 18:9530d682fd9a 2653 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2654 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2655
dudmuck 18:9530d682fd9a 2656 do {
dudmuck 18:9530d682fd9a 2657 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2658 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2659 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2660 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2661 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2662 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2663 }
dudmuck 18:9530d682fd9a 2664 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2665 printf("CadDone ");
dudmuck 18:9530d682fd9a 2666 }
dudmuck 18:9530d682fd9a 2667
dudmuck 18:9530d682fd9a 2668 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2669 printf("\r\n");
dudmuck 18:9530d682fd9a 2670 n_tries--;
dudmuck 18:9530d682fd9a 2671 }
dudmuck 18:9530d682fd9a 2672 }
dudmuck 18:9530d682fd9a 2673 #endif /* #if 0 */
dudmuck 18:9530d682fd9a 2674
dudmuck 18:9530d682fd9a 2675 void cmd_cad(uint8_t idx)
dudmuck 18:9530d682fd9a 2676 {
dudmuck 18:9530d682fd9a 2677 int n_tries = 1;
dudmuck 18:9530d682fd9a 2678 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2679 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2680 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2681
dudmuck 18:9530d682fd9a 2682 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2683 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2684 }
dudmuck 18:9530d682fd9a 2685
dudmuck 18:9530d682fd9a 2686 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2687 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2688
dudmuck 18:9530d682fd9a 2689 do {
dudmuck 18:9530d682fd9a 2690 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2691 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2692 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2693 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2694 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2695 }
dudmuck 18:9530d682fd9a 2696 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2697 if (n_tries == 1) // print on last try
dudmuck 18:9530d682fd9a 2698 printf("CadDone ");
dudmuck 18:9530d682fd9a 2699 }
dudmuck 18:9530d682fd9a 2700
dudmuck 18:9530d682fd9a 2701 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2702 n_tries--;
dudmuck 18:9530d682fd9a 2703 }
dudmuck 18:9530d682fd9a 2704 printf("\r\n");
dudmuck 18:9530d682fd9a 2705 }
dudmuck 18:9530d682fd9a 2706
dudmuck 18:9530d682fd9a 2707 void cmd_rx_timeout(uint8_t idx)
dudmuck 18:9530d682fd9a 2708 {
dudmuck 18:9530d682fd9a 2709 int symb_timeout;
dudmuck 18:9530d682fd9a 2710 uint16_t reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2711
dudmuck 18:9530d682fd9a 2712 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2713 sscanf(pcbuf+idx, "%d", &symb_timeout);
dudmuck 18:9530d682fd9a 2714 reg_u16 &= 0xfc00;
dudmuck 18:9530d682fd9a 2715 reg_u16 |= symb_timeout;
dudmuck 22:2005df80c8a8 2716 radio.write_u16(REG_LR_MODEMCONFIG2, reg_u16);
dudmuck 18:9530d682fd9a 2717 }
dudmuck 18:9530d682fd9a 2718 reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2719 printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
dudmuck 18:9530d682fd9a 2720 }
dudmuck 18:9530d682fd9a 2721
dudmuck 18:9530d682fd9a 2722 void cmd_rx_single(uint8_t idx)
dudmuck 18:9530d682fd9a 2723 {
dudmuck 18:9530d682fd9a 2724 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2725 }
dudmuck 18:9530d682fd9a 2726
dudmuck 21:b84a77dfb43c 2727 void preamble_without_sync()
dudmuck 21:b84a77dfb43c 2728 {
dudmuck 21:b84a77dfb43c 2729 printf("preamble_without_sync Afc:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 21:b84a77dfb43c 2730 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 21:b84a77dfb43c 2731 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 21:b84a77dfb43c 2732 }
dudmuck 21:b84a77dfb43c 2733
dudmuck 21:b84a77dfb43c 2734 Timeout pd_timeout;
dudmuck 21:b84a77dfb43c 2735 Timeout sync_timeout;
dudmuck 21:b84a77dfb43c 2736 void preamble_detect_isr()
dudmuck 21:b84a77dfb43c 2737 {
dudmuck 21:b84a77dfb43c 2738 // only used between frames, on background noise
dudmuck 21:b84a77dfb43c 2739 pd_timeout.attach_us(&preamble_without_sync, 1500); // 122us per byte
dudmuck 21:b84a77dfb43c 2740 }
dudmuck 21:b84a77dfb43c 2741
dudmuck 18:9530d682fd9a 2742 void cmd_rx(uint8_t idx)
dudmuck 18:9530d682fd9a 2743 {
dudmuck 18:9530d682fd9a 2744 set_per_en(false);
dudmuck 18:9530d682fd9a 2745
dudmuck 18:9530d682fd9a 2746 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2747 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2748 else {
dudmuck 20:b11592c9ba5f 2749 if (poll_irq_en) {
dudmuck 20:b11592c9ba5f 2750 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2751 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2752 }
dudmuck 20:b11592c9ba5f 2753
dudmuck 20:b11592c9ba5f 2754 rx_start_timer.start();
dudmuck 20:b11592c9ba5f 2755 secs_rx_start = time(NULL);
dudmuck 18:9530d682fd9a 2756 fsk.start_rx();
dudmuck 18:9530d682fd9a 2757 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2758 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2759 if (radio.HF) {
dudmuck 18:9530d682fd9a 2760 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2761 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2762 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2763 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 21:b84a77dfb43c 2764 }
dudmuck 21:b84a77dfb43c 2765
dudmuck 21:b84a77dfb43c 2766 // sync shadow regsiters
dudmuck 21:b84a77dfb43c 2767 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2768 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 18:9530d682fd9a 2769 }
dudmuck 18:9530d682fd9a 2770 }
dudmuck 18:9530d682fd9a 2771
dudmuck 18:9530d682fd9a 2772 void cmd_radio_reg_read(uint8_t idx)
dudmuck 18:9530d682fd9a 2773 {
dudmuck 18:9530d682fd9a 2774 int i;
dudmuck 18:9530d682fd9a 2775 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2776 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2777 }
dudmuck 18:9530d682fd9a 2778
dudmuck 18:9530d682fd9a 2779 void cmd_radio_reg_write(uint8_t idx)
dudmuck 18:9530d682fd9a 2780 {
dudmuck 18:9530d682fd9a 2781 int i, n;
dudmuck 18:9530d682fd9a 2782 sscanf(pcbuf+idx, "%x %x", &i, &n);
dudmuck 18:9530d682fd9a 2783 radio.write_reg(i, n);
dudmuck 18:9530d682fd9a 2784 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2785 }
dudmuck 18:9530d682fd9a 2786
dudmuck 18:9530d682fd9a 2787 void cmd_mod_shaping(uint8_t idx)
dudmuck 18:9530d682fd9a 2788 {
dudmuck 18:9530d682fd9a 2789 uint8_t s = fsk.get_modulation_shaping();
dudmuck 18:9530d682fd9a 2790
dudmuck 18:9530d682fd9a 2791 if (s == 3)
dudmuck 18:9530d682fd9a 2792 s = 0;
dudmuck 18:9530d682fd9a 2793 else
dudmuck 18:9530d682fd9a 2794 s++;
dudmuck 18:9530d682fd9a 2795
dudmuck 18:9530d682fd9a 2796 fsk.set_modulation_shaping(s);
dudmuck 18:9530d682fd9a 2797
dudmuck 18:9530d682fd9a 2798 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 18:9530d682fd9a 2799 printf("FSK ");
dudmuck 18:9530d682fd9a 2800 switch (s) {
dudmuck 18:9530d682fd9a 2801 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2802 case 1: printf("BT1.0 "); break;
dudmuck 18:9530d682fd9a 2803 case 2: printf("BT0.5 "); break;
dudmuck 18:9530d682fd9a 2804 case 3: printf("BT0.3 "); break;
dudmuck 18:9530d682fd9a 2805 }
dudmuck 18:9530d682fd9a 2806 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 18:9530d682fd9a 2807 printf("OOK ");
dudmuck 18:9530d682fd9a 2808 switch (s) {
dudmuck 18:9530d682fd9a 2809 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2810 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 2811 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 2812 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 2813 }
dudmuck 18:9530d682fd9a 2814 }
dudmuck 18:9530d682fd9a 2815
dudmuck 18:9530d682fd9a 2816 printf("\r\n");
dudmuck 18:9530d682fd9a 2817 }
dudmuck 18:9530d682fd9a 2818
dudmuck 18:9530d682fd9a 2819 void cmd_MapPreambleDetect(uint8_t idx)
dudmuck 18:9530d682fd9a 2820 {
dudmuck 18:9530d682fd9a 2821 radio.RegDioMapping2.bits.MapPreambleDetect ^= 1;
dudmuck 18:9530d682fd9a 2822 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2823 printf("MapPreambleDetect:");
dudmuck 18:9530d682fd9a 2824 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 18:9530d682fd9a 2825 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2826 else
dudmuck 18:9530d682fd9a 2827 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2828 }
dudmuck 18:9530d682fd9a 2829
dudmuck 18:9530d682fd9a 2830 void cmd_bgr(uint8_t idx)
dudmuck 18:9530d682fd9a 2831 {
dudmuck 18:9530d682fd9a 2832 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2833 uint8_t adr;
dudmuck 18:9530d682fd9a 2834 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2835 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2836 else
dudmuck 18:9530d682fd9a 2837 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2838
dudmuck 18:9530d682fd9a 2839 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2840 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2841 int i;
dudmuck 18:9530d682fd9a 2842 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2843 pds_trim.bits.prog_txdac = i;
dudmuck 18:9530d682fd9a 2844 }
dudmuck 18:9530d682fd9a 2845 radio.write_reg(adr, pds_trim.octet);
dudmuck 18:9530d682fd9a 2846 printf("prog_txdac:%.1fuA\r\n", 2.5 + (pds_trim.bits.prog_txdac * 0.625));
dudmuck 18:9530d682fd9a 2847 /* increase OCP threshold to allow more power */
dudmuck 18:9530d682fd9a 2848 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2849 if (radio.RegOcp.bits.OcpTrim < 16) {
dudmuck 18:9530d682fd9a 2850 radio.RegOcp.bits.OcpTrim = 16;
dudmuck 18:9530d682fd9a 2851 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2852 }
dudmuck 18:9530d682fd9a 2853 }
dudmuck 18:9530d682fd9a 2854
dudmuck 18:9530d682fd9a 2855 void cmd_ook(uint8_t idx)
dudmuck 18:9530d682fd9a 2856 {
dudmuck 18:9530d682fd9a 2857 fsk.set_bitrate(32768);
dudmuck 18:9530d682fd9a 2858 radio.write_u16(REG_FSK_PREAMBLEMSB, 0); // zero preamble length
dudmuck 18:9530d682fd9a 2859 radio.RegOpMode.bits.ModulationType = 1; // to ook mode
dudmuck 18:9530d682fd9a 2860 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 18:9530d682fd9a 2861 fsk.RegSyncConfig.bits.SyncOn = 0;
dudmuck 18:9530d682fd9a 2862 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2863 ook_test_en = true;
dudmuck 18:9530d682fd9a 2864 printf("OOK\r\n");
dudmuck 18:9530d682fd9a 2865 }
dudmuck 18:9530d682fd9a 2866
dudmuck 18:9530d682fd9a 2867 void cmd_ocp(uint8_t idx)
dudmuck 18:9530d682fd9a 2868 {
dudmuck 18:9530d682fd9a 2869 int i;
dudmuck 18:9530d682fd9a 2870 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2871 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2872 if (i < 130)
dudmuck 18:9530d682fd9a 2873 radio.RegOcp.bits.OcpTrim = (i - 45) / 5;
dudmuck 18:9530d682fd9a 2874 else
dudmuck 18:9530d682fd9a 2875 radio.RegOcp.bits.OcpTrim = (i + 30) / 10;
dudmuck 18:9530d682fd9a 2876 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2877 }
dudmuck 18:9530d682fd9a 2878 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2879 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 18:9530d682fd9a 2880 i = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 18:9530d682fd9a 2881 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 18:9530d682fd9a 2882 i = (10 * radio.RegOcp.bits.OcpTrim) - 30;
dudmuck 18:9530d682fd9a 2883 else
dudmuck 18:9530d682fd9a 2884 i = 240;
dudmuck 18:9530d682fd9a 2885 printf("Ocp: %dmA\r\n", i);
dudmuck 18:9530d682fd9a 2886 }
dudmuck 18:9530d682fd9a 2887
dudmuck 18:9530d682fd9a 2888 void cmd_op(uint8_t idx)
dudmuck 18:9530d682fd9a 2889 {
dudmuck 18:9530d682fd9a 2890 int i, dbm;
dudmuck 18:9530d682fd9a 2891 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2892 uint8_t adr;
dudmuck 18:9530d682fd9a 2893 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2894 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2895 else
dudmuck 18:9530d682fd9a 2896 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2897
dudmuck 18:9530d682fd9a 2898 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2899
dudmuck 19:be8a8b0e7320 2900 if (pcbuf[idx] >= '0' && (pcbuf[idx] <= '9' || pcbuf[idx] == '-')) {
dudmuck 18:9530d682fd9a 2901 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2902 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2903 /* PABOOST used: +2dbm to +17, or +20 */
dudmuck 18:9530d682fd9a 2904 if (i == 20) {
dudmuck 18:9530d682fd9a 2905 printf("+20dBm PADAC bias\r\n");
dudmuck 18:9530d682fd9a 2906 i -= 3;
dudmuck 18:9530d682fd9a 2907 pds_trim.bits.prog_txdac = 7;
dudmuck 21:b84a77dfb43c 2908 radio.write_reg(adr, pds_trim.octet);
dudmuck 13:c73caaee93a5 2909 }
dudmuck 18:9530d682fd9a 2910 if (i > 1)
dudmuck 18:9530d682fd9a 2911 radio.RegPaConfig.bits.OutputPower = i - 2;
dudmuck 18:9530d682fd9a 2912 } else {
dudmuck 18:9530d682fd9a 2913 /* RFO used: -1 to +14dbm */
dudmuck 18:9530d682fd9a 2914 if (i < 15)
dudmuck 18:9530d682fd9a 2915 radio.RegPaConfig.bits.OutputPower = i + 1;
dudmuck 18:9530d682fd9a 2916 }
dudmuck 18:9530d682fd9a 2917 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2918 }
dudmuck 18:9530d682fd9a 2919 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2920 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2921 printf("PA_BOOST ");
dudmuck 18:9530d682fd9a 2922 dbm = radio.RegPaConfig.bits.OutputPower + pds_trim.bits.prog_txdac - 2;
dudmuck 18:9530d682fd9a 2923 } else {
dudmuck 18:9530d682fd9a 2924 printf("RFO ");
dudmuck 18:9530d682fd9a 2925 dbm = radio.RegPaConfig.bits.OutputPower - 1;
dudmuck 18:9530d682fd9a 2926 }
dudmuck 18:9530d682fd9a 2927 printf("OutputPower:%ddBm\r\n", dbm);
dudmuck 18:9530d682fd9a 2928 }
dudmuck 18:9530d682fd9a 2929
dudmuck 18:9530d682fd9a 2930
dudmuck 18:9530d682fd9a 2931
dudmuck 18:9530d682fd9a 2932 void cmd_fsk_agcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2933 {
dudmuck 18:9530d682fd9a 2934 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2935 fsk.RegRxConfig.bits.AgcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2936 printf("AgcAuto:");
dudmuck 18:9530d682fd9a 2937 if (fsk.RegRxConfig.bits.AgcAutoOn)
dudmuck 18:9530d682fd9a 2938 printf("On\r\n");
dudmuck 18:9530d682fd9a 2939 else
dudmuck 18:9530d682fd9a 2940 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2941 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2942 }
dudmuck 18:9530d682fd9a 2943
dudmuck 18:9530d682fd9a 2944 void cmd_fsk_afcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2945 {
dudmuck 18:9530d682fd9a 2946 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2947 fsk.RegRxConfig.bits.AfcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2948 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2949 printf("AfcAuto:");
dudmuck 18:9530d682fd9a 2950 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 18:9530d682fd9a 2951 printf("On\r\n");
dudmuck 18:9530d682fd9a 2952 else
dudmuck 18:9530d682fd9a 2953 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2954 }
dudmuck 18:9530d682fd9a 2955
dudmuck 21:b84a77dfb43c 2956 void cmd_crc32(uint8_t idx)
dudmuck 21:b84a77dfb43c 2957 {
dudmuck 21:b84a77dfb43c 2958 crc32_en ^= true;
dudmuck 21:b84a77dfb43c 2959 printf("crc32_en:%u\r\n", crc32_en);
dudmuck 21:b84a77dfb43c 2960 }
dudmuck 21:b84a77dfb43c 2961
dudmuck 18:9530d682fd9a 2962 void cmd_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2963 {
dudmuck 18:9530d682fd9a 2964 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2965 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 2966 lora_printRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 2967 } else {
dudmuck 18:9530d682fd9a 2968 printf("CrcOn:");
dudmuck 18:9530d682fd9a 2969 fsk.RegPktConfig1.bits.CrcOn ^= 1;
dudmuck 18:9530d682fd9a 2970 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2971 if (fsk.RegPktConfig1.bits.CrcOn)
dudmuck 18:9530d682fd9a 2972 printf("On\r\n");
dudmuck 18:9530d682fd9a 2973 else
dudmuck 18:9530d682fd9a 2974 printf("Off\r\n");
dudmuck 18:9530d682fd9a 2975 if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2976 fsk.config_dio0_for_pktmode_rx();
dudmuck 18:9530d682fd9a 2977 }
dudmuck 18:9530d682fd9a 2978 }
dudmuck 18:9530d682fd9a 2979 printf("\r\n");
dudmuck 18:9530d682fd9a 2980 }
dudmuck 18:9530d682fd9a 2981
dudmuck 18:9530d682fd9a 2982 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 2983 void cmd_lora_fixed_payload_symbol(uint8_t idx) // fixed payload, symbol test
dudmuck 18:9530d682fd9a 2984 {
dudmuck 18:9530d682fd9a 2985 int n, i;
dudmuck 18:9530d682fd9a 2986
dudmuck 18:9530d682fd9a 2987 symbol_num = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2988 sscanf(pcbuf+idx+2, "%d", &i);
dudmuck 18:9530d682fd9a 2989 n = i >> 2; // num nibbles
dudmuck 18:9530d682fd9a 2990 printf("%d nibbles: ", n);
dudmuck 18:9530d682fd9a 2991 lora.RegPayloadLength = byte_pad_length;
dudmuck 18:9530d682fd9a 2992 while (n > 0) {
dudmuck 18:9530d682fd9a 2993 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 2994 n -= 2; // one byte = two nibbles
dudmuck 18:9530d682fd9a 2995 }
dudmuck 18:9530d682fd9a 2996 printf("%d bytes\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2997 symbol_sweep_nbits = i >> 2;
dudmuck 18:9530d682fd9a 2998 symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 2999 symbol_sweep_bit_counter_stop = 1 << symbol_sweep_nbits; // one bit per nibble used in symbol (2bits per byte)
dudmuck 18:9530d682fd9a 3000 printf("sweep symbol %d, length bytes:%d nbits:%d stop:0x%x\r\n", symbol_num, lora.RegPayloadLength, symbol_sweep_nbits, symbol_sweep_bit_counter_stop);
dudmuck 18:9530d682fd9a 3001 txticker_state = TXTICKER_STATE_SYMBOL_SWEEP;
dudmuck 18:9530d682fd9a 3002 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3003 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3004 }
dudmuck 18:9530d682fd9a 3005
dudmuck 18:9530d682fd9a 3006 void cmd_fixed_payload_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 3007 {
dudmuck 18:9530d682fd9a 3008 int i;
dudmuck 18:9530d682fd9a 3009 if (pcbuf[idx] >='0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3010 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3011 byte_pad_length = i;
dudmuck 18:9530d682fd9a 3012 }
dudmuck 18:9530d682fd9a 3013 printf("byte_pad_length:%d\r\n", byte_pad_length);
dudmuck 18:9530d682fd9a 3014 }
dudmuck 18:9530d682fd9a 3015
dudmuck 18:9530d682fd9a 3016 void cmd_lora_fixed_payload(uint8_t idx)
dudmuck 18:9530d682fd9a 3017 {
dudmuck 18:9530d682fd9a 3018 int n, a, i, d = 0;
dudmuck 18:9530d682fd9a 3019 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3020 //printf("scan:\"%s\"\r\n", pcbuf+i);
dudmuck 18:9530d682fd9a 3021 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3022 //printf("n:%x\r\n", n);
dudmuck 18:9530d682fd9a 3023 radio.tx_buf[d] = n;
dudmuck 18:9530d682fd9a 3024 printf("%02x ", n);
dudmuck 18:9530d682fd9a 3025 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3026 i++;
dudmuck 18:9530d682fd9a 3027 //printf("%d pcbuf[i]:%x\r\n", i, pcbuf[i]);
dudmuck 18:9530d682fd9a 3028 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3029 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3030 break;
dudmuck 18:9530d682fd9a 3031 i = a;
dudmuck 18:9530d682fd9a 3032 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3033 i++;
dudmuck 18:9530d682fd9a 3034 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3035 break;
dudmuck 18:9530d682fd9a 3036 }
dudmuck 18:9530d682fd9a 3037 d++;
dudmuck 18:9530d682fd9a 3038 }
dudmuck 18:9530d682fd9a 3039 lora.RegPayloadLength = d;
dudmuck 18:9530d682fd9a 3040 printf("\r\nlora.RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3041 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3042 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3043 }
dudmuck 18:9530d682fd9a 3044
dudmuck 18:9530d682fd9a 3045 void cmd_lora_toggle_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3046 {
dudmuck 18:9530d682fd9a 3047 /* test lora crc on/off */
dudmuck 18:9530d682fd9a 3048 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3049 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3050 txticker_state = TXTICKER_STATE_TOG_CRC_ON;
dudmuck 18:9530d682fd9a 3051 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3052 }
dudmuck 18:9530d682fd9a 3053
dudmuck 18:9530d682fd9a 3054 void lora_cycle_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3055 {
dudmuck 18:9530d682fd9a 3056 int i;
dudmuck 18:9530d682fd9a 3057 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3058 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3059 payload_length_stop = i;
dudmuck 18:9530d682fd9a 3060 }
dudmuck 18:9530d682fd9a 3061 txticker_state = TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3062 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3063 }
dudmuck 18:9530d682fd9a 3064
dudmuck 18:9530d682fd9a 3065 void cmd_lora_data_ramp(uint8_t idx)
dudmuck 18:9530d682fd9a 3066 {
dudmuck 18:9530d682fd9a 3067 // lora payload data ramping
dudmuck 18:9530d682fd9a 3068 lora.RegPayloadLength = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 3069 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3070 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA_START;
dudmuck 18:9530d682fd9a 3071 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3072 }
dudmuck 18:9530d682fd9a 3073
dudmuck 18:9530d682fd9a 3074 void cmd_lora_sync_lo_nibble(uint8_t idx)
dudmuck 18:9530d682fd9a 3075 {
dudmuck 18:9530d682fd9a 3076 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 3077 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 3078 on_txdone_delay = 0.100;
dudmuck 18:9530d682fd9a 3079 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3080 //sync_sweep_timeout.attach(&txdone_timeout_cb, sync_sweep_delay);
dudmuck 18:9530d682fd9a 3081 }
dudmuck 18:9530d682fd9a 3082
dudmuck 18:9530d682fd9a 3083 void cmd_lora_toggle_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3084 {
dudmuck 18:9530d682fd9a 3085 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3086 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3087 txticker_state = TXTICKER_STATE_TOG_HEADER_MODE;
dudmuck 18:9530d682fd9a 3088 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3089 }
dudmuck 18:9530d682fd9a 3090
dudmuck 18:9530d682fd9a 3091 void cmd_lora_sync_sweep(uint8_t idx)
dudmuck 18:9530d682fd9a 3092 {
dudmuck 18:9530d682fd9a 3093 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3094 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3095 txticker_sync_byte = 0x12;
dudmuck 18:9530d682fd9a 3096 if (pcbuf[idx] == '1')
dudmuck 18:9530d682fd9a 3097 txticker_state = TXTICKER_STATE_CYCLE_SYNC_1;
dudmuck 18:9530d682fd9a 3098 else if (pcbuf[idx] == '2')
dudmuck 18:9530d682fd9a 3099 txticker_state = TXTICKER_STATE_CYCLE_SYNC_2;
dudmuck 18:9530d682fd9a 3100 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3101 }
dudmuck 18:9530d682fd9a 3102
dudmuck 18:9530d682fd9a 3103 void cmd_lora_all_payload_lengths(uint8_t idx)
dudmuck 18:9530d682fd9a 3104 {
dudmuck 18:9530d682fd9a 3105 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 3106 on_txdone_state = ON_TXDONE_STATE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3107 on_txdone_delay = 0.200;
dudmuck 18:9530d682fd9a 3108 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3109 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 3110 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3111 }
dudmuck 18:9530d682fd9a 3112
dudmuck 18:9530d682fd9a 3113 void cmd_lora_toggle_all_bits(uint8_t idx)
dudmuck 18:9530d682fd9a 3114 {
dudmuck 18:9530d682fd9a 3115 lora.RegPayloadLength = (pcbuf[idx] - '0') + byte_pad_length;
dudmuck 18:9530d682fd9a 3116 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3117 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS_START;
dudmuck 18:9530d682fd9a 3118 printf("tab byte length:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3119
dudmuck 18:9530d682fd9a 3120 if (lora.RegPayloadLength > 0)
dudmuck 18:9530d682fd9a 3121 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3122 }
dudmuck 18:9530d682fd9a 3123
dudmuck 18:9530d682fd9a 3124 void cmd_lora_cycle_codingrates(uint8_t idx)
dudmuck 18:9530d682fd9a 3125 {
dudmuck 18:9530d682fd9a 3126 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3127 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3128 txticker_state = TXTICKER_STATE_CYCLE_CODING_RATE;
dudmuck 18:9530d682fd9a 3129 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3130 }
dudmuck 18:9530d682fd9a 3131 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3132
dudmuck 18:9530d682fd9a 3133 void cmd_codingRate(uint8_t idx)
dudmuck 18:9530d682fd9a 3134 {
dudmuck 18:9530d682fd9a 3135 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9')
dudmuck 18:9530d682fd9a 3136 lora.setCodingRate(pcbuf[idx] - '0');
dudmuck 18:9530d682fd9a 3137 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3138 lora_printCodingRate(false); // false: transmitted
dudmuck 18:9530d682fd9a 3139 printf("\r\n");
dudmuck 18:9530d682fd9a 3140 }
dudmuck 18:9530d682fd9a 3141
dudmuck 18:9530d682fd9a 3142 void cmd_lora_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3143 {
dudmuck 18:9530d682fd9a 3144 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 3145 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3146 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 3147 printf("\r\n");
dudmuck 18:9530d682fd9a 3148 }
dudmuck 18:9530d682fd9a 3149
dudmuck 18:9530d682fd9a 3150 void cmd_fsk_AfcAutoClearOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3151 {
dudmuck 18:9530d682fd9a 3152 fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1;
dudmuck 18:9530d682fd9a 3153 printf("AfcAutoClearOn: ");
dudmuck 18:9530d682fd9a 3154 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3155 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 18:9530d682fd9a 3156 printf("ON\r\n");
dudmuck 18:9530d682fd9a 3157 else
dudmuck 18:9530d682fd9a 3158 printf("off\r\n");
dudmuck 18:9530d682fd9a 3159 }
dudmuck 18:9530d682fd9a 3160
dudmuck 18:9530d682fd9a 3161 void cmd_fsk_AutoRestartRxMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3162 {
dudmuck 18:9530d682fd9a 3163 fsk.RegSyncConfig.bits.AutoRestartRxMode++;
dudmuck 18:9530d682fd9a 3164 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3165 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3166 printf("AutoRestartRxMode:");
dudmuck 18:9530d682fd9a 3167 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 18:9530d682fd9a 3168 case 0: printf("off "); break;
dudmuck 18:9530d682fd9a 3169 case 1: printf("no-pll-wait "); break;
dudmuck 18:9530d682fd9a 3170 case 2: printf("pll-wait "); break;
dudmuck 18:9530d682fd9a 3171 case 3: printf("3 "); break;
dudmuck 18:9530d682fd9a 3172 }
dudmuck 18:9530d682fd9a 3173 printf("\r\n");
dudmuck 18:9530d682fd9a 3174 }
dudmuck 18:9530d682fd9a 3175
dudmuck 18:9530d682fd9a 3176 void cmd_AfcClear(uint8_t idx)
dudmuck 18:9530d682fd9a 3177 {
dudmuck 18:9530d682fd9a 3178 printf("clear afc: ");
dudmuck 18:9530d682fd9a 3179 fsk.RegAfcFei.bits.AfcClear = 1;
dudmuck 18:9530d682fd9a 3180 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3181 fsk.RegAfcFei.bits.AfcClear = 0;
dudmuck 18:9530d682fd9a 3182 printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 18:9530d682fd9a 3183 }
dudmuck 18:9530d682fd9a 3184
dudmuck 18:9530d682fd9a 3185 void cmd_fsk_bitrate(uint8_t idx)
dudmuck 18:9530d682fd9a 3186 {
dudmuck 18:9530d682fd9a 3187 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3188 float kbits;
dudmuck 18:9530d682fd9a 3189 sscanf(&pcbuf[idx], "%f", &kbits);
dudmuck 18:9530d682fd9a 3190 fsk.set_bitrate((int)(kbits*1000));
dudmuck 18:9530d682fd9a 3191 }
dudmuck 18:9530d682fd9a 3192 printf("%fkbps\r\n", fsk.get_bitrate()/(float)1000.0);
dudmuck 18:9530d682fd9a 3193 }
dudmuck 18:9530d682fd9a 3194
dudmuck 18:9530d682fd9a 3195 void cmd_bandwidth(uint8_t idx)
dudmuck 18:9530d682fd9a 3196 {
dudmuck 18:9530d682fd9a 3197 int i;
dudmuck 18:9530d682fd9a 3198 float f;
dudmuck 18:9530d682fd9a 3199 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3200 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3201 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3202 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 3203 lora.setBw_KHz(i);
dudmuck 18:9530d682fd9a 3204 } else
dudmuck 18:9530d682fd9a 3205 lora_printAllBw();
dudmuck 18:9530d682fd9a 3206 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3207 printf("current ");
dudmuck 18:9530d682fd9a 3208 lora_printBw();
dudmuck 18:9530d682fd9a 3209 printf("\r\n");
dudmuck 18:9530d682fd9a 3210 } else { // FSK:
dudmuck 18:9530d682fd9a 3211 if (pcbuf[idx] == 'a') {
dudmuck 18:9530d682fd9a 3212 idx++;
dudmuck 18:9530d682fd9a 3213 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3214 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3215 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3216 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 1);
dudmuck 18:9530d682fd9a 3217 }
dudmuck 18:9530d682fd9a 3218 printf("afcbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)/1000.0);
dudmuck 18:9530d682fd9a 3219 } else {
dudmuck 18:9530d682fd9a 3220 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3221 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3222 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3223 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 0);
dudmuck 18:9530d682fd9a 3224 }
dudmuck 18:9530d682fd9a 3225 printf("rxbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)/1000.0);
dudmuck 18:9530d682fd9a 3226 }
dudmuck 18:9530d682fd9a 3227 }
dudmuck 18:9530d682fd9a 3228 }
dudmuck 18:9530d682fd9a 3229
dudmuck 18:9530d682fd9a 3230 void cmd_lora_poll_validHeader(uint8_t idx)
dudmuck 18:9530d682fd9a 3231 {
dudmuck 18:9530d682fd9a 3232 lora.poll_vh ^= 1;
dudmuck 18:9530d682fd9a 3233 printf("poll_vh:%d\r\n", lora.poll_vh);
dudmuck 18:9530d682fd9a 3234 }
dudmuck 18:9530d682fd9a 3235
dudmuck 18:9530d682fd9a 3236 void cmd_fsk_syncword(uint8_t idx)
dudmuck 18:9530d682fd9a 3237 {
dudmuck 18:9530d682fd9a 3238 int i, d = 0;
dudmuck 18:9530d682fd9a 3239 uint8_t reg_addr = REG_FSK_SYNCVALUE1;
dudmuck 18:9530d682fd9a 3240
dudmuck 18:9530d682fd9a 3241 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3242
dudmuck 18:9530d682fd9a 3243 if (pcbuf_len != idx) { // something to write?
dudmuck 18:9530d682fd9a 3244 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3245 int a, n;
dudmuck 18:9530d682fd9a 3246 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3247 radio.write_reg(reg_addr++, n);
dudmuck 18:9530d682fd9a 3248 //printf("%02x ", n);
dudmuck 18:9530d682fd9a 3249 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3250 i++;
dudmuck 18:9530d682fd9a 3251 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3252 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3253 break;
dudmuck 18:9530d682fd9a 3254 i = a;
dudmuck 18:9530d682fd9a 3255 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3256 i++;
dudmuck 18:9530d682fd9a 3257 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3258 break;
dudmuck 18:9530d682fd9a 3259 }
dudmuck 18:9530d682fd9a 3260 d++;
dudmuck 18:9530d682fd9a 3261 }
dudmuck 18:9530d682fd9a 3262
dudmuck 18:9530d682fd9a 3263 fsk.RegSyncConfig.bits.SyncSize = reg_addr - REG_FSK_SYNCVALUE1 - 1;
dudmuck 18:9530d682fd9a 3264 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3265 }
dudmuck 18:9530d682fd9a 3266
dudmuck 18:9530d682fd9a 3267 printf("%d: ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 3268 for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++)
dudmuck 18:9530d682fd9a 3269 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i));
dudmuck 18:9530d682fd9a 3270 printf("\r\n");
dudmuck 18:9530d682fd9a 3271 }
dudmuck 18:9530d682fd9a 3272
dudmuck 18:9530d682fd9a 3273 void cmd_fsk_syncOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3274 {
dudmuck 18:9530d682fd9a 3275 fsk.RegSyncConfig.bits.SyncOn ^= 1;
dudmuck 18:9530d682fd9a 3276 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3277 printf("SyncOn:%d\r\n", fsk.RegSyncConfig.bits.SyncOn);
dudmuck 18:9530d682fd9a 3278 }
dudmuck 18:9530d682fd9a 3279
dudmuck 18:9530d682fd9a 3280 void cmd_fsk_bitsync(uint8_t idx)
dudmuck 18:9530d682fd9a 3281 {
dudmuck 18:9530d682fd9a 3282 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3283 fsk.RegOokPeak.bits.BitSyncOn ^= 1;
dudmuck 18:9530d682fd9a 3284 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3285 if (fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 18:9530d682fd9a 3286 printf("BitSyncOn\r\n");
dudmuck 18:9530d682fd9a 3287 else
dudmuck 18:9530d682fd9a 3288 printf("BitSync Off\r\n");
dudmuck 18:9530d682fd9a 3289 }
dudmuck 18:9530d682fd9a 3290
dudmuck 18:9530d682fd9a 3291 void cmd_lora_sf(uint8_t idx)
dudmuck 18:9530d682fd9a 3292 {
dudmuck 18:9530d682fd9a 3293 int i;
dudmuck 18:9530d682fd9a 3294 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3295 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3296 lora.setSf(i);
dudmuck 18:9530d682fd9a 3297 if (i == 6 && !lora.getHeaderMode()) {
dudmuck 18:9530d682fd9a 3298 printf("SF6: to implicit header mode\r\n");
dudmuck 18:9530d682fd9a 3299 lora.setHeaderMode(true);
dudmuck 18:9530d682fd9a 3300 }
dudmuck 18:9530d682fd9a 3301 }
dudmuck 18:9530d682fd9a 3302 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 3303 lora_printSf();
dudmuck 18:9530d682fd9a 3304 printf("\r\n");
dudmuck 18:9530d682fd9a 3305 }
dudmuck 18:9530d682fd9a 3306
dudmuck 18:9530d682fd9a 3307 void cmd_fsk_TxStartCondition(uint8_t idx)
dudmuck 18:9530d682fd9a 3308 {
dudmuck 18:9530d682fd9a 3309 fsk.RegFifoThreshold.bits.TxStartCondition ^= 1;
dudmuck 18:9530d682fd9a 3310 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3311 printf("TxStartCondition:");
dudmuck 18:9530d682fd9a 3312 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 18:9530d682fd9a 3313 printf("!FifoEmpty\r\n");
dudmuck 18:9530d682fd9a 3314 else
dudmuck 18:9530d682fd9a 3315 printf("FifoLevel\r\n");
dudmuck 18:9530d682fd9a 3316 }
dudmuck 18:9530d682fd9a 3317
dudmuck 18:9530d682fd9a 3318 void cmd_fsk_read_fei(uint8_t idx)
dudmuck 18:9530d682fd9a 3319 {
dudmuck 18:9530d682fd9a 3320 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 18:9530d682fd9a 3321 }
dudmuck 18:9530d682fd9a 3322
dudmuck 18:9530d682fd9a 3323 void cmd_fsk_fdev(uint8_t idx)
dudmuck 18:9530d682fd9a 3324 {
dudmuck 18:9530d682fd9a 3325 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3326 float khz;
dudmuck 18:9530d682fd9a 3327 sscanf(pcbuf+idx, "%f", &khz);
dudmuck 18:9530d682fd9a 3328 fsk.set_tx_fdev_hz((int)(khz*1000));
dudmuck 18:9530d682fd9a 3329 }
dudmuck 18:9530d682fd9a 3330 printf("fdev:%fKHz\r\n", fsk.get_tx_fdev_hz()/(float)1000.0);
dudmuck 18:9530d682fd9a 3331 }
dudmuck 18:9530d682fd9a 3332
dudmuck 21:b84a77dfb43c 3333 void cmd_spifreq(uint8_t idx)
dudmuck 21:b84a77dfb43c 3334 {
dudmuck 21:b84a77dfb43c 3335 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3336 int hz, MHz;
dudmuck 21:b84a77dfb43c 3337 sscanf(pcbuf+idx, "%d", &MHz);
dudmuck 21:b84a77dfb43c 3338 hz = MHz * 1000000;
dudmuck 21:b84a77dfb43c 3339 printf("spi hz:%u\r\n", hz);
dudmuck 21:b84a77dfb43c 3340 radio.m_spi.frequency(hz);
dudmuck 21:b84a77dfb43c 3341 }
dudmuck 21:b84a77dfb43c 3342 }
dudmuck 21:b84a77dfb43c 3343
dudmuck 18:9530d682fd9a 3344 void cmd_frf(uint8_t idx)
dudmuck 18:9530d682fd9a 3345 {
dudmuck 18:9530d682fd9a 3346 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3347 float MHz;
dudmuck 18:9530d682fd9a 3348 sscanf(pcbuf+idx, "%f", &MHz);
dudmuck 18:9530d682fd9a 3349 //printf("MHz:%f\r\n", MHz);
dudmuck 18:9530d682fd9a 3350 radio.set_frf_MHz(MHz);
dudmuck 18:9530d682fd9a 3351 }
dudmuck 18:9530d682fd9a 3352 printf("%fMHz\r\n", radio.get_frf_MHz());
dudmuck 22:2005df80c8a8 3353 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
dudmuck 18:9530d682fd9a 3354 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 3355 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 18:9530d682fd9a 3356 // LAS HF=PA_BOOST LF=RFO
dudmuck 18:9530d682fd9a 3357 if (radio.HF)
dudmuck 18:9530d682fd9a 3358 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 18:9530d682fd9a 3359 else
dudmuck 18:9530d682fd9a 3360 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 18:9530d682fd9a 3361 }
dudmuck 18:9530d682fd9a 3362 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3363 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 3364 }
dudmuck 18:9530d682fd9a 3365
dudmuck 18:9530d682fd9a 3366 void cmd_fsk_PacketFormat(uint8_t idx)
dudmuck 18:9530d682fd9a 3367 {
dudmuck 18:9530d682fd9a 3368 printf("PacketFormat:");
dudmuck 18:9530d682fd9a 3369 fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1;
dudmuck 18:9530d682fd9a 3370 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3371 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 18:9530d682fd9a 3372 printf("variable\r\n");
dudmuck 18:9530d682fd9a 3373 else
dudmuck 18:9530d682fd9a 3374 printf("fixed\r\n");
dudmuck 18:9530d682fd9a 3375 }
dudmuck 18:9530d682fd9a 3376
dudmuck 18:9530d682fd9a 3377 void cmd_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3378 {
dudmuck 18:9530d682fd9a 3379 int i;
dudmuck 18:9530d682fd9a 3380 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3381 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3382 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3383 lora.RegPayloadLength = i;
dudmuck 13:c73caaee93a5 3384 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3385 } else {
dudmuck 18:9530d682fd9a 3386 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 3387 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 10:d9bb2ce57f05 3388 }
dudmuck 18:9530d682fd9a 3389 }
dudmuck 18:9530d682fd9a 3390 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3391 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 18:9530d682fd9a 3392 printf("PayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3393 } else {
dudmuck 18:9530d682fd9a 3394 printf("PayloadLength:%d\r\n", fsk_get_PayloadLength());
dudmuck 18:9530d682fd9a 3395 }
dudmuck 18:9530d682fd9a 3396 }
dudmuck 18:9530d682fd9a 3397
dudmuck 18:9530d682fd9a 3398 void cmd_paRamp(uint8_t idx)
dudmuck 18:9530d682fd9a 3399 {
dudmuck 18:9530d682fd9a 3400 int i;
dudmuck 18:9530d682fd9a 3401 uint8_t reg_par = radio.read_reg(REG_PARAMP);
dudmuck 18:9530d682fd9a 3402 uint8_t PaRamp = reg_par & 0x0f;
dudmuck 18:9530d682fd9a 3403 reg_par &= 0xf0;
dudmuck 18:9530d682fd9a 3404 if (PaRamp == 15)
dudmuck 18:9530d682fd9a 3405 PaRamp = 0;
dudmuck 18:9530d682fd9a 3406 else
dudmuck 18:9530d682fd9a 3407 PaRamp++;
dudmuck 18:9530d682fd9a 3408 radio.write_reg(REG_PARAMP, reg_par | PaRamp);
dudmuck 18:9530d682fd9a 3409 printf("PaRamp:");
dudmuck 18:9530d682fd9a 3410 switch (PaRamp) {
dudmuck 18:9530d682fd9a 3411 case 0: i = 3400; break;
dudmuck 18:9530d682fd9a 3412 case 1: i = 2000; break;
dudmuck 18:9530d682fd9a 3413 case 2: i = 1000; break;
dudmuck 18:9530d682fd9a 3414 case 3: i = 500; break;
dudmuck 18:9530d682fd9a 3415 case 4: i = 250; break;
dudmuck 18:9530d682fd9a 3416 case 5: i = 125; break;
dudmuck 18:9530d682fd9a 3417 case 6: i = 100; break;
dudmuck 18:9530d682fd9a 3418 case 7: i = 62; break;
dudmuck 18:9530d682fd9a 3419 case 8: i = 50; break;
dudmuck 18:9530d682fd9a 3420 case 9: i = 40; break;
dudmuck 18:9530d682fd9a 3421 case 10: i = 31; break;
dudmuck 18:9530d682fd9a 3422 case 11: i = 25; break;
dudmuck 18:9530d682fd9a 3423 case 12: i = 20; break;
dudmuck 18:9530d682fd9a 3424 case 13: i = 15; break;
dudmuck 18:9530d682fd9a 3425 case 14: i = 12; break;
dudmuck 18:9530d682fd9a 3426 case 15: i = 10; break;
dudmuck 18:9530d682fd9a 3427 }
dudmuck 18:9530d682fd9a 3428 printf("%dus\r\n", i);
dudmuck 18:9530d682fd9a 3429 }
dudmuck 18:9530d682fd9a 3430
dudmuck 18:9530d682fd9a 3431 void cmd_paSelect(uint8_t idx)
dudmuck 18:9530d682fd9a 3432 {
dudmuck 18:9530d682fd9a 3433 radio.RegPaConfig.bits.PaSelect ^= 1;
dudmuck 18:9530d682fd9a 3434 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3435 printPa();
dudmuck 18:9530d682fd9a 3436 printf("\r\n");
dudmuck 18:9530d682fd9a 3437 }
dudmuck 18:9530d682fd9a 3438
dudmuck 18:9530d682fd9a 3439 void cmd_poll_irq_en(uint8_t idx)
dudmuck 18:9530d682fd9a 3440 {
dudmuck 18:9530d682fd9a 3441 poll_irq_en ^= 1;
dudmuck 18:9530d682fd9a 3442 printf("poll_irq_en:");
dudmuck 20:b11592c9ba5f 3443 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 3444 printf("irqFlags register\r\n");
dudmuck 20:b11592c9ba5f 3445 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3446 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3447 } else
dudmuck 18:9530d682fd9a 3448 printf("DIO pin interrupt\r\n");
dudmuck 18:9530d682fd9a 3449 }
dudmuck 18:9530d682fd9a 3450
dudmuck 18:9530d682fd9a 3451 void cmd_per_id(uint8_t idx)
dudmuck 18:9530d682fd9a 3452 {
dudmuck 18:9530d682fd9a 3453 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3454 sscanf(pcbuf+idx, "%d", &per_id);
dudmuck 18:9530d682fd9a 3455 }
dudmuck 18:9530d682fd9a 3456 printf("PER device ID:%d\r\n", per_id);
dudmuck 18:9530d682fd9a 3457 }
dudmuck 18:9530d682fd9a 3458
dudmuck 18:9530d682fd9a 3459 void cmd_pertx(uint8_t idx)
dudmuck 18:9530d682fd9a 3460 {
dudmuck 18:9530d682fd9a 3461 int i;
dudmuck 18:9530d682fd9a 3462
dudmuck 18:9530d682fd9a 3463 if (cadper_enable)
dudmuck 18:9530d682fd9a 3464 cadper_enable = false;
dudmuck 18:9530d682fd9a 3465
dudmuck 18:9530d682fd9a 3466 set_per_en(true);
dudmuck 18:9530d682fd9a 3467 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3468 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3469 PacketTxCntEnd = i;
dudmuck 18:9530d682fd9a 3470 }
dudmuck 18:9530d682fd9a 3471 PacketTxCnt = 0;
dudmuck 18:9530d682fd9a 3472 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 18:9530d682fd9a 3473 }
dudmuck 18:9530d682fd9a 3474
dudmuck 18:9530d682fd9a 3475 void cmd_perrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3476 {
dudmuck 18:9530d682fd9a 3477 set_per_en(true);
dudmuck 18:9530d682fd9a 3478
dudmuck 18:9530d682fd9a 3479 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 3480 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 3481 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 3482 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 3483 //dio3.rise(&dio3_cb);
dudmuck 18:9530d682fd9a 3484
dudmuck 18:9530d682fd9a 3485 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3486 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 13:c73caaee93a5 3487 else {
dudmuck 18:9530d682fd9a 3488 fsk.start_rx();
dudmuck 18:9530d682fd9a 3489 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 3490 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3491 if (radio.HF) {
dudmuck 18:9530d682fd9a 3492 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 3493 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 3494 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 3495 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 3496 }
dudmuck 18:9530d682fd9a 3497 }
dudmuck 18:9530d682fd9a 3498 }
dudmuck 18:9530d682fd9a 3499
dudmuck 18:9530d682fd9a 3500 void cmd_fsk_PreambleDetectorOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3501 {
dudmuck 18:9530d682fd9a 3502 fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1;
dudmuck 18:9530d682fd9a 3503 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3504 printf("PreambleDetector:");
dudmuck 18:9530d682fd9a 3505 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn)
dudmuck 18:9530d682fd9a 3506 printf("On\r\n");
dudmuck 18:9530d682fd9a 3507 else
dudmuck 18:9530d682fd9a 3508 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 3509 }
dudmuck 18:9530d682fd9a 3510
dudmuck 18:9530d682fd9a 3511 void cmd_fsk_PreambleDetectorSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3512 {
dudmuck 18:9530d682fd9a 3513 int i;
dudmuck 18:9530d682fd9a 3514 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3515 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3516 fsk.RegPreambleDetect.bits.PreambleDetectorSize = i;
dudmuck 18:9530d682fd9a 3517 }
dudmuck 18:9530d682fd9a 3518 printf("PreambleDetectorSize:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorSize);
dudmuck 18:9530d682fd9a 3519 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3520 }
dudmuck 18:9530d682fd9a 3521
dudmuck 18:9530d682fd9a 3522 void cmd_fsk_PreambleDetectorTol(uint8_t idx)
dudmuck 18:9530d682fd9a 3523 {
dudmuck 18:9530d682fd9a 3524 int i;
dudmuck 18:9530d682fd9a 3525 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3526 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3527 fsk.RegPreambleDetect.bits.PreambleDetectorTol = i;
dudmuck 18:9530d682fd9a 3528 }
dudmuck 18:9530d682fd9a 3529 printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 18:9530d682fd9a 3530 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3531 }
dudmuck 18:9530d682fd9a 3532
dudmuck 18:9530d682fd9a 3533 void cmd_PreambleSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3534 {
dudmuck 18:9530d682fd9a 3535 int i;
dudmuck 18:9530d682fd9a 3536 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3537 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3538 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3539 radio.write_u16(REG_LR_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3540 }
dudmuck 18:9530d682fd9a 3541 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 18:9530d682fd9a 3542 printf("lora PreambleLength:%d\r\n", lora.RegPreamble);
dudmuck 18:9530d682fd9a 3543 } else {
dudmuck 18:9530d682fd9a 3544 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3545 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3546 radio.write_u16(REG_FSK_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3547 }
dudmuck 18:9530d682fd9a 3548 printf("PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 3549 }
dudmuck 18:9530d682fd9a 3550 }
dudmuck 18:9530d682fd9a 3551
dudmuck 18:9530d682fd9a 3552 void cmd_fsk_PreamblePolarity(uint8_t idx)
dudmuck 18:9530d682fd9a 3553 {
dudmuck 18:9530d682fd9a 3554 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3555 fsk.RegSyncConfig.bits.PreamblePolarity ^= 1;
dudmuck 18:9530d682fd9a 3556 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3557 if (fsk.RegSyncConfig.bits.PreamblePolarity)
dudmuck 18:9530d682fd9a 3558 printf("0x55\r\n");
dudmuck 18:9530d682fd9a 3559 else
dudmuck 18:9530d682fd9a 3560 printf("0xaa\r\n");
dudmuck 18:9530d682fd9a 3561 }
dudmuck 18:9530d682fd9a 3562
dudmuck 18:9530d682fd9a 3563 void cmd_pllbw(uint8_t idx)
dudmuck 18:9530d682fd9a 3564 {
dudmuck 18:9530d682fd9a 3565 RegPll_t pll;
dudmuck 18:9530d682fd9a 3566 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3567 // 0x5c and 0x5e registers
dudmuck 18:9530d682fd9a 3568 pll.octet = radio.read_reg(REG_PLL_SX1272);
dudmuck 18:9530d682fd9a 3569 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3570 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3571 else
dudmuck 18:9530d682fd9a 3572 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3573 radio.write_reg(REG_PLL_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3574 pll.octet = radio.read_reg(REG_PLL_LOWPN_SX1272);
dudmuck 18:9530d682fd9a 3575 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3576 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3577 else
dudmuck 18:9530d682fd9a 3578 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3579 radio.write_reg(REG_PLL_LOWPN_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3580 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3581 // 0x70 register
dudmuck 18:9530d682fd9a 3582 pll.octet = radio.read_reg(REG_PLL_SX1276);
dudmuck 18:9530d682fd9a 3583 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3584 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3585 else
dudmuck 18:9530d682fd9a 3586 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3587 radio.write_reg(REG_PLL_SX1276, pll.octet);
dudmuck 18:9530d682fd9a 3588 }
dudmuck 18:9530d682fd9a 3589 switch (pll.bits.PllBandwidth) {
dudmuck 18:9530d682fd9a 3590 case 0: printf("75"); break;
dudmuck 18:9530d682fd9a 3591 case 1: printf("150"); break;
dudmuck 18:9530d682fd9a 3592 case 2: printf("225"); break;
dudmuck 18:9530d682fd9a 3593 case 3: printf("300"); break;
dudmuck 18:9530d682fd9a 3594 }
dudmuck 18:9530d682fd9a 3595 printf("KHz\r\n");
dudmuck 18:9530d682fd9a 3596 }
dudmuck 18:9530d682fd9a 3597
dudmuck 18:9530d682fd9a 3598 void cmd_lna_boost(uint8_t idx)
dudmuck 18:9530d682fd9a 3599 {
dudmuck 18:9530d682fd9a 3600 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 18:9530d682fd9a 3601 if (radio.RegLna.bits.LnaBoostHF == 3)
dudmuck 18:9530d682fd9a 3602 radio.RegLna.bits.LnaBoostHF = 0;
dudmuck 18:9530d682fd9a 3603 else
dudmuck 18:9530d682fd9a 3604 radio.RegLna.bits.LnaBoostHF++;
dudmuck 18:9530d682fd9a 3605 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 18:9530d682fd9a 3606 printf("LNA-boost:%d\r\n", radio.RegLna.bits.LnaBoostHF);
dudmuck 18:9530d682fd9a 3607 }
dudmuck 18:9530d682fd9a 3608
dudmuck 18:9530d682fd9a 3609 void cmd_LowDataRateOptimize(uint8_t idx)
dudmuck 18:9530d682fd9a 3610 {
dudmuck 18:9530d682fd9a 3611 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3612 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3613 lora.RegModemConfig.sx1272bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3614 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3615 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 3616 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3617 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 18:9530d682fd9a 3618 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3619 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3620 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 3621 }
dudmuck 18:9530d682fd9a 3622 }
dudmuck 18:9530d682fd9a 3623
dudmuck 18:9530d682fd9a 3624 void cmd_fsk_FifoThreshold(uint8_t idx)
dudmuck 18:9530d682fd9a 3625 {
dudmuck 18:9530d682fd9a 3626 int i;
dudmuck 18:9530d682fd9a 3627 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3628 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3629 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3630 fsk.RegFifoThreshold.bits.FifoThreshold = i;
dudmuck 18:9530d682fd9a 3631 }
dudmuck 18:9530d682fd9a 3632 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3633 printf("FifoThreshold:%d\r\n", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 18:9530d682fd9a 3634 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3635 }
dudmuck 18:9530d682fd9a 3636
dudmuck 18:9530d682fd9a 3637 void cmd_tx_ticker_rate(uint8_t idx)
dudmuck 18:9530d682fd9a 3638 {
dudmuck 18:9530d682fd9a 3639 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 3640 sscanf(pcbuf+idx, "%f", &tx_ticker_rate);
dudmuck 18:9530d682fd9a 3641 }
dudmuck 18:9530d682fd9a 3642 printf("tx_ticker_rate:%f\r\n", tx_ticker_rate);
dudmuck 18:9530d682fd9a 3643 }
dudmuck 18:9530d682fd9a 3644
dudmuck 18:9530d682fd9a 3645 void cmd_lora_tx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3646 {
dudmuck 18:9530d682fd9a 3647 lora.invert_tx(lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3648 printf("chirp_invert_tx :%d\r\n", lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3649 }
dudmuck 18:9530d682fd9a 3650
dudmuck 18:9530d682fd9a 3651 void cmd_lora_rx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3652 {
dudmuck 18:9530d682fd9a 3653 lora.invert_rx(!lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3654 printf("rx invert_i_q:%d\r\n", lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3655 }
dudmuck 18:9530d682fd9a 3656
dudmuck 18:9530d682fd9a 3657 void cmd_fsk_dcfree(uint8_t idx)
dudmuck 18:9530d682fd9a 3658 {
dudmuck 18:9530d682fd9a 3659 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 18:9530d682fd9a 3660 if (fsk.RegPktConfig1.bits.DcFree == 3)
dudmuck 18:9530d682fd9a 3661 fsk.RegPktConfig1.bits.DcFree = 0;
dudmuck 18:9530d682fd9a 3662 else
dudmuck 18:9530d682fd9a 3663 fsk.RegPktConfig1.bits.DcFree++;
dudmuck 18:9530d682fd9a 3664 printf(" dcFree:");
dudmuck 18:9530d682fd9a 3665 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 18:9530d682fd9a 3666 case 0: printf("none "); break;
dudmuck 18:9530d682fd9a 3667 case 1: printf("Manchester "); break;
dudmuck 18:9530d682fd9a 3668 case 2: printf("Whitening "); break;
dudmuck 18:9530d682fd9a 3669 case 3: printf("reserved "); break;
dudmuck 18:9530d682fd9a 3670 }
dudmuck 18:9530d682fd9a 3671 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3672 printf("\r\n");
dudmuck 18:9530d682fd9a 3673 }
dudmuck 18:9530d682fd9a 3674
dudmuck 21:b84a77dfb43c 3675 void cmd_bt(uint8_t idx)
dudmuck 21:b84a77dfb43c 3676 {
dudmuck 21:b84a77dfb43c 3677 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3678 if (radio.RegOpMode.bits.ModulationType != 0) {
dudmuck 21:b84a77dfb43c 3679 printf("!fsk\r\n");
dudmuck 21:b84a77dfb43c 3680 return;
dudmuck 21:b84a77dfb43c 3681 }
dudmuck 21:b84a77dfb43c 3682
dudmuck 21:b84a77dfb43c 3683 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3684 float bt;
dudmuck 21:b84a77dfb43c 3685 sscanf(pcbuf+idx, "%f", &bt);
dudmuck 21:b84a77dfb43c 3686 if (bt > 1.0)
dudmuck 21:b84a77dfb43c 3687 radio.RegOpMode.bits.ModulationShaping = 0; // 0 = no shaping
dudmuck 21:b84a77dfb43c 3688 else if (bt > 0.6)
dudmuck 21:b84a77dfb43c 3689 radio.RegOpMode.bits.ModulationShaping = 1; // 1 = BT1.0
dudmuck 21:b84a77dfb43c 3690 else if (bt > 0.4)
dudmuck 21:b84a77dfb43c 3691 radio.RegOpMode.bits.ModulationShaping = 2; // 2 = BT0.5
dudmuck 21:b84a77dfb43c 3692 else
dudmuck 21:b84a77dfb43c 3693 radio.RegOpMode.bits.ModulationShaping = 3; // 3 = BT0.3
dudmuck 21:b84a77dfb43c 3694 }
dudmuck 21:b84a77dfb43c 3695 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 3696 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 21:b84a77dfb43c 3697 case 0: printf("no-shaping "); break;
dudmuck 21:b84a77dfb43c 3698 case 1: printf("BT1.0 "); break;
dudmuck 21:b84a77dfb43c 3699 case 2: printf("BT0.5 "); break;
dudmuck 21:b84a77dfb43c 3700 case 3: printf("BT0.3 "); break;
dudmuck 21:b84a77dfb43c 3701 }
dudmuck 21:b84a77dfb43c 3702 printf("\r\n");
dudmuck 21:b84a77dfb43c 3703 }
dudmuck 21:b84a77dfb43c 3704
dudmuck 18:9530d682fd9a 3705 void cmd_fsk_DataMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3706 {
dudmuck 18:9530d682fd9a 3707 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 18:9530d682fd9a 3708 fsk.RegPktConfig2.bits.DataModePacket ^= 1;
dudmuck 18:9530d682fd9a 3709 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 3710 printf("datamode:");
dudmuck 18:9530d682fd9a 3711 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 18:9530d682fd9a 3712 printf("packet\r\n");
dudmuck 18:9530d682fd9a 3713 else
dudmuck 18:9530d682fd9a 3714 printf("continuous\r\n");
dudmuck 18:9530d682fd9a 3715 }
dudmuck 18:9530d682fd9a 3716
dudmuck 18:9530d682fd9a 3717 void cmd_show_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3718 {
dudmuck 18:9530d682fd9a 3719 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3720 lora_print_dio();
dudmuck 18:9530d682fd9a 3721 else
dudmuck 18:9530d682fd9a 3722 fsk_print_dio();
dudmuck 18:9530d682fd9a 3723 }
dudmuck 18:9530d682fd9a 3724
dudmuck 18:9530d682fd9a 3725 void cmd_set_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3726 {
dudmuck 18:9530d682fd9a 3727 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 3728 case '0':
dudmuck 18:9530d682fd9a 3729 radio.RegDioMapping1.bits.Dio0Mapping++;
dudmuck 18:9530d682fd9a 3730 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3731 break;
dudmuck 18:9530d682fd9a 3732 case '1':
dudmuck 18:9530d682fd9a 3733 radio.RegDioMapping1.bits.Dio1Mapping++;
dudmuck 18:9530d682fd9a 3734 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3735 break;
dudmuck 18:9530d682fd9a 3736 case '2':
dudmuck 18:9530d682fd9a 3737 radio.RegDioMapping1.bits.Dio2Mapping++;
dudmuck 18:9530d682fd9a 3738 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3739 break;
dudmuck 18:9530d682fd9a 3740 case '3':
dudmuck 18:9530d682fd9a 3741 radio.RegDioMapping1.bits.Dio3Mapping++;
dudmuck 18:9530d682fd9a 3742 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3743 break;
dudmuck 18:9530d682fd9a 3744 case '4':
dudmuck 18:9530d682fd9a 3745 radio.RegDioMapping2.bits.Dio4Mapping++;
dudmuck 18:9530d682fd9a 3746 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3747 break;
dudmuck 18:9530d682fd9a 3748 case '5':
dudmuck 18:9530d682fd9a 3749 radio.RegDioMapping2.bits.Dio5Mapping++;
dudmuck 18:9530d682fd9a 3750 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3751 break;
dudmuck 18:9530d682fd9a 3752 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 3753 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3754 lora_print_dio();
dudmuck 18:9530d682fd9a 3755 else
dudmuck 18:9530d682fd9a 3756 fsk_print_dio();
dudmuck 18:9530d682fd9a 3757 }
dudmuck 18:9530d682fd9a 3758
dudmuck 18:9530d682fd9a 3759 void cmd_mode_standby(uint8_t idx)
dudmuck 18:9530d682fd9a 3760 {
dudmuck 18:9530d682fd9a 3761 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3762 printf("standby\r\n");
dudmuck 18:9530d682fd9a 3763 }
dudmuck 18:9530d682fd9a 3764
dudmuck 18:9530d682fd9a 3765 void cmd_mode_sleep(uint8_t idx)
dudmuck 18:9530d682fd9a 3766 {
dudmuck 18:9530d682fd9a 3767 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 3768 printf("sleep\r\n");
dudmuck 18:9530d682fd9a 3769 }
dudmuck 18:9530d682fd9a 3770
dudmuck 18:9530d682fd9a 3771 void cmd_mode_fstx(uint8_t idx)
dudmuck 18:9530d682fd9a 3772 {
dudmuck 18:9530d682fd9a 3773 radio.set_opmode(RF_OPMODE_SYNTHESIZER_TX);
dudmuck 18:9530d682fd9a 3774 printf("fstx\r\n");
dudmuck 18:9530d682fd9a 3775 }
dudmuck 18:9530d682fd9a 3776
dudmuck 18:9530d682fd9a 3777 void cmd_mode_fsrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3778 {
dudmuck 18:9530d682fd9a 3779 radio.set_opmode(RF_OPMODE_SYNTHESIZER_RX);
dudmuck 18:9530d682fd9a 3780 printf("fsrx\r\n");
dudmuck 18:9530d682fd9a 3781 }
dudmuck 18:9530d682fd9a 3782
dudmuck 18:9530d682fd9a 3783 void cmd_chat(uint8_t idx)
dudmuck 18:9530d682fd9a 3784 {
dudmuck 18:9530d682fd9a 3785 app = APP_CHAT;
dudmuck 18:9530d682fd9a 3786 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 3787 printf("chat start\r\n");
dudmuck 18:9530d682fd9a 3788 }
dudmuck 18:9530d682fd9a 3789
dudmuck 18:9530d682fd9a 3790 void cmd_OokThreshType(uint8_t idx)
dudmuck 18:9530d682fd9a 3791 {
dudmuck 18:9530d682fd9a 3792 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3793 if (fsk.RegOokPeak.bits.OokThreshType == 2)
dudmuck 18:9530d682fd9a 3794 fsk.RegOokPeak.bits.OokThreshType = 0;
dudmuck 18:9530d682fd9a 3795 else
dudmuck 18:9530d682fd9a 3796 fsk.RegOokPeak.bits.OokThreshType++;
dudmuck 18:9530d682fd9a 3797
dudmuck 18:9530d682fd9a 3798 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3799 printf("OokThreshType:");
dudmuck 18:9530d682fd9a 3800 switch (fsk.RegOokPeak.bits.OokThreshType) {
dudmuck 18:9530d682fd9a 3801 case 0: printf("fixed"); break;
dudmuck 18:9530d682fd9a 3802 case 1: printf("peak"); break;
dudmuck 18:9530d682fd9a 3803 case 2: printf("average"); break;
dudmuck 18:9530d682fd9a 3804 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 3805 }
dudmuck 18:9530d682fd9a 3806 printf("\r\n");
dudmuck 18:9530d682fd9a 3807 }
dudmuck 18:9530d682fd9a 3808
dudmuck 18:9530d682fd9a 3809 void cmd_OokPeakTheshStep(uint8_t idx)
dudmuck 18:9530d682fd9a 3810 {
dudmuck 18:9530d682fd9a 3811 float f;
dudmuck 18:9530d682fd9a 3812 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3813 if (fsk.RegOokPeak.bits.OokPeakThreshStep == 7)
dudmuck 18:9530d682fd9a 3814 fsk.RegOokPeak.bits.OokPeakThreshStep = 0;
dudmuck 18:9530d682fd9a 3815 else
dudmuck 18:9530d682fd9a 3816 fsk.RegOokPeak.bits.OokPeakThreshStep++;
dudmuck 18:9530d682fd9a 3817
dudmuck 18:9530d682fd9a 3818 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3819 switch (fsk.RegOokPeak.bits.OokPeakThreshStep) {
dudmuck 18:9530d682fd9a 3820 case 0: f = 0.5; break;
dudmuck 18:9530d682fd9a 3821 case 1: f = 1; break;
dudmuck 18:9530d682fd9a 3822 case 2: f = 1.5; break;
dudmuck 18:9530d682fd9a 3823 case 3: f = 2; break;
dudmuck 18:9530d682fd9a 3824 case 4: f = 3; break;
dudmuck 18:9530d682fd9a 3825 case 5: f = 4; break;
dudmuck 18:9530d682fd9a 3826 case 6: f = 5; break;
dudmuck 18:9530d682fd9a 3827 case 7: f = 6; break;
dudmuck 18:9530d682fd9a 3828 }
dudmuck 18:9530d682fd9a 3829 printf("OokPeakThreshStep:%.1fdB\r\n", f);
dudmuck 18:9530d682fd9a 3830 }
dudmuck 18:9530d682fd9a 3831
dudmuck 18:9530d682fd9a 3832 void cmd_OokFixedThresh(uint8_t idx)
dudmuck 18:9530d682fd9a 3833 {
dudmuck 18:9530d682fd9a 3834 int i;
dudmuck 18:9530d682fd9a 3835 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3836 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3837 radio.write_reg(REG_FSK_OOKFIX, i);
dudmuck 18:9530d682fd9a 3838 }
dudmuck 18:9530d682fd9a 3839 i = radio.read_reg(REG_FSK_OOKFIX);
dudmuck 18:9530d682fd9a 3840 printf("OokFixedThreshold:%d\r\n", i);
dudmuck 18:9530d682fd9a 3841 }
dudmuck 18:9530d682fd9a 3842
dudmuck 18:9530d682fd9a 3843 void cmd_clkout(uint8_t idx)
dudmuck 18:9530d682fd9a 3844 {
dudmuck 18:9530d682fd9a 3845 RegOsc_t reg_osc;
dudmuck 18:9530d682fd9a 3846 reg_osc.octet = radio.read_reg(REG_FSK_OSC);
dudmuck 18:9530d682fd9a 3847 if (reg_osc.bits.ClkOut == 7)
dudmuck 18:9530d682fd9a 3848 reg_osc.bits.ClkOut = 0;
dudmuck 18:9530d682fd9a 3849 else
dudmuck 18:9530d682fd9a 3850 reg_osc.bits.ClkOut++;
dudmuck 18:9530d682fd9a 3851
dudmuck 18:9530d682fd9a 3852 printf("ClkOut:%d\r\n", reg_osc.bits.ClkOut);
dudmuck 18:9530d682fd9a 3853 radio.write_reg(REG_FSK_OSC, reg_osc.octet);
dudmuck 18:9530d682fd9a 3854 }
dudmuck 21:b84a77dfb43c 3855
dudmuck 21:b84a77dfb43c 3856 void cmd_ook_tx_test(uint8_t idx)
dudmuck 21:b84a77dfb43c 3857 {
dudmuck 21:b84a77dfb43c 3858 radio.set_frf_MHz(915.0);
dudmuck 21:b84a77dfb43c 3859
dudmuck 21:b84a77dfb43c 3860 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3861 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 21:b84a77dfb43c 3862 cmd_toggle_modem(0);
dudmuck 21:b84a77dfb43c 3863
dudmuck 21:b84a77dfb43c 3864 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 3865 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 3866 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 3867
dudmuck 21:b84a77dfb43c 3868 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 3869 radio.RegDioMapping2.bits.Dio5Mapping = 2; // Data
dudmuck 21:b84a77dfb43c 3870 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 3871
dudmuck 21:b84a77dfb43c 3872 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 3873 radio.RegDioMapping1.bits.Dio3Mapping = 1; // TxReady
dudmuck 21:b84a77dfb43c 3874 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 3875
dudmuck 21:b84a77dfb43c 3876 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3877 cmd_ook(0);
dudmuck 21:b84a77dfb43c 3878 radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3879 /* radio.write_u16(REG_FSK_PREAMBLEMSB, 4); // preamble length
dudmuck 21:b84a77dfb43c 3880
dudmuck 21:b84a77dfb43c 3881 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 21:b84a77dfb43c 3882 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 21:b84a77dfb43c 3883 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 3884
dudmuck 21:b84a77dfb43c 3885 // 0123456
dudmuck 21:b84a77dfb43c 3886 sprintf(pcbuf, "syncw a9 66 69 65");
dudmuck 21:b84a77dfb43c 3887 cmd_fsk_syncword(6);*/
dudmuck 21:b84a77dfb43c 3888 tx_ticker.attach(&callback_ook_tx_test, tx_ticker_rate);
dudmuck 21:b84a77dfb43c 3889 }
dudmuck 18:9530d682fd9a 3890
dudmuck 18:9530d682fd9a 3891 void cmd_help(uint8_t args_at);
dudmuck 18:9530d682fd9a 3892
dudmuck 18:9530d682fd9a 3893 typedef enum {
dudmuck 18:9530d682fd9a 3894 MODEM_BOTH,
dudmuck 18:9530d682fd9a 3895 MODEM_FSK,
dudmuck 18:9530d682fd9a 3896 MODEM_LORA
dudmuck 18:9530d682fd9a 3897 } modem_e;
dudmuck 18:9530d682fd9a 3898
dudmuck 18:9530d682fd9a 3899 typedef struct {
dudmuck 18:9530d682fd9a 3900 modem_e modem;
dudmuck 18:9530d682fd9a 3901 const char* const cmd;
dudmuck 18:9530d682fd9a 3902 void (*handler)(uint8_t args_at);
dudmuck 18:9530d682fd9a 3903 const char* const arg_descr;
dudmuck 18:9530d682fd9a 3904 const char* const description;
dudmuck 18:9530d682fd9a 3905 } menu_item_t;
dudmuck 18:9530d682fd9a 3906
dudmuck 18:9530d682fd9a 3907 const menu_item_t menu_items[] =
dudmuck 18:9530d682fd9a 3908 { /* after first character, command names must be [A-Za-z] */
dudmuck 18:9530d682fd9a 3909 { MODEM_BOTH, "chat", cmd_chat, "","start keyboard chat"},
dudmuck 18:9530d682fd9a 3910 { MODEM_BOTH, "rssi", cmd_read_current_rssi, "","(RX) read instantaneous RSSI"},
dudmuck 21:b84a77dfb43c 3911 { MODEM_BOTH, "prssi", cmd_rssi_polling, "<%d>","dbm of rssi polling, 0 = off"},
dudmuck 18:9530d682fd9a 3912 { MODEM_BOTH, "txpd", cmd_per_tx_delay, "<%d>","get/set PER tx delay (in milliseconds)"},
dudmuck 18:9530d682fd9a 3913 { MODEM_BOTH, "pertx", cmd_pertx, "<%d pkt count>","start Eiger PER TX"},
dudmuck 18:9530d682fd9a 3914 { MODEM_BOTH, "perrx", cmd_perrx, "","start Eiger PER RX"},
dudmuck 18:9530d682fd9a 3915 { MODEM_BOTH, "pres", cmd_PreambleSize, "<%d>", "get/set PreambleSize"},
dudmuck 18:9530d682fd9a 3916 { MODEM_BOTH, "pllbw", cmd_pllbw, "", "increment pllbw"},
dudmuck 18:9530d682fd9a 3917 { MODEM_BOTH, "lnab", cmd_lna_boost, "", "(RX) increment LNA boost"},
dudmuck 18:9530d682fd9a 3918 { MODEM_BOTH, "stby", cmd_mode_standby, "", "set chip mode to standby"},
dudmuck 18:9530d682fd9a 3919 { MODEM_BOTH, "sleep", cmd_mode_sleep, "", "set chip mode to sleep"},
dudmuck 18:9530d682fd9a 3920 { MODEM_BOTH, "fstx", cmd_mode_fstx, "", "set chip mode to fstx"},
dudmuck 18:9530d682fd9a 3921 { MODEM_BOTH, "fsrx", cmd_mode_fsrx, "", "set chip mode to fsrx"},
dudmuck 18:9530d682fd9a 3922 { MODEM_BOTH, "crcon", cmd_crcOn, "","toggle crcOn"},
dudmuck 21:b84a77dfb43c 3923 { MODEM_BOTH, "ethcrc", cmd_crc32, "","toggle enable software crc32"},
dudmuck 21:b84a77dfb43c 3924 { MODEM_BOTH, "spif", cmd_spifreq, "<MHz>","change SPI clock frequency"},
dudmuck 18:9530d682fd9a 3925 { MODEM_BOTH, "payl", cmd_payload_length, "<%d>","get/set payload length"},
dudmuck 18:9530d682fd9a 3926 { MODEM_BOTH, "bgr", cmd_bgr, "<%d>","(TX) get/set reference for TX DAC"},
dudmuck 18:9530d682fd9a 3927 { MODEM_BOTH, "ocp", cmd_ocp, "<%d>","(TX) get/set milliamps current limit"},
dudmuck 18:9530d682fd9a 3928 { MODEM_BOTH, "frf", cmd_frf, "<MHz>","get/set RF center frequency"},
dudmuck 18:9530d682fd9a 3929 { MODEM_BOTH, "pas", cmd_paSelect, "","(TX) toggle RFO/PA_BOOST"},
dudmuck 18:9530d682fd9a 3930 { MODEM_BOTH, "pid", cmd_per_id, "<%d>","get/set ID number in Eiger PER packet"},
dudmuck 18:9530d682fd9a 3931 { MODEM_BOTH, "dio", cmd_show_dio, "","print dio mapping"},
dudmuck 18:9530d682fd9a 3932
dudmuck 18:9530d682fd9a 3933 { MODEM_FSK, "clkout", cmd_clkout, "","increment ClkOut divider"},
dudmuck 18:9530d682fd9a 3934 { MODEM_FSK, "ookt", cmd_OokThreshType, "","(RX) increment OokThreshType"},
dudmuck 18:9530d682fd9a 3935 { MODEM_FSK, "ooks", cmd_OokPeakTheshStep, "","(RX) increment OokPeakTheshStep"},
dudmuck 18:9530d682fd9a 3936 { MODEM_FSK, "sqlch", cmd_OokFixedThresh, "<%d>","(RX) get/set OokFixedThresh"},
dudmuck 18:9530d682fd9a 3937 { MODEM_FSK, "rssit", cmd_rssi_threshold, "<-dBm>","(RX) get/set rssi threshold"},
dudmuck 18:9530d682fd9a 3938 { MODEM_FSK, "rssis", cmd_rssi_smoothing, "<%d>","(RX) get/set rssi smoothing"},
dudmuck 18:9530d682fd9a 3939 { MODEM_FSK, "rssio", cmd_rssi_offset, "<%d>","(RX) get/set rssi offset"},
dudmuck 18:9530d682fd9a 3940 { MODEM_FSK, "mods", cmd_mod_shaping, "", "(TX) increment modulation shaping"},
dudmuck 18:9530d682fd9a 3941 { MODEM_FSK, "agcauto", cmd_fsk_agcauto, "", "(RX) toggle AgcAutoOn"},
dudmuck 18:9530d682fd9a 3942 { MODEM_FSK, "afcauto", cmd_fsk_afcauto, "", "(RX) toggle AfcAutoOn"},
dudmuck 18:9530d682fd9a 3943 { MODEM_FSK, "syncw", cmd_fsk_syncword, "<hex bytes>", "get/set syncword"},
dudmuck 18:9530d682fd9a 3944 { MODEM_FSK, "syncon", cmd_fsk_syncOn, "", "toggle SyncOn (frame sync, SFD enable)"},
dudmuck 18:9530d682fd9a 3945 { MODEM_FSK, "bitsync", cmd_fsk_bitsync, "", "toggle BitSyncOn (continuous mode only)"},
dudmuck 18:9530d682fd9a 3946 { MODEM_FSK, "fifot", cmd_fsk_TxStartCondition, "", "(TX) toggle TxStartCondition"},
dudmuck 18:9530d682fd9a 3947 { MODEM_FSK, "pktf", cmd_fsk_PacketFormat, "", "toggle PacketFormat fixed/variable length"},
dudmuck 18:9530d682fd9a 3948 { MODEM_FSK, "poll", cmd_poll_irq_en, "", "toggle poll_irq_en"},
dudmuck 18:9530d682fd9a 3949 { MODEM_FSK, "prep", cmd_fsk_PreamblePolarity, "", "toggle PreamblePolarity"},
dudmuck 18:9530d682fd9a 3950 { MODEM_FSK, "datam", cmd_fsk_DataMode, "", "toggle DataMode (packet/continuous)"},
dudmuck 18:9530d682fd9a 3951 { MODEM_FSK, "rxt", cmd_rx_trigger, "","(RX) increment RxTrigger"},
dudmuck 18:9530d682fd9a 3952 { MODEM_FSK, "ook", cmd_ook, "","enter OOK mode"},
dudmuck 21:b84a77dfb43c 3953 { MODEM_FSK, "otx", cmd_ook_tx_test, "","start ook tx repeat"},
dudmuck 18:9530d682fd9a 3954 { MODEM_FSK, "fei", cmd_fsk_read_fei, "","(RX) read FEI"},
dudmuck 18:9530d682fd9a 3955 { MODEM_FSK, "fdev", cmd_fsk_fdev, "<kHz>","(TX) get/set fdev"},
dudmuck 18:9530d682fd9a 3956 { MODEM_FSK, "par", cmd_paRamp, "","(TX) increment paRamp"},
dudmuck 18:9530d682fd9a 3957 { MODEM_FSK, "pde", cmd_fsk_PreambleDetectorOn, "","(RX) toggle PreambleDetectorOn"},
dudmuck 18:9530d682fd9a 3958 { MODEM_FSK, "pds", cmd_fsk_PreambleDetectorSize, "<%d>","(RX) get/set PreambleDetectorSize"},
dudmuck 18:9530d682fd9a 3959 { MODEM_FSK, "pdt", cmd_fsk_PreambleDetectorTol, "<%d>","(RX) get/set PreambleDetectorTol"},
dudmuck 18:9530d682fd9a 3960 { MODEM_FSK, "thr", cmd_fsk_FifoThreshold, "<%d>","get/set FifoThreshold"},
dudmuck 18:9530d682fd9a 3961 { MODEM_FSK, "dcf", cmd_fsk_dcfree, "","(RX) increment DcFree"},
dudmuck 18:9530d682fd9a 3962 { MODEM_FSK, "br", cmd_fsk_bitrate, "<%f kbps>","get/set bitrate"},
dudmuck 18:9530d682fd9a 3963 { MODEM_FSK, "ac", cmd_AfcClear, "","(RX) AfcClear"},
dudmuck 18:9530d682fd9a 3964 { MODEM_FSK, "ar", cmd_fsk_AutoRestartRxMode, "","(RX) increment AutoRestartRxMode"},
dudmuck 18:9530d682fd9a 3965 { MODEM_FSK, "alc", cmd_fsk_AfcAutoClearOn, "","(RX) toggle AfcAutoClearOn"},
dudmuck 18:9530d682fd9a 3966 { MODEM_FSK, "mp", cmd_MapPreambleDetect, "","(RX) toggle MapPreambleDetect"},
dudmuck 20:b11592c9ba5f 3967 { MODEM_FSK, "rrx", cmd_restart_rx, "","restart RX"},
dudmuck 18:9530d682fd9a 3968 { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"},
dudmuck 21:b84a77dfb43c 3969 { MODEM_FSK, "bt", cmd_bt, "","get/set BT"},
dudmuck 22:2005df80c8a8 3970 { MODEM_FSK, "ltx", cmd_long_tx, "<%d>","long tx"},
dudmuck 18:9530d682fd9a 3971
dudmuck 18:9530d682fd9a 3972 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 3973 { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
dudmuck 18:9530d682fd9a 3974 { MODEM_LORA, "csn", cmd_lora_sync_sweep, "[12]","(TXTEST) sweep ppg symbol"},
dudmuck 18:9530d682fd9a 3975 { MODEM_LORA, "ss", cmd_lora_sync_lo_nibble, "","(TXTEST) ppg low nibble"},
dudmuck 18:9530d682fd9a 3976 { MODEM_LORA, "cpl", lora_cycle_payload_length, "[%d stop]","(TXTEST) sweep payload length"},
dudmuck 18:9530d682fd9a 3977 { MODEM_LORA, "ro", cmd_lora_data_ramp, "[%d bytes]","(TXTEST) sweep payload data"},
dudmuck 18:9530d682fd9a 3978 { MODEM_LORA, "ccr", cmd_lora_cycle_codingrates, "","(TXTEST) cycle coding rates"},
dudmuck 18:9530d682fd9a 3979 { MODEM_LORA, "fps", cmd_lora_fixed_payload_symbol, "[symbol_num n_bits]","(TXTEST) sweep symbol, n_bits=bits per symbol set (sf8=24, sf9=28, etc)"},
dudmuck 18:9530d682fd9a 3980 { MODEM_LORA, "fpo", cmd_fixed_payload_offset, "<nbytes>","(TXTEST) padding offset for fp tests"},
dudmuck 18:9530d682fd9a 3981 { MODEM_LORA, "fp", cmd_lora_fixed_payload, "[bytes]","(TXTEST) fixed payload"},
dudmuck 18:9530d682fd9a 3982 { MODEM_LORA, "tab", cmd_lora_toggle_all_bits, "[byte length]","(TXTEST) toggle all bits"},
dudmuck 18:9530d682fd9a 3983 { MODEM_LORA, "tcrc", cmd_lora_toggle_crcOn, "","(TXTEST) toggle crcOn"},
dudmuck 18:9530d682fd9a 3984 { MODEM_LORA, "thm", cmd_lora_toggle_header_mode, "","(TXTEST) toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3985 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3986
dudmuck 21:b84a77dfb43c 3987 { MODEM_BOTH, "ttr", cmd_tx_ticker_rate, "<%f seconds>","(TXTEST) get/set tx_ticker rate"},
dudmuck 18:9530d682fd9a 3988 { MODEM_LORA, "cadper", cmd_cadper, "","Eiger PER RX using CAD" },
dudmuck 18:9530d682fd9a 3989 { MODEM_LORA, "cad", cmd_cad, "<%d num tries>","(RX) run channel activity detection" },
dudmuck 18:9530d682fd9a 3990 { MODEM_LORA, "iqinv", cmd_lora_rx_invert, "","(RX) toggle RX IQ invert" },
dudmuck 18:9530d682fd9a 3991 { MODEM_LORA, "cin", cmd_lora_tx_invert, "","(TX) toggle TX IQ invert" },
dudmuck 18:9530d682fd9a 3992 { MODEM_LORA, "lhp", cmd_hop_period, "<%d>","(RX) get/set hop period"},
dudmuck 18:9530d682fd9a 3993 { MODEM_LORA, "sync", cmd_lora_ppg, "<%x>","get/set sync (post-preamble gap)"},
dudmuck 18:9530d682fd9a 3994 { MODEM_LORA, "cr", cmd_codingRate, "<1-4>","get/set codingRate"},
dudmuck 18:9530d682fd9a 3995 { MODEM_LORA, "lhm", cmd_lora_header_mode, "","toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3996 { MODEM_LORA, "vh", cmd_lora_poll_validHeader, "","toggle polling of validHeader"},
dudmuck 18:9530d682fd9a 3997 { MODEM_LORA, "sf", cmd_lora_sf, "<%d>","get/set spreadingFactor"},
dudmuck 18:9530d682fd9a 3998 { MODEM_LORA, "ldr", cmd_LowDataRateOptimize, "","toggle LowDataRateOptimize"},
dudmuck 18:9530d682fd9a 3999 { MODEM_LORA, "txc", cmd_lora_continuous_tx, "","(TX) toggle TxContinuousMode"},
dudmuck 18:9530d682fd9a 4000 { MODEM_BOTH, "tx", cmd_tx, "<%d>","transmit packet. optional payload length"},
dudmuck 18:9530d682fd9a 4001 { MODEM_BOTH, "bw", cmd_bandwidth, "<kHz>","get/set bandwith"},
dudmuck 18:9530d682fd9a 4002 { MODEM_LORA, "rxt", cmd_rx_timeout, "<%d>","(RX) get/set SymbTimeout"},
dudmuck 18:9530d682fd9a 4003 { MODEM_LORA, "rxs", cmd_rx_single, "","start RX_SINGLE"},
dudmuck 18:9530d682fd9a 4004 { MODEM_BOTH, "rx", cmd_rx, "","start RX"},
dudmuck 18:9530d682fd9a 4005
dudmuck 18:9530d682fd9a 4006 { MODEM_BOTH, "h", cmd_hw_reset, "","hardware reset"},
dudmuck 18:9530d682fd9a 4007 { MODEM_BOTH, "i", cmd_init, "","initialize radio driver"},
dudmuck 18:9530d682fd9a 4008 { MODEM_BOTH, "R", cmd_read_all_regs, "","read all radio registers"},
dudmuck 18:9530d682fd9a 4009 { MODEM_BOTH, "r", cmd_radio_reg_read, "[%x]","read single radio register"},
dudmuck 18:9530d682fd9a 4010 { MODEM_BOTH, "w", cmd_radio_reg_write, "[%x %x]","write single radio register"},
dudmuck 18:9530d682fd9a 4011
dudmuck 18:9530d682fd9a 4012 { MODEM_BOTH, "L", cmd_toggle_modem, "","toggle between LoRa / FSK"},
dudmuck 18:9530d682fd9a 4013 { MODEM_FSK, "E", cmd_empty_fifo, "","empty out FIFO"},
dudmuck 18:9530d682fd9a 4014 { MODEM_FSK, "c", cmd_fsk_test_case, "<%d>","get/set test cases"},
dudmuck 18:9530d682fd9a 4015 { MODEM_BOTH, "d", cmd_set_dio, "<%d pin num>","increment dio mapping"},
dudmuck 18:9530d682fd9a 4016 { MODEM_BOTH, ".", cmd_print_status, "","print status"},
dudmuck 18:9530d682fd9a 4017 { MODEM_BOTH, "?", cmd_help, "","this list of commands"},
dudmuck 19:be8a8b0e7320 4018 { MODEM_BOTH, NULL, NULL, NULL, NULL }
dudmuck 18:9530d682fd9a 4019 };
dudmuck 18:9530d682fd9a 4020
dudmuck 18:9530d682fd9a 4021 void cmd_help(uint8_t args_at)
dudmuck 18:9530d682fd9a 4022 {
dudmuck 18:9530d682fd9a 4023 int i;
dudmuck 18:9530d682fd9a 4024
dudmuck 18:9530d682fd9a 4025 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4026 if (menu_items[i].modem == MODEM_BOTH)
dudmuck 18:9530d682fd9a 4027 printf("%s%s\t%s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4028 }
dudmuck 18:9530d682fd9a 4029
dudmuck 18:9530d682fd9a 4030 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4031 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4032 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4033 printf("%s%s\t(LoRa) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4034 }
dudmuck 18:9530d682fd9a 4035 } else {
dudmuck 18:9530d682fd9a 4036 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4037 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4038 printf("%s%s\t(FSK) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4039 }
dudmuck 18:9530d682fd9a 4040 }
dudmuck 10:d9bb2ce57f05 4041 }
dudmuck 10:d9bb2ce57f05 4042
dudmuck 0:be215de91a68 4043 void
dudmuck 0:be215de91a68 4044 console()
dudmuck 0:be215de91a68 4045 {
dudmuck 18:9530d682fd9a 4046 int i;
dudmuck 18:9530d682fd9a 4047 uint8_t user_cmd_len;
dudmuck 5:360069ec9953 4048
dudmuck 18:9530d682fd9a 4049 if (poll_irq_en)
dudmuck 18:9530d682fd9a 4050 poll_service_radio();
dudmuck 18:9530d682fd9a 4051 else
dudmuck 18:9530d682fd9a 4052 service_radio();
dudmuck 0:be215de91a68 4053
dudmuck 5:360069ec9953 4054 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 4055 printf("abort\r\n");
dudmuck 21:b84a77dfb43c 4056 rx_payloadReady_int_en = false;
dudmuck 18:9530d682fd9a 4057 cadper_enable = false;
dudmuck 8:227605e4a760 4058 per_en = false;
dudmuck 5:360069ec9953 4059 pcbuf_len = 0;
dudmuck 15:c69b942685ea 4060 if ((radio.RegOpMode.bits.Mode != RF_OPMODE_SLEEP) && (radio.RegOpMode.bits.Mode != RF_OPMODE_STANDBY)) {
dudmuck 15:c69b942685ea 4061 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 15:c69b942685ea 4062 }
dudmuck 18:9530d682fd9a 4063 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 4064 tx_ticker.detach();
dudmuck 0:be215de91a68 4065 return;
dudmuck 0:be215de91a68 4066 }
dudmuck 5:360069ec9953 4067 if (pcbuf_len == 0)
dudmuck 5:360069ec9953 4068 return;
dudmuck 18:9530d682fd9a 4069
dudmuck 0:be215de91a68 4070 printf("\r\n");
dudmuck 18:9530d682fd9a 4071
dudmuck 18:9530d682fd9a 4072 /* get end of user-entered command */
dudmuck 18:9530d682fd9a 4073 user_cmd_len = 1; // first character can be any character
dudmuck 18:9530d682fd9a 4074 for (i = 1; i <= pcbuf_len; i++) {
dudmuck 18:9530d682fd9a 4075 if (pcbuf[i] < 'A' || (pcbuf[i] > 'Z' && pcbuf[i] < 'a') || pcbuf[i] > 'z') {
dudmuck 18:9530d682fd9a 4076 user_cmd_len = i;
dudmuck 18:9530d682fd9a 4077 break;
dudmuck 7:c3c54f222ced 4078 }
dudmuck 0:be215de91a68 4079 }
dudmuck 18:9530d682fd9a 4080
dudmuck 18:9530d682fd9a 4081 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4082 int mi_len = strlen(menu_items[i].cmd);
dudmuck 18:9530d682fd9a 4083 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4084 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4085 continue; // FSK commands not used in LoRa
dudmuck 18:9530d682fd9a 4086 } else {
dudmuck 18:9530d682fd9a 4087 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4088 continue; // LoRa commands not used in FSK
dudmuck 18:9530d682fd9a 4089 }
dudmuck 18:9530d682fd9a 4090
dudmuck 18:9530d682fd9a 4091 if (menu_items[i].handler && user_cmd_len == mi_len && (strncmp(pcbuf, menu_items[i].cmd, mi_len) == 0)) {
dudmuck 18:9530d682fd9a 4092 while (pcbuf[mi_len] == ' ') // skip past spaces
dudmuck 18:9530d682fd9a 4093 mi_len++;
dudmuck 18:9530d682fd9a 4094 menu_items[i].handler(mi_len);
dudmuck 18:9530d682fd9a 4095 break;
dudmuck 18:9530d682fd9a 4096 }
dudmuck 18:9530d682fd9a 4097 }
dudmuck 18:9530d682fd9a 4098
dudmuck 5:360069ec9953 4099 pcbuf_len = 0;
dudmuck 0:be215de91a68 4100 printf("> ");
dudmuck 18:9530d682fd9a 4101 fflush(stdout);
dudmuck 0:be215de91a68 4102 }
dudmuck 0:be215de91a68 4103
dudmuck 5:360069ec9953 4104 void rx_callback()
dudmuck 5:360069ec9953 4105 {
dudmuck 5:360069ec9953 4106 static uint8_t pcbuf_idx = 0;
dudmuck 5:360069ec9953 4107 static uint8_t prev_len = 0;;
dudmuck 5:360069ec9953 4108 char c = pc.getc();
dudmuck 18:9530d682fd9a 4109 /*if (kermit.uart_rx_enabled) {
dudmuck 18:9530d682fd9a 4110 kermit.rx_callback(c);
dudmuck 18:9530d682fd9a 4111 } else*/ {
dudmuck 18:9530d682fd9a 4112 if (c == 8) {
dudmuck 18:9530d682fd9a 4113 if (pcbuf_idx > 0) {
dudmuck 18:9530d682fd9a 4114 pc.putc(8);
dudmuck 18:9530d682fd9a 4115 pc.putc(' ');
dudmuck 18:9530d682fd9a 4116 pc.putc(8);
dudmuck 18:9530d682fd9a 4117 pcbuf_idx--;
dudmuck 18:9530d682fd9a 4118 }
dudmuck 18:9530d682fd9a 4119 } else if (c == 3) { // ctrl-C
dudmuck 18:9530d682fd9a 4120 pcbuf_len = -1;
dudmuck 18:9530d682fd9a 4121 } else if (c == '\r') {
dudmuck 18:9530d682fd9a 4122 if (pcbuf_idx == 0) {
dudmuck 18:9530d682fd9a 4123 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4124 } else {
dudmuck 18:9530d682fd9a 4125 pcbuf[pcbuf_idx] = 0; // null terminate
dudmuck 18:9530d682fd9a 4126 prev_len = pcbuf_idx;
dudmuck 18:9530d682fd9a 4127 pcbuf_idx = 0;
dudmuck 18:9530d682fd9a 4128 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4129 }
dudmuck 18:9530d682fd9a 4130 }/* else if (c == SOH) {
dudmuck 18:9530d682fd9a 4131 kermit.uart_rx_enable();
dudmuck 18:9530d682fd9a 4132 }*/ else if (pcbuf_idx < sizeof(pcbuf)) {
dudmuck 18:9530d682fd9a 4133 pcbuf[pcbuf_idx++] = c;
dudmuck 18:9530d682fd9a 4134 pc.putc(c);
dudmuck 5:360069ec9953 4135 }
dudmuck 5:360069ec9953 4136 }
dudmuck 5:360069ec9953 4137 }
dudmuck 5:360069ec9953 4138
dudmuck 0:be215de91a68 4139 int main()
dudmuck 5:360069ec9953 4140 {
dudmuck 5:360069ec9953 4141 #if defined(TARGET_NUCLEO_L152RE) && defined(USE_DEBUGGER)
dudmuck 5:360069ec9953 4142 DBGMCU_Config(DBGMCU_SLEEP, ENABLE);
dudmuck 5:360069ec9953 4143 DBGMCU_Config(DBGMCU_STOP, ENABLE);
dudmuck 5:360069ec9953 4144 DBGMCU_Config(DBGMCU_STANDBY, ENABLE);
dudmuck 5:360069ec9953 4145 #endif
dudmuck 0:be215de91a68 4146
dudmuck 0:be215de91a68 4147 pc.baud(57600);
dudmuck 6:fe16f96ee335 4148 printf("\r\nmain()\r\n");
dudmuck 6:fe16f96ee335 4149
dudmuck 5:360069ec9953 4150 pc.attach(rx_callback);
dudmuck 0:be215de91a68 4151
dudmuck 21:b84a77dfb43c 4152 make_crc_table();
dudmuck 21:b84a77dfb43c 4153
dudmuck 22:2005df80c8a8 4154 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
dudmuck 15:c69b942685ea 4155 rfsw.input();
dudmuck 15:c69b942685ea 4156 if (rfsw.read()) {
dudmuck 15:c69b942685ea 4157 shield_type = SHIELD_TYPE_LAS;
dudmuck 15:c69b942685ea 4158 printf("LAS\r\n");
dudmuck 15:c69b942685ea 4159 } else {
dudmuck 15:c69b942685ea 4160 shield_type = SHIELD_TYPE_MAS;
dudmuck 15:c69b942685ea 4161 printf("MAS\r\n");
dudmuck 15:c69b942685ea 4162 }
dudmuck 15:c69b942685ea 4163
dudmuck 15:c69b942685ea 4164 rfsw.output();
dudmuck 15:c69b942685ea 4165 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 23:821b4f426ee6 4166 radio.rf_switch = rfsw_callback;
dudmuck 10:d9bb2ce57f05 4167
dudmuck 13:c73caaee93a5 4168 #ifdef FSK_PER
dudmuck 13:c73caaee93a5 4169 fsk.enable(false);
dudmuck 13:c73caaee93a5 4170 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 13:c73caaee93a5 4171 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 13:c73caaee93a5 4172 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 13:c73caaee93a5 4173 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 13:c73caaee93a5 4174 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 13:c73caaee93a5 4175 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 13:c73caaee93a5 4176
dudmuck 13:c73caaee93a5 4177 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4178 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4179 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4180 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 13:c73caaee93a5 4181
dudmuck 13:c73caaee93a5 4182 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 13:c73caaee93a5 4183 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4184 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4185 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 13:c73caaee93a5 4186 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 13:c73caaee93a5 4187
dudmuck 13:c73caaee93a5 4188 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 13:c73caaee93a5 4189 fsk.set_rx_dcc_bw_hz(41666, 1); // afcbw
dudmuck 13:c73caaee93a5 4190 fsk.set_rx_dcc_bw_hz(20833, 0); // rxbw
dudmuck 13:c73caaee93a5 4191
dudmuck 13:c73caaee93a5 4192 fsk.set_tx_fdev_hz(10000);
dudmuck 13:c73caaee93a5 4193
dudmuck 13:c73caaee93a5 4194 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 13:c73caaee93a5 4195
dudmuck 13:c73caaee93a5 4196 fsk.RegPktConfig2.bits.PayloadLength = 64;
dudmuck 13:c73caaee93a5 4197 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 13:c73caaee93a5 4198
dudmuck 13:c73caaee93a5 4199 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 13:c73caaee93a5 4200 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 14:c57ea544dc18 4201 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 14:c57ea544dc18 4202 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 13:c73caaee93a5 4203 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 16:b9d36c60f2d3 4204
dudmuck 16:b9d36c60f2d3 4205 RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4206 RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4207 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4208 write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 16:b9d36c60f2d3 4209
dudmuck 13:c73caaee93a5 4210 #endif /* FSK_PER */
dudmuck 10:d9bb2ce57f05 4211
dudmuck 10:d9bb2ce57f05 4212 #ifdef START_EIGER_TX
dudmuck 14:c57ea544dc18 4213 uint8_t addr;
dudmuck 10:d9bb2ce57f05 4214 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4215
dudmuck 11:81ff5bcafd97 4216 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 11:81ff5bcafd97 4217 radio.RegOcp.bits.OcpTrim = 20;
dudmuck 11:81ff5bcafd97 4218 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 11:81ff5bcafd97 4219
dudmuck 11:81ff5bcafd97 4220 RegPdsTrim1_t pds_trim;
dudmuck 14:c57ea544dc18 4221 if (radio.type == SX1276)
dudmuck 14:c57ea544dc18 4222 addr = REG_PDSTRIM1_SX1276;
dudmuck 14:c57ea544dc18 4223 else
dudmuck 14:c57ea544dc18 4224 addr = REG_PDSTRIM1_SX1272;
dudmuck 14:c57ea544dc18 4225
dudmuck 14:c57ea544dc18 4226 pds_trim.octet = radio.read_reg(addr);
dudmuck 11:81ff5bcafd97 4227 pds_trim.bits.prog_txdac = 7;
dudmuck 14:c57ea544dc18 4228 radio.write_reg(addr, pds_trim.octet);
dudmuck 11:81ff5bcafd97 4229
dudmuck 13:c73caaee93a5 4230 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4231 lora.enable();
dudmuck 12:beb0387c1b4c 4232 lora.setSf(10);
dudmuck 10:d9bb2ce57f05 4233 if (radio.type == SX1276)
dudmuck 10:d9bb2ce57f05 4234 lora.setBw(7); // 7 == 125khz
dudmuck 13:c73caaee93a5 4235 #endif
dudmuck 10:d9bb2ce57f05 4236
dudmuck 10:d9bb2ce57f05 4237 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4238 PacketTxCnt = 0;
dudmuck 10:d9bb2ce57f05 4239 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 11:81ff5bcafd97 4240 #endif /* START_EIGER_TX */
dudmuck 10:d9bb2ce57f05 4241
dudmuck 10:d9bb2ce57f05 4242 #ifdef START_EIGER_RX
dudmuck 13:c73caaee93a5 4243
dudmuck 10:d9bb2ce57f05 4244 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4245 radio.RegPaConfig.bits.PaSelect = 1; // 0: use RFO for sx1276 shield, 1==PA_BOOST
dudmuck 10:d9bb2ce57f05 4246 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 10:d9bb2ce57f05 4247
dudmuck 10:d9bb2ce57f05 4248 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4249 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 4250 PacketRxSequencePrev = 0;
dudmuck 10:d9bb2ce57f05 4251 PacketPerKoCnt = 0;
dudmuck 13:c73caaee93a5 4252 PacketPerOkCnt = 0;
dudmuck 13:c73caaee93a5 4253
dudmuck 13:c73caaee93a5 4254 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4255 lora.enable();
dudmuck 13:c73caaee93a5 4256 lora.setSf(10);
dudmuck 13:c73caaee93a5 4257 if (radio.type == SX1276)
dudmuck 13:c73caaee93a5 4258 lora.setBw(7); // 7 == 125khz
dudmuck 10:d9bb2ce57f05 4259 lora.start_rx();
dudmuck 13:c73caaee93a5 4260 #else
dudmuck 13:c73caaee93a5 4261 fsk.start_rx();
dudmuck 14:c57ea544dc18 4262 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 14:c57ea544dc18 4263 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 15:c69b942685ea 4264
dudmuck 15:c69b942685ea 4265 if (radio.HF) {
dudmuck 15:c69b942685ea 4266 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 15:c69b942685ea 4267 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 15:c69b942685ea 4268 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 15:c69b942685ea 4269 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 15:c69b942685ea 4270 }
dudmuck 10:d9bb2ce57f05 4271 #endif
dudmuck 13:c73caaee93a5 4272
dudmuck 15:c69b942685ea 4273 if (radio.HF) {
dudmuck 15:c69b942685ea 4274 radio.RegLna.bits.LnaBoostHF = 3;
dudmuck 15:c69b942685ea 4275 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 15:c69b942685ea 4276 }
dudmuck 15:c69b942685ea 4277
dudmuck 13:c73caaee93a5 4278 #endif /* START_EIGER_RX */
dudmuck 15:c69b942685ea 4279
dudmuck 15:c69b942685ea 4280 (void)radio.get_frf_MHz();
dudmuck 15:c69b942685ea 4281 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 22:2005df80c8a8 4282 #if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
dudmuck 20:b11592c9ba5f 4283 radio.RegPaConfig.bits.PaSelect = 1; // mDot uses PA_BOOST
dudmuck 20:b11592c9ba5f 4284 #else
dudmuck 15:c69b942685ea 4285 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 15:c69b942685ea 4286 // LAS HF=PA_BOOST LF=RFO
dudmuck 15:c69b942685ea 4287 if (radio.HF)
dudmuck 15:c69b942685ea 4288 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 15:c69b942685ea 4289 else
dudmuck 15:c69b942685ea 4290 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 4291 } else if (shield_type == SHIELD_TYPE_MAS) {
dudmuck 15:c69b942685ea 4292 // MAS HF=RFO LF=RFO
dudmuck 15:c69b942685ea 4293 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 20:b11592c9ba5f 4294 }
dudmuck 20:b11592c9ba5f 4295 #endif
dudmuck 15:c69b942685ea 4296 radio.RegPaConfig.bits.OutputPower = 15;
dudmuck 15:c69b942685ea 4297 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 6:fe16f96ee335 4298
dudmuck 21:b84a77dfb43c 4299 #ifdef START_OOK_TX_TEST
dudmuck 21:b84a77dfb43c 4300 cmd_ook_tx_test(0);
dudmuck 21:b84a77dfb43c 4301 #endif /* START_OOK_TX_TEST */
dudmuck 0:be215de91a68 4302
dudmuck 0:be215de91a68 4303 while(1) {
dudmuck 0:be215de91a68 4304 switch (app) {
dudmuck 0:be215de91a68 4305 case APP_NONE:
dudmuck 0:be215de91a68 4306 console();
dudmuck 0:be215de91a68 4307 break;
dudmuck 0:be215de91a68 4308 case APP_CHAT:
dudmuck 0:be215de91a68 4309 console_chat();
dudmuck 0:be215de91a68 4310 break;
dudmuck 0:be215de91a68 4311 } // ...switch (app)
dudmuck 5:360069ec9953 4312
dudmuck 5:360069ec9953 4313 #if TARGET_NUCLEO_L152RE
dudmuck 5:360069ec9953 4314 //sleep();
dudmuck 5:360069ec9953 4315 #endif
dudmuck 0:be215de91a68 4316 } // ...while(1)
dudmuck 0:be215de91a68 4317 }
dudmuck 0:be215de91a68 4318