wayne roberts / SX127x

Driver library for SX1272/SX1276 transceivers

Dependents:   LORA_RX LORA_TX WindConcentrator hid_test ... more

/media/uploads/dudmuck/lora.png

Driver library for SX1272 and SX1276 radio transceivers.

This device uses CSS modulation to provide much improved link budget. The RF hardware is same as in FSK devices, just with added LoRa spread-spectrum modem.

This library provides functions to configure radio chip and transmit & receive packets.

Using This Library

Library function service_radio() must be called continuously from main loop, to service interrupts from radio.

/media/uploads/dudmuck/sx1272rf1_connector_300.jpg

Board Specific implementation

FunctionPointer for rf_switch callback allows the program to implement control of RF switch unique to their board. Example options are:

  • SKY13373 for external power amplifier implementation. Requires two DigitalOut pins.
  • SKY13350 using PA_BOOST. requires two DigitalOut pins.
  • PE4259-63: controlled directly by radio chip, no software function needed. However, in the case of SX1276MB1xAS, the RXTX pin on IO2 should be driven by this callback function when R16 is installed (without R15) on this shield board.

Some configurations may need to force the use of RFO or PA_BOOST, or a board could offer both options. The rf_switch function pointer callback should support the implementation choice on the board.

further reading

sx127x_fsk.cpp@3:3bf2515b1eed, 2014-05-02 (annotated)

Committer:
dudmuck
Date:
Fri May 02 01:18:59 2014 +0000
Revision:
3:3bf2515b1eed
Parent:
2:fdae76e1215e
Child:
4:d987ac2836bf
brought fsk to functioning

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 2:fdae76e1215e 1 #include "sx127x_fsk.h"
dudmuck 2:fdae76e1215e 2
dudmuck 2:fdae76e1215e 3 /* SX127x driver
dudmuck 2:fdae76e1215e 4 * Copyright (c) 2013 Semtech
dudmuck 2:fdae76e1215e 5 *
dudmuck 2:fdae76e1215e 6 * Licensed under the Apache License, Version 2.0 (the "License");
dudmuck 2:fdae76e1215e 7 * you may not use this file except in compliance with the License.
dudmuck 2:fdae76e1215e 8 * You may obtain a copy of the License at
dudmuck 2:fdae76e1215e 9 *
dudmuck 2:fdae76e1215e 10 * http://www.apache.org/licenses/LICENSE-2.0
dudmuck 2:fdae76e1215e 11 *
dudmuck 2:fdae76e1215e 12 * Unless required by applicable law or agreed to in writing, software
dudmuck 2:fdae76e1215e 13 * distributed under the License is distributed on an "AS IS" BASIS,
dudmuck 2:fdae76e1215e 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dudmuck 2:fdae76e1215e 15 * See the License for the specific language governing permissions and
dudmuck 2:fdae76e1215e 16 * limitations under the License.
dudmuck 2:fdae76e1215e 17 */
dudmuck 3:3bf2515b1eed 18
dudmuck 3:3bf2515b1eed 19 SX127x_fsk::SX127x_fsk(SX127x& r) : m_xcvr(r)
dudmuck 2:fdae76e1215e 20 {
dudmuck 2:fdae76e1215e 21 }
dudmuck 2:fdae76e1215e 22
dudmuck 2:fdae76e1215e 23 SX127x_fsk::~SX127x_fsk()
dudmuck 2:fdae76e1215e 24 {
dudmuck 2:fdae76e1215e 25 }
dudmuck 2:fdae76e1215e 26
dudmuck 2:fdae76e1215e 27 void SX127x_fsk::write_fifo(uint8_t len)
dudmuck 2:fdae76e1215e 28 {
dudmuck 2:fdae76e1215e 29 int i;
dudmuck 2:fdae76e1215e 30
dudmuck 2:fdae76e1215e 31 m_xcvr.m_cs = 0;
dudmuck 2:fdae76e1215e 32 m_xcvr.m_spi.write(REG_FIFO | 0x80); // bit7 is high for writing to radio
dudmuck 2:fdae76e1215e 33
dudmuck 3:3bf2515b1eed 34 if (!m_xcvr.RegOpMode.bits.LongRangeMode && RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 2:fdae76e1215e 35 m_xcvr.m_spi.write(len);
dudmuck 3:3bf2515b1eed 36 }
dudmuck 2:fdae76e1215e 37
dudmuck 2:fdae76e1215e 38 for (i = 0; i < len; i++) {
dudmuck 2:fdae76e1215e 39 m_xcvr.m_spi.write(m_xcvr.tx_buf[i]);
dudmuck 2:fdae76e1215e 40 }
dudmuck 2:fdae76e1215e 41 m_xcvr.m_cs = 1;
dudmuck 2:fdae76e1215e 42 }
dudmuck 2:fdae76e1215e 43
dudmuck 2:fdae76e1215e 44 void SX127x_fsk::enable()
dudmuck 2:fdae76e1215e 45 {
dudmuck 2:fdae76e1215e 46 m_xcvr.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:fdae76e1215e 47
dudmuck 2:fdae76e1215e 48 m_xcvr.RegOpMode.bits.LongRangeMode = 0;
dudmuck 2:fdae76e1215e 49 m_xcvr.write_reg(REG_OPMODE, m_xcvr.RegOpMode.octet);
dudmuck 2:fdae76e1215e 50 wait(0.01);
dudmuck 2:fdae76e1215e 51
dudmuck 2:fdae76e1215e 52 RegPktConfig1.octet = m_xcvr.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 2:fdae76e1215e 53 RegPktConfig2.word = m_xcvr.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 3:3bf2515b1eed 54 RegRxConfig.octet = m_xcvr.read_u16(REG_FSK_RXCONFIG);
dudmuck 3:3bf2515b1eed 55 RegPreambleDetect.octet = m_xcvr.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 3:3bf2515b1eed 56 RegSyncConfig.octet = m_xcvr.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 3:3bf2515b1eed 57 RegFifoThreshold.octet = m_xcvr.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 3:3bf2515b1eed 58 RegAfcFei.octet = m_xcvr.read_reg(REG_FSK_AFCFEI);
dudmuck 3:3bf2515b1eed 59
dudmuck 3:3bf2515b1eed 60 if (!RegFifoThreshold.bits.TxStartCondition) {
dudmuck 3:3bf2515b1eed 61 RegFifoThreshold.bits.TxStartCondition = 1; // start TX on fifoEmpty==0
dudmuck 3:3bf2515b1eed 62 m_xcvr.write_reg(REG_FSK_FIFOTHRESH, RegFifoThreshold.octet);
dudmuck 3:3bf2515b1eed 63 }
dudmuck 3:3bf2515b1eed 64
dudmuck 3:3bf2515b1eed 65 if (RegSyncConfig.bits.AutoRestartRxMode != 1) {
dudmuck 3:3bf2515b1eed 66 RegSyncConfig.bits.AutoRestartRxMode = 1;
dudmuck 3:3bf2515b1eed 67 m_xcvr.write_reg(REG_FSK_SYNCCONFIG, RegSyncConfig.octet);
dudmuck 3:3bf2515b1eed 68 }
dudmuck 3:3bf2515b1eed 69
dudmuck 3:3bf2515b1eed 70 if (RegPreambleDetect.bits.PreambleDetectorTol != 10) {
dudmuck 3:3bf2515b1eed 71 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 3:3bf2515b1eed 72 m_xcvr.write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 3:3bf2515b1eed 73 }
dudmuck 2:fdae76e1215e 74
dudmuck 2:fdae76e1215e 75 m_xcvr.set_opmode(RF_OPMODE_STANDBY);
dudmuck 2:fdae76e1215e 76 }
dudmuck 2:fdae76e1215e 77
dudmuck 2:fdae76e1215e 78 uint32_t SX127x_fsk::ComputeRxBw( uint8_t mantisse, uint8_t exponent )
dudmuck 2:fdae76e1215e 79 {
dudmuck 2:fdae76e1215e 80 // rxBw
dudmuck 2:fdae76e1215e 81 if (m_xcvr.RegOpMode.bits.ModulationType == 0)
dudmuck 2:fdae76e1215e 82 return XTAL_FREQ / (mantisse * (1 << (exponent+2)));
dudmuck 2:fdae76e1215e 83 else
dudmuck 2:fdae76e1215e 84 return XTAL_FREQ / (mantisse * (1 << (exponent+3)));
dudmuck 2:fdae76e1215e 85 }
dudmuck 2:fdae76e1215e 86
dudmuck 2:fdae76e1215e 87
dudmuck 2:fdae76e1215e 88 void SX127x_fsk::ComputeRxBwMantExp( uint32_t rxBwValue, uint8_t* mantisse, uint8_t* exponent )
dudmuck 2:fdae76e1215e 89 {
dudmuck 2:fdae76e1215e 90 uint8_t tmpExp, tmpMant;
dudmuck 2:fdae76e1215e 91 double tmpRxBw;
dudmuck 2:fdae76e1215e 92 double rxBwMin = 10e6;
dudmuck 2:fdae76e1215e 93
dudmuck 2:fdae76e1215e 94 for( tmpExp = 0; tmpExp < 8; tmpExp++ ) {
dudmuck 2:fdae76e1215e 95 for( tmpMant = 16; tmpMant <= 24; tmpMant += 4 ) {
dudmuck 2:fdae76e1215e 96 tmpRxBw = ComputeRxBw(tmpMant, tmpExp);
dudmuck 2:fdae76e1215e 97 if( fabs( tmpRxBw - rxBwValue ) < rxBwMin ) {
dudmuck 2:fdae76e1215e 98 rxBwMin = fabs( tmpRxBw - rxBwValue );
dudmuck 2:fdae76e1215e 99 *mantisse = tmpMant;
dudmuck 2:fdae76e1215e 100 *exponent = tmpExp;
dudmuck 2:fdae76e1215e 101 }
dudmuck 2:fdae76e1215e 102 }
dudmuck 2:fdae76e1215e 103 }
dudmuck 2:fdae76e1215e 104 }
dudmuck 2:fdae76e1215e 105
dudmuck 2:fdae76e1215e 106
dudmuck 2:fdae76e1215e 107 uint32_t SX127x_fsk::get_rx_bw_hz(uint8_t addr)
dudmuck 2:fdae76e1215e 108 {
dudmuck 3:3bf2515b1eed 109 RegRxBw_t reg_bw;
dudmuck 2:fdae76e1215e 110 uint8_t mantissa;
dudmuck 2:fdae76e1215e 111
dudmuck 2:fdae76e1215e 112 if (m_xcvr.RegOpMode.bits.LongRangeMode)
dudmuck 2:fdae76e1215e 113 return 0;
dudmuck 2:fdae76e1215e 114
dudmuck 2:fdae76e1215e 115 reg_bw.octet = m_xcvr.read_reg(addr);
dudmuck 2:fdae76e1215e 116 switch (reg_bw.bits.Mantissa) {
dudmuck 2:fdae76e1215e 117 case 0: mantissa = 16; break;
dudmuck 2:fdae76e1215e 118 case 1: mantissa = 20; break;
dudmuck 2:fdae76e1215e 119 case 2: mantissa = 24; break;
dudmuck 2:fdae76e1215e 120 default: mantissa = 0; break;
dudmuck 2:fdae76e1215e 121 }
dudmuck 2:fdae76e1215e 122
dudmuck 2:fdae76e1215e 123 if (addr == REG_FSK_RXBW)
dudmuck 2:fdae76e1215e 124 RegRxBw.octet = reg_bw.octet;
dudmuck 2:fdae76e1215e 125 else if (addr == REG_FSK_AFCBW)
dudmuck 2:fdae76e1215e 126 RegAfcBw.octet = reg_bw.octet;
dudmuck 2:fdae76e1215e 127
dudmuck 2:fdae76e1215e 128 return ComputeRxBw(mantissa, reg_bw.bits.Exponent);
dudmuck 2:fdae76e1215e 129 }
dudmuck 2:fdae76e1215e 130
dudmuck 2:fdae76e1215e 131
dudmuck 2:fdae76e1215e 132 void SX127x_fsk::set_rx_dcc_bw_hz(uint32_t bw_hz, char afc)
dudmuck 2:fdae76e1215e 133 {
dudmuck 2:fdae76e1215e 134 uint8_t mantisse = 0;
dudmuck 2:fdae76e1215e 135 uint8_t exponent = 0;
dudmuck 2:fdae76e1215e 136
dudmuck 2:fdae76e1215e 137 if (m_xcvr.RegOpMode.bits.LongRangeMode)
dudmuck 2:fdae76e1215e 138 return;
dudmuck 2:fdae76e1215e 139
dudmuck 2:fdae76e1215e 140 ComputeRxBwMantExp( bw_hz, &mantisse, &exponent );
dudmuck 2:fdae76e1215e 141 //printf("bw_hz:%d, mantisse:%d, exponent:%d\n", bw_hz, mantisse, exponent );
dudmuck 2:fdae76e1215e 142 switch( mantisse ) {
dudmuck 2:fdae76e1215e 143 case 16:
dudmuck 2:fdae76e1215e 144 RegRxBw.bits.Mantissa = 0;
dudmuck 2:fdae76e1215e 145 break;
dudmuck 2:fdae76e1215e 146 case 20:
dudmuck 2:fdae76e1215e 147 RegRxBw.bits.Mantissa = 1;
dudmuck 2:fdae76e1215e 148 break;
dudmuck 2:fdae76e1215e 149 case 24:
dudmuck 2:fdae76e1215e 150 RegRxBw.bits.Mantissa = 2;
dudmuck 2:fdae76e1215e 151 break;
dudmuck 2:fdae76e1215e 152 default:
dudmuck 2:fdae76e1215e 153 // Something went terribely wrong
dudmuck 2:fdae76e1215e 154 printf("maintisse:%d\n", mantisse);
dudmuck 2:fdae76e1215e 155 break;
dudmuck 2:fdae76e1215e 156 }
dudmuck 2:fdae76e1215e 157 RegRxBw.bits.Exponent = exponent;
dudmuck 2:fdae76e1215e 158
dudmuck 2:fdae76e1215e 159 if (afc)
dudmuck 2:fdae76e1215e 160 m_xcvr.write_reg(REG_FSK_AFCBW, RegRxBw.octet);
dudmuck 2:fdae76e1215e 161 else
dudmuck 2:fdae76e1215e 162 m_xcvr.write_reg(REG_FSK_RXBW, RegRxBw.octet);
dudmuck 2:fdae76e1215e 163 }
dudmuck 2:fdae76e1215e 164
dudmuck 2:fdae76e1215e 165
dudmuck 2:fdae76e1215e 166 void SX127x_fsk::start_tx(uint16_t arg_len)
dudmuck 2:fdae76e1215e 167 {
dudmuck 2:fdae76e1215e 168 uint16_t pkt_buf_len;
dudmuck 3:3bf2515b1eed 169 RegIrqFlags2_t RegIrqFlags2;
dudmuck 2:fdae76e1215e 170 int maxlen = FSK_FIFO_SIZE-1;
dudmuck 2:fdae76e1215e 171
dudmuck 2:fdae76e1215e 172 if (m_xcvr.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 2:fdae76e1215e 173 m_xcvr.set_opmode(RF_OPMODE_STANDBY);
dudmuck 2:fdae76e1215e 174 }
dudmuck 2:fdae76e1215e 175
dudmuck 2:fdae76e1215e 176 if (m_xcvr.RegDioMapping1.bits.Dio0Mapping != 0) {
dudmuck 2:fdae76e1215e 177 m_xcvr.RegDioMapping1.bits.Dio0Mapping = 0;
dudmuck 2:fdae76e1215e 178 m_xcvr.write_reg(REG_DIOMAPPING1, m_xcvr.RegDioMapping1.octet);
dudmuck 2:fdae76e1215e 179 }
dudmuck 2:fdae76e1215e 180
dudmuck 2:fdae76e1215e 181 if (RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 2:fdae76e1215e 182 pkt_buf_len = arg_len;
dudmuck 2:fdae76e1215e 183 } else {
dudmuck 2:fdae76e1215e 184 pkt_buf_len = RegPktConfig2.bits.PayloadLength;
dudmuck 2:fdae76e1215e 185 printf("fixed-fmt %d\r\n", pkt_buf_len);
dudmuck 2:fdae76e1215e 186 }
dudmuck 2:fdae76e1215e 187
dudmuck 2:fdae76e1215e 188 RegIrqFlags2.octet = m_xcvr.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:fdae76e1215e 189 if (RegIrqFlags2.bits.FifoEmpty) {
dudmuck 2:fdae76e1215e 190 if (RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 2:fdae76e1215e 191 --maxlen; // space for length byte
dudmuck 2:fdae76e1215e 192 if (pkt_buf_len > maxlen) {
dudmuck 2:fdae76e1215e 193 /*setup_FifoLevel(FALLING_EDGE);
dudmuck 2:fdae76e1215e 194 radio_write_fifo_(pkt_buf, maxlen, pkt_buf_len);
dudmuck 2:fdae76e1215e 195 remaining_ = pkt_buf_len - maxlen;
dudmuck 2:fdae76e1215e 196 printf("var-oversized %d R=%d\r\n", pkt_buf_len, remaining_);*/
dudmuck 2:fdae76e1215e 197 printf("var-oversized %d\r\n", pkt_buf_len);
dudmuck 2:fdae76e1215e 198 } else {
dudmuck 2:fdae76e1215e 199 //setup_FifoLevel(NO_EDGE); // disable
dudmuck 2:fdae76e1215e 200 write_fifo(pkt_buf_len);
dudmuck 2:fdae76e1215e 201 //remaining_ = 0; // all was sent
dudmuck 2:fdae76e1215e 202 }
dudmuck 2:fdae76e1215e 203 } else { // fixed-length pkt format...
dudmuck 2:fdae76e1215e 204 pkt_buf_len = RegPktConfig2.bits.PayloadLength;
dudmuck 2:fdae76e1215e 205 if (RegPktConfig2.bits.PayloadLength > maxlen) {
dudmuck 2:fdae76e1215e 206 /*setup_FifoLevel(FALLING_EDGE);
dudmuck 2:fdae76e1215e 207 radio_write_fifo_(pkt_buf, maxlen, -1);
dudmuck 2:fdae76e1215e 208 remaining_ = SX1272FSK->RegPktConfig2.bits.PayloadLength - maxlen;*/
dudmuck 2:fdae76e1215e 209 printf("todo: fsk large packet\r\n");
dudmuck 2:fdae76e1215e 210 } else {
dudmuck 2:fdae76e1215e 211 //setup_FifoLevel(NO_EDGE); // disable
dudmuck 2:fdae76e1215e 212 printf("fixed-write-fifo %d\r\n", RegPktConfig2.bits.PayloadLength);
dudmuck 2:fdae76e1215e 213 write_fifo(RegPktConfig2.bits.PayloadLength);
dudmuck 2:fdae76e1215e 214 }
dudmuck 2:fdae76e1215e 215 }
dudmuck 2:fdae76e1215e 216 } else
dudmuck 2:fdae76e1215e 217 printf("fifo not empty %02x\r\n", RegIrqFlags2.octet);
dudmuck 2:fdae76e1215e 218
dudmuck 2:fdae76e1215e 219 m_xcvr.set_opmode(RF_OPMODE_TRANSMITTER);
dudmuck 2:fdae76e1215e 220
dudmuck 2:fdae76e1215e 221 }
dudmuck 2:fdae76e1215e 222
dudmuck 3:3bf2515b1eed 223 void SX127x_fsk::config_dio0_for_pktmode_rx()
dudmuck 3:3bf2515b1eed 224 {
dudmuck 3:3bf2515b1eed 225 if (RegPktConfig1.bits.CrcOn) {
dudmuck 3:3bf2515b1eed 226 if (m_xcvr.RegDioMapping1.bits.Dio0Mapping != 1) {
dudmuck 3:3bf2515b1eed 227 m_xcvr.RegDioMapping1.bits.Dio0Mapping = 1; // to CrcOk
dudmuck 3:3bf2515b1eed 228 m_xcvr.write_reg(REG_DIOMAPPING1, m_xcvr.RegDioMapping1.octet);
dudmuck 3:3bf2515b1eed 229 }
dudmuck 3:3bf2515b1eed 230 } else { // Crc Off, use PayloadReady
dudmuck 3:3bf2515b1eed 231 if (m_xcvr.RegDioMapping1.bits.Dio0Mapping != 0) {
dudmuck 3:3bf2515b1eed 232 m_xcvr.RegDioMapping1.bits.Dio0Mapping = 0; // to PayloadReady
dudmuck 3:3bf2515b1eed 233 m_xcvr.write_reg(REG_DIOMAPPING1, m_xcvr.RegDioMapping1.octet);
dudmuck 3:3bf2515b1eed 234 }
dudmuck 3:3bf2515b1eed 235 }
dudmuck 3:3bf2515b1eed 236 }
dudmuck 2:fdae76e1215e 237
dudmuck 2:fdae76e1215e 238 void SX127x_fsk::start_rx()
dudmuck 2:fdae76e1215e 239 {
dudmuck 2:fdae76e1215e 240 if (m_xcvr.RegOpMode.bits.LongRangeMode)
dudmuck 2:fdae76e1215e 241 return;
dudmuck 2:fdae76e1215e 242
dudmuck 2:fdae76e1215e 243 if (m_xcvr.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 2:fdae76e1215e 244 // was already receiving, restart it
dudmuck 2:fdae76e1215e 245 m_xcvr.set_opmode(RF_OPMODE_STANDBY);
dudmuck 2:fdae76e1215e 246 wait(0.01);
dudmuck 2:fdae76e1215e 247 }
dudmuck 3:3bf2515b1eed 248
dudmuck 3:3bf2515b1eed 249 config_dio0_for_pktmode_rx();
dudmuck 3:3bf2515b1eed 250
dudmuck 2:fdae76e1215e 251 m_xcvr.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 2:fdae76e1215e 252 }
dudmuck 2:fdae76e1215e 253
dudmuck 2:fdae76e1215e 254 service_action_e SX127x_fsk::service()
dudmuck 2:fdae76e1215e 255 {
dudmuck 2:fdae76e1215e 256 int i;
dudmuck 2:fdae76e1215e 257
dudmuck 2:fdae76e1215e 258 if (m_xcvr.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 2:fdae76e1215e 259 if (m_xcvr.dio0) {
dudmuck 2:fdae76e1215e 260 m_xcvr.set_opmode(RF_OPMODE_STANDBY);
dudmuck 2:fdae76e1215e 261 return SERVICE_TX_DONE;
dudmuck 2:fdae76e1215e 262 }
dudmuck 3:3bf2515b1eed 263 } else if (m_xcvr.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER && m_xcvr.dio0) {
dudmuck 3:3bf2515b1eed 264 if (RegRxConfig.bits.AfcAutoOn)
dudmuck 3:3bf2515b1eed 265 RegAfcValue = m_xcvr.read_s16(REG_FSK_AFCMSB);
dudmuck 3:3bf2515b1eed 266
dudmuck 2:fdae76e1215e 267 if (RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 3:3bf2515b1eed 268 rx_buf_length = m_xcvr.read_reg(REG_FIFO);
dudmuck 2:fdae76e1215e 269 } else {
dudmuck 3:3bf2515b1eed 270 rx_buf_length = RegPktConfig2.bits.PayloadLength;
dudmuck 2:fdae76e1215e 271 }
dudmuck 2:fdae76e1215e 272
dudmuck 2:fdae76e1215e 273 m_xcvr.m_cs = 0;
dudmuck 2:fdae76e1215e 274 m_xcvr.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
dudmuck 3:3bf2515b1eed 275 for (i = 0; i < rx_buf_length; i++) {
dudmuck 2:fdae76e1215e 276 m_xcvr.rx_buf[i] = m_xcvr.m_spi.write(0);
dudmuck 2:fdae76e1215e 277 }
dudmuck 2:fdae76e1215e 278 m_xcvr.m_cs = 1;
dudmuck 2:fdae76e1215e 279 return SERVICE_READ_FIFO;
dudmuck 2:fdae76e1215e 280 }
dudmuck 2:fdae76e1215e 281
dudmuck 2:fdae76e1215e 282 return SERVICE_NONE;
dudmuck 2:fdae76e1215e 283 }